ETC FSYA9250D3

FSYA9250D, FSYA9250R
December 2001
Radiation Hardened, SEGR Resistant
P-Channel Power MOSFETs
The Discrete Products Operation of Fairchild Corporation
has developed a series of Radiation Hardened MOSFETs
specifically designed for commercial and military space
applications. Enhanced Power MOSFET immunity to Single
Event Effects (SEE), Single Event Gate Rupture (SEGR) in
particular, is combined with 100K RADS of total dose
hardness to provide devices which are ideally suited to
harsh space environments. The dose rate and neutron
tolerance necessary for military applications have not been
sacrificed.
The Fairchild portfolio of SEGR resistant radiation
hardened MOSFETs includes N-Channel and P-Channel
devices in a variety of voltage, current and on-resistance
ratings. Numerous packaging options are also available.
This MOSFET is an enhancement-mode silicon-gate power
field-effect transistor of the vertical DMOS (VDMOS)
structure. It is specially designed and processed to be
radiation tolerant. The MOSFET is well suited for
applications exposed to radiation environments such as
switching regulation, switching converters, motor drives,
relay drivers and drivers for high-power bipolar switching
transistors requiring high speed and low gate drive power.
This type can be operated directly from integrated circuits.
Features
• 17A, -200V, rDS(ON) = 0.270Ω
• Total Dose
- Meets Pre-RAD Specifications to 100K RAD (Si)
• Single Event
- Safe Operating Area Curve for Single Event Effects
- SEE Immunity for LET of 36MeV/mg/cm2 with
VDS up to 80% of Rated Breakdown and
VGS of 10V Off-Bias
• Dose Rate
- Typically Survives 3E9 RAD (Si)/s at 80% BVDSS
- Typically Survives 2E12 if Current Limited to IDM
• Photo Current
- 12nA Per-RAD(Si)/s Typically
• Neutron
- Maintain Pre-RAD Specifications
for 1E13 Neutrons/cm2
- Usable to 1E14 Neutrons/cm2
Symbol
D
G
Reliability screening is available as either commercial, TXV
equivalent of MIL-S-19500, or Space equivalent of
MIL-S-19500. Contact Fairchild Corporation for any desired
deviations from the data sheet.
Ordering Information
RAD LEVEL
S
Package
SCREENING LEVEL
PART NUMBER/BRAND
10K
Commercial
FSYA9250D1
10K
TXV
FSYA9250D3
100K
Commercial
FSYA9250R1
100K
TXV
FSYA9250R3
100K
Space
FSYA9250R4
SMD-1
Formerly available as type TA17757.
©2001 Fairchild Semiconductor Corporation
FSYA9250D, FSYA9250R Rev. B
FSYA9250D, FSYA9250R
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS
Drain to Gate Voltage (RGS = 20kΩ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current
TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation
TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PT
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PT
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulsed Avalanche Current, L = 100µH, (See Test Figure) . . . . . . . . . . . . . . . . . . . . . IAS
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS
Pulsed Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
(Distance >0.063in (1.6mm) from Case, 10s Max)
FSYA9250D, FSYA9250R
-200
-200
UNITS
V
V
17
11
51
±20
A
A
A
V
150
60
1.20
51
17
51
-55 to 150
300
W
W
W/ oC
A
A
A
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
o
TC = 25 C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
Drain to Source Breakdown Voltage
BVDSS
ID = 1mA, VGS = 0V
Gate Threshold Voltage
VGS(TH)
VGS = VDS,
ID = 1mA
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Drain to Source On-State Voltage
Drain to Source On Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
IDSS
IGSS
VDS(ON)
rDS(ON)12
td(ON)
tr
td(OFF)
VDS = -160V,
VGS = 0V
VGS = ±20V
Gate Charge at 12V
Qg(12)
VGS = 0V to -12V
Threshold Gate Charge
Qg(TH)
VGS = 0V to -2V
Gate Charge Source
UNITS
-
-
V
-
-
-7.0
V
TC = 25oC
TC = 125oC
TC = 25oC
TC = 125oC
TC = 25oC
TC = 125oC
-2.0
-
-6.0
V
-1.0
-
-
V
-
-
25
µA
-
-
250
µA
-
-
100
nA
-
-
200
nA
-
-
-5.10
V
TC = 25oC
-
0.210
0.270
Ω
TC = 125oC
-
-
0.451
Ω
-
-
45
ns
-
-
30
ns
-
-
95
ns
-
-
25
ns
-
-
230
nC
-
130
150
nC
-
-
8.7
nC
-
24
34
nC
tf
VGS = 0V to -20V
MAX
-200
VDD = -100V, ID = 17A,
RL = 5.9Ω, VGS = -12V,
RGS = 2.35Ω
Qg(TOT)
TYP
TC = -55oC
VGS = -12V, ID = 17A
ID = 11A,
VGS = -12V
MIN
VDD = -100V,
ID = 17A
Qgs
-
53
63
nC
V(PLATEAU)
ID = 17A, VDS = -15V
-
-6
-
V
Input Capacitance
CISS
-
3500
-
pF
Output Capacitance
COSS
VDS = -25V, VGS = 0V,
f = 1MHz
-
630
-
pF
Reverse Transfer Capacitance
CRSS
-
150
-
pF
0.83
oC/W
Gate Charge Drain
Plateau Voltage
Thermal Resistance Junction to Case
©2001 Fairchild Semiconductor Corporation
Qgd
RθJC
-
-
FSYA9250D, FSYA9250R Rev. B
FSYA9250D, FSYA9250R
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Forward Voltage
VSD
Reverse Recovery Time
TEST CONDITIONS
ISD = 17A
MIN
TYP
MAX
-0.6
-
-1.8
V
-
-
300
ns
MIN
MAX
UNITS
ISD = 17A, dISD/dt = 100A/µs
trr
Electrical Specifications up to 100K RAD
UNITS
TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
Drain to Source Breakdown Volts
(Note 3)
BVDSS
VGS = 0, ID = 1mA
-200
-
V
Gate to Source Threshold Volts
(Note 3)
VGS(TH)
VGS = VDS, ID = 1mA
-2.0
-6.0
V
Gate to Body Leakage
(Notes 2, 3)
IGSS
VGS = ±20V, VDS = 0V
-
100
nA
Zero Gate Leakage
(Note 3)
IDSS
VGS = 0, VDS = -160V
-
25
µA
Drain to Source On-State Volts
(Notes 1, 3)
VDS(ON)
VGS = -12V, ID = 17A
-
-5.10
V
Drain to Source On Resistance
(Notes 1, 3)
rDS(ON)12
VGS = -12V, ID = 11A
-
0.270
Ω
NOTES:
1. Pulse test, 300µs Max.
2. Absolute value.
3. Insitu Gamma bias must be sampled for both VGS = -12V, VDS = 0V and VGS = 0V, VDS = 80% BVDSS .
Single Event Effects (SEB, SEGR) Note 4
ENVIRONMENT (NOTE 5)
TEST
SYMBOL
Single Event Effects Safe Operating Area
SEESOA
ION
SPECIES
TYPICAL LET
(MeV/mg/cm)
TYPICAL
RANGE (µ)
APPLIED
VGS BIAS
(V)
(NOTE 6)
MAXIMUM
VDS BIAS (V)
Ni
26
43
20
-200
Br
37
36
5
-200
Br
37
36
10
-160
Br
37
36
15
-100
Br
37
36
20
-40
NOTES:
4. Testing conducted at Brookhaven National Labs; sponsored by Naval Surface Warfare Center (NSWC), Crane, IN.
5. Fluence = 1E5 ions/cm2 (typical), T = 25oC.
6. Does not exhibit Single Event Burnout (SEB) or Single Event Gate Rupture (SEGR).
Typical Performance Curves
Unless Otherwise Specified
LET = 26MeV/mg/cm2, RANGE = 43µ
LET = 37MeV/mg/cm2, RANGE = 36µ
1E-3
LIMITING INDUCTANCE (HENRY)
FLUENCE = 1E5 IONS/cm2 (TYPICAL)
-200
VDS (V)
-160
-120
-80
-40
TEMP = 25oC
0
0
5
1E-4
ILM = 10A
30A
1E-5
100A
300A
1E-6
1E-7
-10
10
15
VGS (V)
20
25
FIGURE 1. SINGLE EVENT EFFECTS SAFE OPERATING AREA
©2001 Fairchild Semiconductor Corporation
-30
-100
-300
-1000
DRAIN SUPPLY (V)
FIGURE 2. DRAIN INDUCTANCE REQUIRED TO LIMIT
GAMMA DOT CURRENT TO IAS
FSYA9250D, FSYA9250R Rev. B
FSYA9250D, FSYA9250R
Typical Performance Curves
Unless Otherwise Specified
(Continued)
100
20
ID , DRAIN CURRENT (A)
ID , DRAIN (A)
16
12
8
TC = 25oC
100µs
10
1ms
4
10ms
OPERATION IN THIS
AREA MAY BE
LIMITED BY rDS(ON)
0
-50
0
50
100
1
150
1
10
TC , CASE TEMPERATURE (oC)
100
500
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 3. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
2.5
PULSE DURATION = 250ms, VGS = -12V, ID = 11A
2.0
QGS
NORMALIZED rDS(ON)
QG
-12V
QGD
VG
1.5
1.0
0.5
0.0
-80
CHARGE
0
-40
BASIC GATE CHARGE WAVEFORM
40
80
120
160
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 5. BASIC GATE CHARGE WAVEFORM
FIGURE 6. NORMALIZED rDS(ON) vs JUNCTION TEMPERATURE
THERMAL RESPONSE (ZθJC)
NORMALIZED
10
1
0.5
0.1
0.2
0.1
0.05
0.02
0.01
0.01
PDM
SINGLE PULSE
0.001
10-5
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
10-4
10-3
10-2
10-1
t1
t2
100
101
t, RECTANGULAR PULSE DURATION (s)
FIGURE 7. NORMALIZED MAXIMUM TRANSIENT THERMAL RESPONSE
©2001 Fairchild Semiconductor Corporation
FSYA9250D, FSYA9250R Rev. B
FSYA9250D, FSYA9250R
Typical Performance Curves
Unless Otherwise Specified
(Continued)
IAS , AVALANCHE CURRENT (A)
100
STARTING TJ = 25oC
STARTING TJ = 150oC
10
IF R = 0
tAV = (L) (IAS) / (1.3 RATED BVDSS - VDD)
IF R ≠ 0
tAV = (L/R) ln [(IAS*R) / (1.3 RATED BVDSS - VDD) + 1]
1
0.01
0.1
1
10
tAV , TIME IN AVALANCHE (ms)
FIGURE 8. UNCLAMPED INDUCTIVE SWITCHING
Test Circuits and Waveforms
ELECTRONIC SWITCH OPENS
WHEN IAS IS REACHED
VDS
L
BVDSS
+
CURRENT I
TRANSFORMER AS
tP
-
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDS
IAS
VDD
+
50Ω
-
tP
VDD
50V-150V
DUT
50Ω
VGS ≤ 20V
tAV
FIGURE 9. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 10. UNCLAMPED ENERGY WAVEFORMS
tON
VDD
tOFF
td(ON)
td(OFF)
tr
RL
VDS
tf
90%
90%
VDS
0V
10%
DUT
VGS = -12V
10%
90%
RGS
50%
VGS
50%
PULSE WIDTH
10%
FIGURE 11. RESISTIVE SWITCHING TEST CIRCUIT
Screening Information
©2001 Fairchild Semiconductor Corporation
FIGURE 12. RESISTIVE SWITCHING WAVEFORMS
FSYA9250D, FSYA9250R Rev. B
FSYA9250D, FSYA9250R
Screening is performed in accordance with the latest revision in effect of MIL-S-19500, (Screening Information Table).
Delta Tests and Limits (JANTXV Equivalent, JANS Equivalent) TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MAX
UNITS
Gate to Source Leakage Current
IGSS
VGS = ±20V
±20 (Note 7)
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 80% Rated Value
±25 (Note 7)
µA
Drain to Source On Resistance
rDS(ON)
TC = 25oC at Rated ID
±20% (Note 8)
Ω
Gate Threshold Voltage
VGS(TH)
ID = 1.0mA
±20% (Note 8)
V
NOTES:
7. Or 100% of Initial Reading (whichever is greater).
8. Of Initial Reading.
Screening Information
TEST
JANTXV EQUIVALENT
JANS EQUIVALENT
Gate Stress
VGS = -30V, t = 250µs
VGS = -30V, t = 250µs
Pind
Optional
Required
Pre Burn-In Tests (Note 9)
MIL-S-19500 Group A,
Subgroup 2 (All Static Tests at 25oC)
MIL-S-19500 Group A,
Subgroup 2 (All Static Tests at 25oC)
Steady State Gate
Bias (Gate Stress)
MIL-STD-750, Method 1042, Condition B
VGS = 80% of Rated Value,
TA = 150oC, Time = 48 hours
MIL-STD-750, Method 1042, Condition B
VGS = 80% of Rated Value,
TA = 150oC, Time = 48 hours
Interim Electrical Tests (Note 9)
All Delta Parameters Listed in the Delta Tests
and Limits Table
All Delta Parameters Listed in the Delta Tests
and Limits Table
Steady State Reverse
Bias (Drain Stress)
MIL-STD-750, Method 1042, Condition A
VDS = 80% of Rated Value,
TA = 150oC, Time = 160 hours
MIL-STD-750, Method 1042, Condition A
VDS = 80% of Rated Value,
TA = 150oC, Time = 240 hours
PDA
10%
5%
Final Electrical Tests (Note 9)
MIL-S-19500, Group A, Subgroup 2
MIL-S-19500, Group A,
Subgroups 2 and 3
NOTE:
9. Test limits are identical pre and post burn-in.
Additional Screening Tests
PARAMETER
MAX
UNITS
VDS = -160V, t = 10ms
2.8
A
IAS
VGS(PEAK) = -15V, L = 0.1mH
51
A
Thermal Response
∆VSD
tH = 10ms; VH = -25V; IH = 4A
70
mV
Thermal Impedance
∆VSD
tH = 500ms; VH = -20V; IH = 4A
HEATSINK REQUIRED
159
mV
Safe Operating Area
Unclamped Inductive Switching
©2001 Fairchild Semiconductor Corporation
SYMBOL
SOA
TEST CONDITIONS
FSYA9250D, FSYA9250R Rev. B
FSYA9250D, FSYA9250R
Rad Hard Data Packages - Fairchild Power Transistors
TXV Equivalent
C. Preconditioning - Attributes Data Sheet
E. Preconditioning Attributes Data Sheet
Hi-Rel Lot Traveler
HTRB - Hi Temp Gate Stress Post Reverse
Bias Data and Delta Data
HTRB - Hi Temp Drain Stress Post Reverse
Bias Delta Data
D. Group A
- Attributes Data Sheet
F. Group A
E. Group B
- Attributes Data Sheet
G. Group B
- Attributes Data Sheet
F. Group C
- Attributes Data Sheet
H. Group C
- Attributes Data Sheet
G. Group D
- Attributes Data Sheet
I. Group D
- Attributes Data Sheet
1. Rad Hard TXV Equivalent - Standard Data Package
A. Certificate of Compliance
B. Assembly Flow Chart
2. Rad Hard TXV Equivalent - Optional Data Package
- Attributes Data Sheet
2. Rad Hard Max. “S” Equivalent - Optional Data Package
A. Certificate of Compliance
A. Certificate of Compliance
B. Assembly Flow Chart
B. Serialization Records
C. Preconditioning - Attributes Data Sheet
- Precondition Lot Traveler
- Pre and Post Burn-In Read and Record
Data
C. Assembly Flow Chart
D. Group A
- Attributes Data Sheet
- Group A Lot Traveler
E. Group B
- Attributes Data Sheet
- Group B Lot Traveler
- Pre and Post Read and Record Data for
Intermittent Operating Life (Subgroup B3)
- Bond Strength Data (Subgroup B3)
- Pre and Post High Temperature Operating
Life Read and Record Data (Subgroup B6)
F. Group C
G. Group D
- Attributes Data Sheet
- Group C Lot Traveler
- Pre and Post Read and Record Data for
Intermittent Operating Life (Subgroup C6)
- Bond Strength Data (Subgroup C6)
- Attributes Data Sheet
- Group D Lot Traveler
- Pre and Post RAD Read and Record Data
D. SEM Photos and Report
E. Preconditioning - Attributes Data Sheet
- Hi-Rel Lot Traveler
- HTRB - Hi Temp Gate Stress Post
Reverse Bias Data and Delta Data
- HTRB - Hi Temp Drain Stress Post
Reverse Bias Delta Data
- X-Ray and X-Ray Report
F. Group A
- Attributes Data Sheet
- Hi-Rel Lot Traveler
- Subgroups A2, A3, A4, A5 and A7 Data
G. Group B
- Attributes Data Sheet
- Hi-Rel Lot Traveler
- Subgroups B1, B3, B4, B5 and B6 Data
H. Group C
- Attributes Data Sheet
- Hi-Rel Lot Traveler
- Subgroups C1, C2, C3 and C6 Data
I. Group D
- Attributes Data Sheet
- Hi-Rel Lot Traveler
- Pre and Post Radiation Data
Class S - Equivalents
1. Rad Hard “S” Equivalent - Standard Data Package
A. Certificate of Compliance
B. Serialization Records
C. Assembly Flow Chart
D. SEM Photos and Report
©2001 Fairchild Semiconductor Corporation
FSYA9250D, FSYA9250R Rev. B
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
FAST 
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench 
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER 
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET 
VCX™
STAR*POWER is used under license
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into
support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4