ETC OPA445AU/2K5

®
OPA445
OPA
445
OPA
445
For most current data sheet and other product
information, visit www.burr-brown.com
High Voltage FET-Input
OPERATIONAL AMPLIFIER
FEATURES
APPLICATIONS
● WIDE-POWER SUPPLY RANGE:
±10V to ±45V
● HIGH SLEW RATE: 15V/µs
● TEST EQUIPMENT
● HIGH-VOLTAGE REGULATORS
● POWER AMPLIFIERS
● DATA ACQUISITION
● LOW INPUT BIAS CURRENT: 10pA
● STANDARD-PINOUT TO-99, DIP, AND
SURFACE-MOUNT PACKAGES
● SIGNAL CONDITIONING
● AUDIO
● PIEZO DRIVERS
DESCRIPTION
The OPA445 is a monolithic operational amplifier
capable of operation from power supplies up to ±45V
and output currents of 15mA. It is useful in a wide
variety of applications requiring high output voltage
or large common-mode voltage swings.
The OPA445’s high slew rate provides wide powerbandwidth response, which is often required for highvoltage applications. FET input circuitry allows the
use of high-impedance feedback networks, thus mini-
mizing their output loading effects. Laser trimming of
the input circuitry yields low input offset voltage and
drift.
The OPA445 is available in standard pin-out TO-99,
DIP-8, and SO-8 surface-mount packages. It is fully
specified from –25°C to +85°C and operates from
–55°C to +125°C. A SPICE macromodel is available
for design analysis.
NC
Offset
Trim
–In
8
7 V+
1
2
+In
6
3
4
Output
5 Offset
Trim
V–
Offset Trim
1
8
NC
–In
2
7
V+
+In
3
6
Output
V–
4
5
Offset Trim
8-Pin DIP, SO-8
Case is connected to V–
TO-99
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©
SBOS156
1987 Burr-Brown Corporation
PDS-754H
Printed in U.S.A. March, 2000
SPECIFICATIONS
At TA = +25°C, VS = ±40V, and RL = 5kΩ, unless otherwise specified.
Boldface limits apply over the specified temperature range, TA = –25°C to +85°C. VS = ±40V.
OPA445BM
PARAMETER
CONDITIONS
OFFSET VOLTAGE
Input Offset Voltage
vs Temperature
vs Power Supply
VOS
VOS /dT
PSRR
INPUT BIAS CURRENT(1)
Input Bias Current
IB
Over Specified Temperature Range
Input Offset Current
IOS
Over Specified Temperature Range
NOISE
Input Voltage Noise Density, f = 1kHz
Current Noise Density, f = 1kHz
MIN
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
VCM
Common-Mode Rejection
CMRR
Over Specified Temperature Range
±1
±3
4
±10
VCM = 0V
±10
VCM = 0V
±4
MIN
TYP
MAX
UNITS
±5
100
±1.5
✻
✻
✻
mV
µV/°C
µV/V
±50
✻
±20
±5
✻
±100
±20
±40
±10
pA
nA
pA
nA
±10
✻
✻
15
6
VS = ±40V
VCM = –35V to +35V
(V–)+5
80
80
INPUT IMPEDANCE
Differential
Common-Mode
(V+)–5
95
✻
✻
✻
1013 || 1
1014 || 3
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
AOL
Over Specified Temperature Range
FREQUENCY RESPONSE
Gain Bandwidth Product
Slew Rate
Full Power Bandwidth
Rise Time
Overshoot
Total Harmonic Distortion + Noise
MAX
VCM = 0, IO = 0
TA = –25°C to +85°C
VS = ±10V to ±45V
en
in
OPA445AP, AU
TYP
GBW
SR
THD+N
OUTPUT
Voltage Output
VO
Over Specified Temperature Range
Current Output
IO
Output Resistance, Open Loop
RO
Short Circuit Current
ISC
Capacitive Load Drive
CLOAD
POWER SUPPLY
Specified Operating Range
Operating Voltage Range
Quiescent Current
TEMPERATURE RANGE
Specification Range
Operating Range
Storage Range
Thermal Resistance
TO-99
8-Pin DIP
SO-8 Surface-Mount
VO = –35V to +35V
100
97
VO = 70Vp-p
VO = 70Vp-p
VO = ±200mV
G = +1, ZL = 5kΩ || 50pF
f = 1kHz, VO = 3.5Vr ms, G = 1
f = 1kHz, VO = 10Vr ms, G = 1
5
23
✻
✻
(V+)–5
(V+)–5
±10
IO = 0
±40
±4.2
–25
–55
–65
✻
✻
V
dB
dB
✻
✻
Ω || pF
Ω || pF
✻
dB
dB
✻
✻
✻
✻
✻
✻
✻
MHz
V/µs
kHz
ns
%
%
%
✻
✻
✻
✻
✻
✻
✻
✻
220
±26
See Typical Curve(2)
VS
IQ
2
15
70
100
35
0.0002
0.00008
(V–)+5
(V–)+5
±15
VO = ±28V
dc
✻
✻
110
nV/√Hz
fA/√Hz
✻
±45
±4.7
✻
+85
+125
+125
✻
✻
–55
✻
θJA
200
100
150
V
V
mA
Ω
mA
✻
✻
V
V
mA
✻
✻
+125
°C
°C
°C
°C/W
°C/W
°C/W
✻ Specifications same as OPA445BM.
NOTE: (1) High-speed test at TJ = +25°C. (2) See “Small-Signal Overshoot vs Load Capacitance” in the Typical Performance Curves section.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
OPA445
2
ABSOLUTE MAXIMUM RATINGS(1)
ELECTROSTATIC
DISCHARGE SENSITIVITY
Power Supply ..................................................................................... ±50V
Differential Input Voltage ................................................................... ±80V
Input Voltage Range ................................................................... |±VS| –3V
Storage Temperature Range: M ..................................... –65°C to +150°C
P, U ................................. –55°C to +125°C
Operating Temperature Range ....................................... –55°C to +125°C
Lead Temperature (soldering, 10s) ............................................... +300°C
Output Short-Circuit to Ground (TJ < +125°C) ......................... Continuous
Junction Temperature: M ................................................................. 175°C
P,U .............................................................. 150°C
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
PACKAGE /ORDERING INFORMATION
PRODUCT
PACKAGE
PACKAGE
DRAWING
NUMBER
OPA445AP
OPA445AU
OPA445AU
OPA445BM
8-Pin DIP
SO-8 Surface-Mount
"
8-Pin TO-99
006
182
"
001
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER(1)
TRANSPORT
MEDIA
–25°C to +85°C
–25°C to +85°C
"
–25°C to +85°C
OPA445AP
OPA445AU
"
OPA445BM
OPA445AP
OPA445AU
OPA445AU/2K5
OPA445BM
Rails
Rails
Tape and Reel
Rails
NOTE: (1) Products followed by a slash (/) are only available in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500
pieces of “OPA445AU/2K5” will get a single 2500 piece Tape and Reel.
®
3
OPA445
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±40V, unless otherwise noted.
OPEN-LOOP GAIN AND SUPPLY CURRENT
vs SUPPLY VOLTAGE
OPEN-LOOP GAIN AND PHASE
vs FREQUENCY
125
140
–45
θ
–90
60
40
–135
Gain
–185
10
100
1k
10k
100k
1M
AVOL
105
3.5
3.0
95
10
20
30
40
50
Frequency (Hz)
Supply Voltage (±VS)
GAIN BANDWIDTH AND SLEW RATE
vs TEMPERATURE
GAIN BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
16
19
2.2
15
13
2.0
GBW
12
1.8
Slew Rate (V/µs)
14
2.2
Gain Bandwidth (MHz)
SR
GBW
17
2.0
15
1.8
SR
11
1.6
10
1.4
–50
–25
0
25
50
75
100
13
1.6
125
10
20
30
40
Ambient Temperature (°C)
Supply Voltage (±VS)
INPUT BIAS CURRENT
vs TEMPERATURE
INPUT BIAS CURRENT
vs COMMON-MODE VOLTAGE
100nA
40
10nA
35
50
30
Bias Current (pA)
1nA
100pA
10pA
1pA
25
20
15
–IB
+IB
10
0.1pA
5
0.01pA
0
–50
–25
0
25
50
75
100
–50 –40 –30 –20 –10
125
®
OPA445
0
10
20
Common-Mode Voltage (V)
Temperature (°C)
4
30
40
50
Slew Rate (V/µs)
2.4
–75
4.0
IQ
110
10M
2.6
–75
115
100
0
Gain Bandwidth (MHz)
Voltage Gain (dB)
80
Phase (Degrees)
Voltage Gain (dB)
100
20
Input Bias Current
120
Supply Current (mA)
120
4.5
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±40V, unless otherwise noted.
COMMON-MODE REJECTION
vs FREQUENCY
POWER SUPPLY REJECTION
vs FREQUENCY
100
Common-Mode Rejection (dB)
Power Supply Rejection (dB)
120
100
+PSRR
80
60
–PSRR
40
20
0
90
80
70
60
50
40
10
100
1k
10k
100k
1M
10M
10
100M
100
1k
10k
1M
100k
10M
Frequency (Hz)
Frequency (Hz)
OPEN-LOOP GAIN vs TEMPERATURE
POWER SUPPLY REJECTION AND
COMMON-MODE REJECTION vs TEMPERATURE
130
120
PSRR, CMRR (dB)
Voltage Gain (dB)
120
110
100
PSRR
110
100
CMRR
90
80
90
–75
–50
–25
0
25
50
75
100
70
–75
125
–25
0
25
50
75
100
Ambient Temperature (°C)
INPUT VOLTAGE NOISE SPECTRAL DENSITY
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
125
0.1
100
0.01
THD+Noise (%)
Voltage Noise (nV/ Hz)
–50
Ambient Temperature (°C)
10
VO = 3.5Vrms
G = 10
0.001
VO = 3.5Vrms
VO = 10Vrms
G=1
0.0001
VO = 10Vrms
1
0.00001
10
100
1k
10k
20
100k
100
1k
10k 20k
Frequency (Hz)
Frequency (Hz)
®
5
OPA445
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±40V, unless otherwise noted.
OUTPUT VOLTAGE SWING vs TEMPERATURE
(V+)
(V+) –2
(V+) –1
Output Voltage Swing (V)
(V+) –4
(V+) –6
Sourcing
Current
(V+) –8
(V+) –10
(V–) +10
(V–) +8
(V–) +6
Sinking
Current
(V–) +4
Positive Swing
(V+) –2
(V+) –3
(V+) –4
(V–) +4
(V–) +3
Negative Swing
(V–) +2
(V–) +1
(V–) +2
(V–)
(V–)
0
±5
±10
±15
±20
±25
±30
–75
–50
–25
Output Current (mA)
0
25
50
75
100
125
Temperature (°C)
SUPPLY CURRENT vs TEMPERATURE
OUTPUT CURRENT vs TEMPERATURE
35
5
30
Output Current (mA)
Supply Current (mA)
Short-Circuit Current
4
3
25
20
15
Output Current
10
VO = ±35V
5
0
2
–75
–50
–25
0
25
50
75
100
–50
125
–25
0
25
75
50
100
125
Temperature (°C)
Ambient Temperature (°C)
MAXIMUM OUTPUT VOLTAGE SWING
vs FREQUENCY
MAXIMUM POWER DISSIPATION vs TEMPERATURE
0.8
90
Maximum output
without slew-rate
induced distortion.
80
70
No Heat Sink
0.7
Plastic DIP
0.6
Dissipation (W)
Output Voltage (Vp-p)
Output Voltage Swing (V)
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
(V+)
60
50
40
30
0.4
0.1
10
SO-8
0.3
0.2
20
TO-99
0.5
TJ (max)
TO-99: 150°C
DIP, SO: 125°C
0
0
1k
10k
100k
–50
1M
0
25
50
Temperature (°C)
Frequency (Hz)
®
OPA445
–25
6
75
100
125
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±40V, unless otherwise noted.
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
25
20
14
12
10
8
6
4
Typical production
distribution of
packaged units.
20
15
10
5
2
0
–5
–4.5
–4
–3.5
–3
–2.5
–2
–1.5
–1
–0.5
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
0
Offset Voltage (mV)
Offset Voltage Drift (µV/°C)
SMALL-SIGNAL STEP RESPONSE
G = 1, CL = 100pF
LARGE-SIGNAL STEP RESPONSE
G = 1, CL = 100pF
10V/div
50mV/div
2.5µs/div
500ns/div
SMALL-SIGNAL OVERSHOOT
vs LOAD CAPACITANCE
60
50
Overshoot (%)
Percent of Amplifiers (%)
16
Percent of Amplifiers (%)
Typical production
distribution of
packaged units.
18
40
G = –1
30
G = +1
20
G = –2
10
0
10pF
G = 10
100pF
1nF
10nF
Load Capacitance
®
7
OPA445
APPLICATION INFORMATION
Figure 1 shows the OPA445 connected as a basic noninverting amplifier. The OPA445 can be used in virtually
any op amp configuration.
Use offset adjust pins
only to null offset voltage
of op amp—see text.
V+
7
2
Power supply terminals should be bypassed with 0.1µF
capacitors, or greater, near the power supply pins. Be sure
that the capacitors are appropriately rated for the power
supply voltage used.
6
OPA445
1
3
5
10mV Typical
Trim Range
4
(1)
NOTE: (1) 10kΩ to 1MΩ
Trim Potentiometer
(100kΩ recommended).
V–
V+
0.1µF
G = 1+
R1
R2
R1
R2
FIGURE 2. Offset Voltage Trim.
output transistor is equal to the product of the output current
and the voltage across the conducting transistor, VS – VO.
The Safe Operating Area (SOA curve, Figures 3, 4, and 5)
shows the permissible range of voltage and current. The
curves shown represent devices soldered to a circuit board
with no heat sink. Increasing printed circuit trace area or the
use of a heat sink (TO-99 package) can significantly reduce
thermal resistance (θ), resulting in increased output current
for a given output voltage (see “Heat Sink” text).
VO
OPA445
VIN
ZL
0.1µF
V–
FIGURE 1. Offset Voltage Trim.
The safe output current decreases as VS – VO increases.
Output short-circuits are a very demanding case for SOA. A
short-circuit to ground forces the full power supply voltage
(V+ or V–) across the conducting transistor and produces a
typical output current of 25mA. With ±40V power supplies,
this creates an internal dissipation of 1W. This exceeds the
maximum rating and is not recommended. If operation in
this region is unavoidable, a heat sink is required. For further
insight on SOA, consult Application Bulletin AB-039.
POWER SUPPLIES
The OPA445 may be operated from power supplies up to
±45V or a total of 90V with excellent performance. Most
behavior remains unchanged throughout the full operating
voltage range. Parameters which vary significantly with
operating voltage are shown in the typical performance
curves.
Some applications do not require equal positive and negative
output voltage swing. Power supply voltages do not need to
be equal. The OPA445 can operate with as little as 20V
between the supplies and with up to 90V between the
supplies. For example, the positive supply could be set to
80V with the negative supply at –10V, or vice-versa.
SAFE OPERATING AREA
100
OFFSET VOLTAGE TRIM
The OPA445 provides offset voltage trim connections on pins
1 and 5. Offset voltage can be adjusted by connecting a
potentiometer as shown in Figure 2. This adjustment should
be used only to null the offset of the op amp, not to adjust
system offset or offset produced by the signal source. Nulling
system offset could degrade the offset voltage drift behavior
of the op amp. While it is not possible to predict the exact
change in drift, the effect is usually small.
Output Current (mA)
TA = 25°C
10
TA = 85°C
TA = 120°C
1
TA + (|VS| – |VO|) IO θJA ≤ TJ (max)
θJA = 100°C/W
TJ (max) = 125°C
0.1
1
SAFE OPERATING AREA
Stress on the output transistors is determined both by the
output current and by the output voltage across the conducting output transistors, VS – VO. The power dissipated by the
5
10
20
|VS| – |VO| (V)
FIGURE 3. 8-Pin DIP Safe Operating Area.
®
OPA445
2
8
50
100
HEAT SINKING
SAFE OPERATING AREA
Power dissipated in the OPA445 will cause the junction
temperature to rise. For reliable operation junction temperature should be limited to 125°C, maximum (150°C for
TO-99 package). Some applications will require a heat sink
to assure that the maximum operating junction temperature
is not exceeded. In addition, the junction temperature should
be kept as low as possible for increased reliability. Junction
temperature can be determined according to the following
equation:
TJ = TA + PD θJA
Output Current (mA)
100
TA = 25°C
10
TA = 85°C
TA = 120°C
1
TA + (|VS| – |VO|) IO θJA ≤ TJ (max)
θJA = 150°C/W
TJ (max) = 125°C
0.1
1
2
5
10
20
50
Package thermal resistance, θJA, is affected by mounting
techniques and environments. Poor air circulation and use of
sockets can significantly increase thermal resistance. Best
thermal performance is achieved by soldering the op amp into
a circuit board with wide printed circuit traces to allow greater
conduction through the op amp leads. Simple clip-on heat
sinks (such as Thermalloy 2257) can reduce the thermal
resistance of the TO-99 metal package by as much as 50°C/W.
For additional information on determining heat sink requirements, consult Applications Bulletin AB-038.
100
|VS| – |VO| (V)
FIGURE 4. SO-8 Safe Operating Area.
SAFE OPERATING AREA
Output Current (mA)
100
TA = 25°C
10
TA = 125°C
CAPACITIVE LOADS
The dynamic characteristics of the OPA445 have been
optimized for commonly encountered gains, loads, and operating conditions. The combination of low closed-loop gain
and capacitive load will decrease the phase margin and may
lead to gain peaking or oscillations. Figure 6 shows a circuit
which preserves phase margin with capacitive load. The
circuit does not suffer a voltage drop due to load current,
however, input impedance is reduced at high frequencies.
Consult Application Bulletin AB-028 for details of analysis
techniques and application circuits.
TA = 85°C
TA + (|VS| – |VO|) IO θJA ≤ TJ (max)
θJA = 200°C/W (No Heat Sink*)
TJ (max) = 150°C
*Simple clip-on heatsinks can
reduce θ by as much as 50°C/W.
1
0.1
1
2
5
10
20
50
100
|VS| – |VO| (V)
FIGURE 5. TO-99 Safe Operating Area.
POWER DISSIPATION
Power dissipation depends on power supply, signal, and load
conditions. For dc signals, power dissipation is equal to the
product of the output current times the voltage across the
conducting output transistor, PD = IL (VS – VO). Power
dissipation can be minimized by using the lowest possible
power supply voltage necessary to assure the required output
voltage swing.
R1
R2
2kΩ
2kΩ
RC
20Ω
G=1+
R2
R1
CC
0.22µF
OPA445
VO
VIN
For resistive loads, the maximum power dissipation occurs
at a dc output voltage of one-half the power supply voltage.
Dissipation with ac signals is lower. Application Bulletin
AB-039 explains how to calculate or measure dissipation
with unusual loads or signals.
RC =
CC =
The OPA445 can supply output currents of 15mA and
larger. This would present no problem for a standard op amp
operating from ±15V supplies. With high supply voltages,
however, internal power dissipation of the op amp can be
quite large. Operation from a single power supply (or unbalanced power supplies) can produce even larger power dissipation since a large voltage is impressed across the conducting output transistor. Applications with large power dissipation may require a heat sink.
CL
5000pF
R2
2CL X 1010 – (1 + R2 /R1)
CL X 103
RC
NOTE: Design equations and component values are approximate.
User adjustment is required for optimum performance.
FIGURE 6. Driving Large Capacitive Loads.
®
9
OPA445
INCREASING OUTPUT CURRENT
In those applications where the 15mA of output current is
not sufficient to drive the required load, output current can
be increased by connecting two or more OPA445s in parallel
as shown in Figure 7. Amplifier A1 is the “master” amplifier
and may be configured in virtually an op amp circuit.
Amplifier A2, the “slave”, is configured as a unity gain
buffer. Alternatively, external output transistors can be used
to boost output current. The circuit in Figure 8 is capable of
supplying output currents up to 1A.
R1
“MASTER”
OPA445
RS(1)
10Ω
OPA445
“SLAVE”
RL
NOTE: (1) RS resistors minimize the circulating
current that will always flow between the two devices
due to VOS errors.
FIGURE 7. Parallel Amplifiers Increase Output Current
Capability.
R2
+45V
TIP29C
CF
R4
0.2Ω
R3(1)
100Ω
VO
OPA445
VIN
R4
0.2Ω
TIP30C
–45V
NOTE: (1) Provides current limit for OPA445 and allows the amplifier to
drive the load when the output is between 0.7V and –0.7V.
FIGURE 8. External Output Transistors Boost Output Current up to 1 Amp.
®
OPA445
RS(1)
10Ω
VIN
INPUT PROTECTION
The inputs of conventional FET-input op amps should be
protected against destructive currents that can flow when
input FET gate-to-substrate isolation diodes are forwardbiased. This can occur if the input voltage exceeds the power
supplies or there is an input voltage with VS = 0V. Protection
is easily accomplished with a resistor in series with the
input. Care should be taken because the resistance in series
with the input capacitance may affect stability. Many input
signals are inherently current-limited, therefore, a limiting
resistor may not be required.
R1
R2
10
LOAD
TYPICAL APPLICATIONS
R1
100kΩ
R2
10kΩ
V1
+60V
+40V
0.1µF
25kΩ
OPA445
0-2mA
R5
100Ω
–40V
DAC80-CBI-I
OPA445
V2
R3
100kΩ
VO = 0 to +50V
at 10mA
Protects DAC
During Slewing
R4
9.9kΩ
0.1µF
Load
IL
IL = [(V2 – V1)/R5] (R2 /R1)
= (V2 – V1)/1kΩ
–12V
Compliance Voltage Range = ±35V
NOTE: R1 = R3 and R2 = R4 + R5
FIGURE 10. Programmable Voltage Source.
FIGURE 9. Voltage-to-Current Converter.
R1
1kΩ
R3
10kΩ
R2
9kΩ
R4
10kΩ
+45V
+45V
160V
OPA445
VIN
±4V
OPA445
“SLAVE”
Piezo(1)
Crystal
“MASTER”
–45V
–45V
NOTE: (1) For transducers with large capacitance the stabilization
technique described in Figure 6 may be necessary. Be certain that the
“Master” amplifier is stable before stabilizing the “Slave” amplifier.
FIGURE 11. Bridge Circuit Doubles Voltage for Piezo Crystals.
®
11
OPA445
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