Rev.1.1 S-29ZX30A AA CMOS SERIAL E2PROM 2 The S-29ZX30A series are low power 4K/8K-bit E PROM with a low operating voltage range. They are organized as 256-word × 16-bit and 512-word × 16bit, respectively. Each is capable of sequential read, at which time addresses are automatically incremented in 16bit blocks. The instruction code is compatible with the NM93CSXX series. n Features ùLow power consumption Standby : 2.0 µA Max. (VCC=3.6 V) Operating : 0.6 mA Max. (VCC=3.6 V) : 0.4 mA Max. (VCC=2.7 V) ù Endurance : 105 cycles/word ùWide operating voltage range Write : 0.9 to 3.6 V Read : 0.9 to 3.6 V ù S-29Z430A : 8K bits NM93CSXX series compatible ù Data retention : 10 years ù S-29Z330A : 4K bits NM93CS66 instruction code compatible ùSequential read capable n Pin Assignment 8-pin SOP2 Top view CS SK DI DO 1 2 3 4 8 7 6 5 8-pin SSOP Top view VCC CS SK DI DO NC TEST GND S-29Z330ADFJA S-29Z430ADFJA 1 2 3 4 8 7 6 5 VCC NC TEST GND S-29Z330AFS * See n Dimensions Figure 1 n Pin Functions Table 1 Name Pin Number Function SOP2 SSOP CS 1 1 Chip select input SK 2 2 Serial clock input DI 3 3 Serial data input DO 4 4 Serial data output GND 5 5 Ground TEST 6 6 Test pin (normally kept open) (can be connected to GND or Vcc) NC 7 7 No Connection VCC 8 8 Power supply 1 CMOS SERIAL E2PROM S-29ZX30A n Block Diagram VCC Address decoder Memory array Data register GND Output buffer DO DI Mode decode logic CS SK Clock generator Figure 2 n Instruction Set Table 2 Start Bit Instruction Opo Code Address Data S-29Z330A S-29Z430A READ (Read data) 1 10 A7 to A0 xA8 to A0 D15 to D0 Output* WRITE (Write data) 1 01 A7 to A0 xA8 to A0 D15 to D0 Input ERASE (Erase data) 1 11 A7 to A0 xA8 to A0 EWEN (Program enable) 1 00 11xxxxxx 11xxxxxxxx EWDS (Program disable) 1 00 00xxxxxx 00xxxxxxxx x : Doesn’t matter. * : Addresses are continuously incremented. n Absolute Maximum Ratings Table 3 Parameter 2 Symbol Ratings Unit Power supply voltage VCC -0.3 to +7.0 V Input voltage VIN -0.3 to VCC+0.3 V Output voltage VOUT -0.3 to VCC V Storage temperature under bias Tbias -50 to +95 °C Storage temperature Tstg -65 to +150 °C CMOS SERIAL E2PROM S-29ZX30A n Recommended Operating Conditions Table 4 Parameter Symbol Power supply voltage VCC Conditions Min. Typ. Max. Unit READ/WRITE/ERASE 0.9 -- 3.6 V VCC= 1.8 to 3.6 V 0.8 × Vcc -- Vcc V VCC= 0.9 to 1.8 V 0.9 × Vcc -- Vcc V VCC= 1.8 to 3.6 V 0.0 -- 0.2 × Vcc V VCC= 0.9 to 1.8 V 0.0 -- 0.1 × Vcc V - 40 -- + 85 °C EWEN/EWDS High level input voltage VIH VIL Low level input voltage Operating temperature n Top Pin Capacitance Table 5 Parameter Input Capacitance Output Capacitance n Symbol CIN COUT (Ta=25 °C, f=1.0 MHz, VCC=5 V) Conditions Min. Typ. Max. Unit VIN=0 V 8 pF VOUT=0 V 10 pF Endurance Table 6 Parameter Endurance Symbol Min. Typ. Max. Unit NW 105 cycles/word 3 CMOS SERIAL E2PROM S-29ZX30A n DC Electrical Characteristics Table 7 Parameter Smbl Conditions VCC=2.7 V to 3.6 V VCC=1.8 V to 2.7 V VCC=0.9 to 1.8 V Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit Current consumption (READ) ICC1 DO unloaded 0.6 0.4 0.2 mA Current consumption (PROGRAM) ICC2 DO unloaded 5.0 5.0 5.0 mA Table 8 Parameter Smbl Conditions VCC=2.7 V to 3.6 V Min. ISB Standby current consumption CS=GND DO=Open Connected to VCC or GND Topr=-10 ∼ +70°C CS=GND DO=Open Connected to VCC or GND Topr=-40 ∼ +85°C VCC=0.9 to 1.8 V Min. Min. Typ. Max. Unit Typ. Max. 1.0 1.0 1.0 µA 2.0 2.0 2.0 µA Input leakage current ILI VIN=GND to VCC 0.1 1.0 0.1 1.0 0.1 1.0 µA Output leakage current ILO VOUT=GND to VCC 0.1 1.0 0.1 1.0 0.1 1.0 µA Low level output voltage IOL= 100µA 0.1 0.1 V VOL IOL= 30µA 0.1 0.1 V 0.1 0.1 0.2 V IOH= -100µA VCC-0.7 V IOH= -10µA VCC-0.7 VCC-0.3 VCC-0.3 VCC-0.2 V V IOL= 10µA High level output voltage VOH IOH= -5µA Write enable latch data hold voltage 4 Typ. Max. VCC=1.8 to 2.7 V VDH Only when write disable mode VCC-0.7 0.8 0.8 0.8 V CMOS SERIAL E2PROM S-29ZX30A n AC Electrical Characteristics Table 9 Input pulse voltage 0.1 × VCC to 0.9 × VCC Output reference voltage 0.5 × VCC Output load 100pF Table 10 Parameter Symble Conditions VCC=2.7 to 3.6V Min. Output disable time tHZ1, tHZ2 0 Output enable time tSV 0 Programming time tPR 4.0 tCSS 0.4 CS hold time tCSH 0.4 CS deselect time tCDS 0.2 Data setup time tDS 0.4 Data hold time tDH Output delay 0.4 tPD Clock frequency fSK Clock pulse width Topr=-40 to +85°C Topr=-10 to +70°C 0 Topr=-40 to +85°C 0 Topr=-10 to +70°C 1.0 Topr=-40 to +85°C 1.0 Topr=-10 to +70°C tSKH, tSKL VCC=0.9 to 1.8V Unit Typ. Max. Min. Typ. Max. Min. Typ. Max. CS setup time VCC=1.8 to 2.7 V 1.0 1.0 500 0 500 0 2.0 0.5 0 0.5 0 1.0 10.0 4.0 1.0 0.4 0.8 0.8 2.0 tCSS 10 2.0 250 100 1.0 0 1.0 0 10.0 10 4 8 8 2.0 250 50 µs 50 µs µs µs µs µs 100 µs 10 KHz 5 KHz µs 50 µs 50 µs 10.0 ms µs tCDS CS tSKH tSKL tCSH SK tDS DI tDH tDS tDH Valid data Valid data tPD tPD Hi-Z Hi-Z DO tSV (READ) DO tHZ1 tHZ2 Hi-Z Hi-Z (VERIFY) Figure 3 Read Timing 5 CMOS SERIAL E2PROM S-29ZX30A n Operation Instructions (in the order of start-bit, instruction, address, and data) are latched to DI in synchronization with the rising edge of SK after CS goes high. A start-bit can only be recognized when the high of DI is latched to the rising edge of SK when CS goes from low to high, it is impossible for it to be recognized as long as DI is low, even if there are SK pulses after CS goes high. Any SK pulses input while DI is low are called "dummy clocks." Dummy clocks can be used to adjust the number of clock cycles needed by the serial IC to match those sent out by the CPU. Instruction input finishes when CS goes low, where it must be between commands during tCDS. All input, including DI and SK signals, is ignored while CS is low, which is stand-by mode. 1. Read The READ instruction reads data from a specified address. After A0 is latched at the rising edge of SK, DO output changes from a high-impedance state (Hi-Z) to low level output. Data is continuously output in synchronization with the rise of SK. When all of the data (D15 to D0) in the specified address has been read, the data in the next address can be read with the input of another SK clock. Thus, it is possible for all of the data addresses to be read through the continuous input of SK clocks as long as CS is high. The last address (An žžž A1 A0 = 1 žžž 11) rolls over to the top address (An žžž A1 A0 = 0 žžž 00). CS SK 1 DI 2 1 3 1 4 0 5 A7 6 A6 7 A5 8 A4 9 A3 A2 10 A1 11 13 24 14 25 26 27 28 29 D15 D14 40 41 42 43 44 45 A0 Hi-Z DO 12 0 D15 D14 D13 D2 D1 D0 D13 D2 A7A6A5A4A3A2A1A0+1 D1 D0 D15 D14 Hi-Z D13 A7A6A5A4A3A2A1A0+2 Figure 4 Read Timing (S-29Z330A) CS SK DI DO 1 1 2 1 3 0 4 X 5 A8 Hi-Z 6 A7 7 A6 8 A5 9 A4 10 A3 11 A2 12 A1 13 14 15 16 17 27 28 29 30 31 32 D15 D14 D13 44 45 46 48 D15 D14 49 A0 0 D15 D14 D13 D2 D1 D0 A8A7A6A5A4A3A2A1A0+1 Figure 5 Read Timing (S-29Z430A) 6 43 D2 D1 D0 D13 A8A7A6A5A4A3A2A1A0+2 Hi-Z CMOS SERIAL E2PROM S-29ZX30A 2. Write (WRITE, ERASE) There are two write instructions, WRITE and ERASE. Each automatically begins writing to the non-volatile memory when CS goes low at the completion of the specified clock input. The write operation is completed in 10 ms (tPR Max.), and the typical write period is less than 4 ms. In the S29ZX30A series, it is easy to VERIFY the completion of the write operation in order to minimize the write cycle by setting CS to high and checking the DO pin, which is low during the write operation and high after its completion. This VERIFY procedure can be executed over and over again. There are two methods to detect a change in the DO output. One is to detect a change from low to high setting CS to high, and the other is to detect a change from low to high as a result of repetitious operations of returning the CS to low after setting CS to high and checking the DO output. Because all SK and DI inputs are ignored during the write operation, any input of instruction will also be disregarded. When DO outputs high after completion of the write operation or if it is in the high-impedence state (Hi-Z), the input of instructions is available. Even if the DO pin remains high, it will enter the high-impedence state upon the recognition of a high of DI (start-bit) attached to the rising edge of an SK pulse. (see Figure 3). DI input should be low during the VERIFY procedure. 2.1 WRITE This instruction writes 16-bit data to a specified address. After changing CS to high, input a start-bit, op-code (WRITE), address, and 16-bit data. If there is a data overflow of more than 16 bits, only the last 16-bits of the data is considered valid. Changing CS to low will start the WRITE operation. It is not necessary to make the data "1" before initiating the WRITE operation. tCDS CS SK DI Standby VERIFY 1 2 0 • 3 1 4 5 6 7 8 9 10 11 12 A7 A6 A5 A4 A3 A2 A1 A0 D15 27 D0 tSV tHZ1 Hi-Z DO busy ready Hi-Z tPR Figure 6 WRITE Timing (S-29Z330A) tCDS CS SK DI DO Standby VERIFY 1 • 2 0 3 1 4 5 6 7 8 9 10 11 12 13 14 X A8 A7 A6 A5 A4 A3 A2 A1 A0 D15 29 D0 tSV tHZ1 Hi-Z busy tPR ready Hi-Z Figure 7 WRITE Timing (S-29Z430A) 7 CMOS SERIAL E2PROM S-29ZX30A 2.2 ERASE This command erases 16-bit data in a specified address. After changing CS to high, input a start-bit, op-code (ERASE), and address. It is not necessary to input data. Changing CS to low will start the ERASE operation, which changes every bit of the 16 bit data to "1." tCDS Standby CS SK DI VERIFY 1 2 • 1 3 1 4 5 6 7 8 9 10 A7 A6 A5 A4 A3 A2 A1 11 A0 tSV tHZ1 Hi-Z DO busy ready tPR Hi-Z Figure 8 ERASE Timing (S-29Z330A) tCDS CS SK DI DO Standby VERIFY 1 2 • 1 3 1 4 5 6 7 8 9 10 11 12 X A8 A7 A6 A5 A4 A3 A2 A1 13 A0 tSV tHZ1 Hi-Z busy tPR ready Hi-Z Figure 9 ERASE Timing (S-29Z430A) 3. Write enable (EWEN) and Write disable (EWDS) The EWEN instruction puts the S-29ZX30A series into write enable mode, which accepts WRITE and ERASE instructions. The EWDS instruction puts the S-29ZX30A series into write disable mode, which refuses WRITE and ERASE instructions. The S-29ZX30A series powers on in write disable mode, which protects data against unexpected, erroneous write operations caused by noise and/or CPU malfunctions. It should be kept in write disable mode except when performing write operations. 8 CMOS SERIAL E2PROM S-29ZX30A Standby CS SK 1 DI • 2 3 0 4 5 6 7 8 9 10 11 0 6Xs 11=EWEN 00=EWDS Figure 10 EWEN/EWDS Timing (S-29Z330A) Standby CS SK 1 DI • 2 0 3 4 5 6 7 8 9 10 11 12 13 0 11=EWEN 00=EWDS 8Xs Figure 11 EWEN/EWDS Timing (S-29Z430A) n Receiving a Start-Bit A start bit can be recognized by latching the high level of DI at the rising edge of SK after changing CS to high (Start-bit Recognition). The write operation begins by inputting the write instruction and setting CS to low. The DO pin then outputs low during the write operation and high at its completion by setting CS to high (Verify Operation). Therefore, only after a write operation, in order to accept the next command by having CS go high, will the DO pin switch from a state of highimpedence to a state of data output; but if it recognizes a start-bit, the DO pin returns to a state of high-impedence (see Figure 3). n Three-wire Interface (DI-DO direct connection) Although the normal configuration of a serial interface is a 4-wire interface to CS, SK, DI, and DO, a 3-wire interface is also a possibility by connecting DI and DO. However, since there is a possibility that the DO output from the serial memory IC will interfere with the data output from the CPU with a 3-wire interface, install a resistor between DI and DO in order to give preference to data output from the CPU to DI(See Figure 12). CPU S-29ZX30A SIO DI DO R : 10 to 100 kΩ Figure 12 9 CMOS SERIAL E2PROM S-29ZX30A n Ordering Information S-29ZX30A XXX Package 10 DFJA FS : : SOP2 SSOP (S-29Z330A) Product S-29Z330A S-29Z430A : : 4Kbit 8Kbit CMOS SERIAL E2PROM S-29ZX30A n Characteristics 1. DC Characteristics 1.1 Current consumption (READ) ICC1 -Ambient temperature Ta 1.2 Current consumption (READ) ICC1 -Ambient temperature Ta VCC=3.6 V fsk=500 KHz DATA=0101 VCC=1.8 V fsk=10 KHz DATA=0101 0.4 0.4 ICC1 (mA) ICC1 (mA) 0.2 0.2 0 0 -40 0 Ta (°C) 85 -40 0 1.3 Current consumption (READ) ICC1 -Power supply voltage VCC 1.4 Current consumption (READ) ICC1 -Power supply voltage VCC Ta=25 °C fscl=100 KHz DATA=0101 Ta=25 °C fscl=500 KHz DATA=0101 0.4 0.4 ICC1 (mA) ICC1 (mA) 0.2 0.2 0 0 1 2 3 4 VCC (V) 5 1 6 2 3 4 5 6 VCC (V) 1.5 Current consumption (READ) ICC1 -Power supply voltage VCC 1.6 Current consumption (WRITE) ICC2 -Ambient temperature Ta Ta=25 °C fscl=10 KHz DATA=0101 Vcc=3.6 V 2.0 0.4 ICC2 (mA) ICC1 (mA) 1.0 0.2 0 0 1 2 4 5 VCC (V) 3 -40 6 1.7 Current consumption (WRITE) ICC2 -Power supply voltage VCC -6 10 ISB (A) 2.0 ICC2 (mA) 1.0 1 2 3 4 5 VCC (V) 6 Vcc=3.6 V -7 10 -8 10 -9 10 -10 10 10 0 0 85 Ta (°C) 1.8 Standby current consumption ISB -Ambient temperature Ta Ta=25 °C 11 85 Ta (°C) -11 -40 0 Ta (°C) 85 CMOS SERIAL E2PROM S-29ZX30A 1.9 Input leakage current ILI -Ambient temperature Ta 1.10 Input leakage current ILI -Ambient temperature Ta Vcc=3.6 V CS,SK,DI=0 V Vcc=3.6 V CS,SK,DI=3.6 V 1.0 1.0 ILI (µA) ILI (µA) 0.5 0.5 0 0 -40 0 Ta (°C) 85 1.11 Output leakage current ILO -Ambient temperature Ta -40 85 1.12 Output leakage current ILO -Ambient temperature Ta Vcc=3.6 V DO=0 V Vcc=3.6 V DO=3.6 V 1.0 1.0 ILO (µA) ILI (µA) 0.5 0.5 0 0 -40 0 85 -40 Ta (°C) 85 1.14 High level output voltage VOH -Ambient temperature Ta Vcc=2.7 V IOH=100 uA 2.8 0 Ta (°C) 1.13 High level output voltage VOH -Ambient temperature Ta 1.0 VOH (V) Vcc=0.9 V IOH=5 uA VOH (V) 2.7 0.9 2.6 0.8 -40 0 85 -40 Ta (°C) 1.15 Low level output voltage VOL -Ambient temperature Ta VOL (V) 0 85 Ta (°C) 1.16 Low level output voltage VOL -Ambient temperature Ta Vcc=1.8 V IOL=100 uA 0.03 0.03 Vcc=0.9 V IOL=10 uA VOL (V) 0.02 0.02 0.01 0.01 -40 12 0 Ta (°C) 0 85 Ta (°C) -40 0 Ta (°C) 85 CMOS SERIAL E2PROM S-29ZX30A 2. AC Characteristics 2.1 Maximum operating frequency fmax -Power supply voltage VCC 2.2 Program time tPR -Power supply voltage VCC Ta=25 °C Ta=25 °C 6 fmax (Hz) tWR (ms) 1M 4 100K 2 10K 1 2 3 4 5 1 2 VCC (V) 3 4 5 VCC (V) 2.3 Program time tPR -Ambient temperature Ta 2.4 Program time tPR -Ambient temperature Ta VCC=0.9 V VCC=3.6 V 6 6 tWR (ms) tWR (ms) 4 4 2 2 -40 0 85 -40 0 85 Ta (°C) Ta (°C) 2.5 Data output delay time tPD -Ambient temperature Ta 2.6 Data output delay time tPD -Ambient temperature Ta VCC=2.7 V VCC=1.8 V 0.6 0.6 tPD (µs) tPD (µs) 0.4 0.4 0.2 0.2 -40 0 85 Ta (°C) -40 0 85 Ta (°C) 2.7 Data output delay time tPD -Ambient temperature Ta VCC=0.9 V 30 tPD (µs) 20 10 -40 0 85 Ta (°C) 13 FS008-A 990531 8-pin SSOP Unit:mm Dimensions 3.1±0.3 8 5 1 4 0.22±0.1 0.65 Reel Specifications Taping Specifications 1 reel holds 2000 ICs. 2.0 0.05 1.55 0.05 13.5 0.5 4.0 0.1 0.3 0.05 1.55 0.05 1.4 0.1 (4.0) R135 6.9 0.1 Winding core FJ008-A 990531 8-pin SOP Unit:mm Dimensions 4.90(4.95max) 8 5 1 4 1.27 0.20±0.05 0.4±0.05 Taping Specifications Reel Specifications 4.0±0.1(10 pitches 40.0 0.2) 2.0±0.05 ø1.55±0.05 0.3±0.05 60° 5 max. ø2.0±0.05 8.0±0.1 2.1±0.1 6.7±0.1 2±0.5 13.5±0.5 Winding core 1 8 4 5 ø21±0.8 Feed direction 2±0.5 ø13±0.2 29Z Markings 8-pin SOP (6 is blank) 8-pin SSOP 5 6 1 2 3 4 7 8 9 (10) (1 and 5 are blank) 990603 • • • • The information herein is subject to change without notice. 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