SII S-93C56BR0I

S-93C46B/56B/66B
3-WIRE SERIAL E2PROM
www.sii-ic.com
Rev.7.0_00
© Seiko Instruments Inc., 2002-2010
The S-93C46B/56B/66B is a 3-wire, high speed, low current consumption, 1/2/4 K-bit serial E2PROM with a wide
operating voltage range. It is organized as 64-word × 16-bit, 128-word × 16-bit, 256-word × 16-bit, respectively. Each is
capable of sequential read, at which time addresses are automatically incremented in 16-bit blocks.
The communication method is by the Microwire bus.
„ Features
• Low current consumption
Standby:
Read:
• Wide operating voltage range
Read:
Write:
1.5 μA Max. (VCC = 5.5 V)
0.8 mA Max. (VCC = 5.5 V)
0.4 mA Max. (VCC = 2.5 V)
1.8 to 5.5 V
2.7 to 5.5 V
• Sequential read capable
• Write protect function during the low power supply voltage
• Function to protect against write due to erroneous instruction recognition
• Endurance:
106 cycles/word*1 (at +85°C)
• Data retention:
100 years (at +25°C)
20 years (at +85°C)
• S-93C46B:
1 K-bit
• S-93C56B:
2 K-bit
• S-93C66B:
4 K-bit
• Lead-free, Sn 100%, halogen-free*2
*1. For each address (Word: 16-bit)
*2. Refer to “„ Product Name Structure” for details.
„ Packages
• 8-Pin DIP
• 8-Pin SOP (JEDEC)
• 8-Pin TSSOP
• SNT-8A
• TMSOP-8
Caution
This product is intended to use in general electronic devices such as consumer electronics, office
equipment, and communications devices. Before using the product in medical equipment or
automobile equipment including car audio, keyless entry and engine control unit, contact to SII is
indispensable.
Seiko Instruments Inc.
1
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
„ Pin Configurations
Table 1
8-Pin DIP
Top view
Pin No.
CS
1
8
VCC
SK
2
7
NC
DI
3
6
TEST
DO
4
5
GND
Figure 1
S-93C46BD0I-D8S1G
S-93C56BD0I-D8S1G
S-93C66BD0I-D8S1G
Symbol
1
CS
Chip select input
2
SK
Serial clock input
3
DI
Serial data input
4
DO
Serial data output
5
GND
Ground
TEST*1
6
Test
7
NC
No connection
8
VCC
Power supply
*1. Connect to GND or VCC.
Even if this pin is not connected, performance is not affected so
long as the absolute maximum rating is not exceeded.
Table 2
8-Pin SOP(JEDEC)
Top view
Pin No.
CS
1
8
VCC
SK
2
7
NC
DI
3
6
TEST
DO
4
5
GND
Figure 2
S-93C46BD0I-J8T1x
S-93C56BD0I-J8T1x
S-93C66BD0I-J8T1x
2
Description
Symbol
Description
1
CS
Chip select input
2
SK
Serial clock input
3
DI
Serial data input
4
DO
Serial data output
5
GND
Ground
TEST*1
6
Test
7
NC
No connection
8
VCC
Power supply
*1. Connect to GND or VCC.
Even if this pin is not connected, performance is not affected so
long as the absolute maximum rating is not exceeded.
Seiko Instruments Inc.
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
Table 3
8-Pin SOP(JEDEC) (Rotated)
Top view
Pin No.
NC
1
8
TEST
VCC
2
7
GND
CS
3
6
DO
SK
4
5
DI
Figure 3
S-93C46BR0I-J8T1x
S-93C56BR0I-J8T1x
S-93C66BR0I-J8T1x
Symbol
Table 4
8-Pin TSSOP
Top view
Pin No.
CS
SK
DI
DO
1
2
3
4
8
7
6
5
Figure 4
S-93C46BD0I-T8T1x
S-93C56BD0I-T8T1x
S-93C66BD0I-T8T1x
Description
1
NC
No connection
2
VCC
Power supply
3
CS
Chip select input
4
SK
Serial clock input
5
DI
Serial data input
6
DO
Serial data output
7
GND
Ground
TEST*1
8
Test
*1. Connect to GND or VCC.
Even if this pin is not connected, performance is not affected so long
as the absolute maximum rating is not exceeded.
VCC
NC
TEST
GND
Symbol
Description
1
CS
Chip select input
2
SK
Serial clock input
3
DI
Serial data input
4
DO
Serial data output
5
GND
Ground
TEST*1
6
Test
7
NC
No connection
8
VCC
Power supply
*1. Connect to GND or VCC.
Even if this pin is not connected, performance is not affected so long
as the absolute maximum rating is not exceeded.
Seiko Instruments Inc.
3
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
Table 5
SNT-8A
Top view
Pin No.
CS 1
8 VCC
SK 2
7 NC
DI 3
DO 4
6 TEST
5 GND
Figure 5
S-93C46BD0I-I8T1x
S-93C56BD0I-I8T1x
S-93C66BD0I-I8T1x
Symbol
Description
1
CS
Chip select input
2
SK
Serial clock input
3
DI
Serial data input
4
DO
Serial data output
5
GND
Ground
TEST*1
6
Test
7
NC
No connection
8
VCC
Power supply
*1. Connect to GND or VCC.
Even if this pin is not connected, performance is not affected so long as
the absolute maximum rating is not exceeded.
Remark See Dimensions for details of the package drawings.
Table 6
TMSOP-8
Top view
Pin No.
CS
1
8
VCC
SK
2
7
NC
DI
3
6
TEST
DO
4
5
GND
Figure 6
S-93C46BD0I-K8T3U
S-93C56BD0I-K8T3U
S-93C66BD0I-K8T3U
Symbol
Description
1
CS
Chip select input
2
SK
Serial clock input
3
DI
Serial data input
4
DO
Serial data output
5
GND
Ground
TEST*1
6
Test
7
NC
No connection
8
VCC
Power supply
*1. Connect to GND or VCC.
Even if this pin is not connected, performance is not affected so long
as the absolute maximum rating is not exceeded.
Remark 1. See Dimensions for details of the package drawings.
2. x: G or U
3. Please select products of environmental code = U for Sn 100%, halogen-free products.
4
Seiko Instruments Inc.
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
„ Block Diagram
Memory array
VCC
Address
decoder
Data register
GND
Output buffer
DO
DI
Mode decode logic
CS
Clock pulse
monitoring circuit
SK
Voltage detector
Clock generator
Figure 7
Seiko Instruments Inc.
5
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
„ Instruction Sets
1. S-93C46B
Table 7
Instruction
Start Bit
SK input clock
1
Operation
Code
2
3
Address
Data
4
5
6
7
8
9
READ (Read data)
WRITE (Write data)
ERASE (Erase data)
1
1
1
1
0
1
0
1
1
A5
A5
A4
A4
A3
A3
A2
A2
A1
A1
A0
A0
D15 to D0 Output*1
D15 to D0 Input
A5
A4
A3
A2
A1
A0
WRAL (Write all)
ERAL (Erase all)
1
0
0
0
1
x
x
x
x
⎯
D15 to D0 Input
1
0
0
1
0
x
x
x
x
⎯
EWEN (Write enable)
1
0
0
1
1
x
x
x
x
⎯
EWDS (Write disable)
1
0
0
0
0
x
x
x
x
⎯
*1.
10 to 25
When the 16-bit data in the specified address has been output, the data in the next address is output.
Remark x: Don’t care
2. S-93C56B
Table 8
Instruction
SK input clock
Start Bit
1
Operation
Code
2
3
Address
Data
READ (Read data)
1
1
0
4
x
5
A6
6
A5
7
A4
8
A3
9
A2
10
A1
11
A0
WRITE (Write data)
ERASE (Erase data)
1
1
0
1
1
1
x
x
A6
A6
A5
A5
A4
A4
A3
A3
A2
A2
A1
A1
A0
A0
x
x
x
x
x
x
x
x
x
x
12 to 27
D15 to D0 Output*1
D15 to D0 Input
⎯
D15 to D0 Input
WRAL (Write all)
ERAL (Erase all)
1
1
0
0
0
0
0
1
1
0
x
x
EWEN (Write enable)
1
0
0
1
1
x
x
x
x
x
x
⎯
EWDS (Write disable)
1
0
0
0
0
x
x
x
x
x
x
⎯
*1.
⎯
When the 16-bit data in the specified address has been output, the data in the next address is output.
Remark x: Don’t care
3. S-93C66B
Table 9
Instruction
Start Bit
SK input clock
1
Operation
Code
2
3
Address
READ (Read data)
1
1
0
4
A7
WRITE (Write data)
ERASE (Erase data)
1
1
0
1
1
1
A7
A7
A6
A6
A5
A5
A4
A4
A3
A3
A2
A2
A1
A1
A0
A0
WRAL (Write all)
ERAL (Erase all)
1
1
0
0
0
0
0
1
1
0
x
x
x
x
x
x
x
x
x
x
x
x
5
A6
6
A5
7
A4
8
A3
9
A2
10
A1
11
A0
x
x
x
x
x
⎯
x
x
x
x
x
⎯
EWEN (Write enable)
1
0
0
1
1
x
EWDS (Write disable)
1
0
0
0
0
x
*1.
12 to 27
D15 to D0 Output*1
D15 to D0 Input
⎯
D15 to D0 Input
When the 16-bit data in the specified address has been output, the data in the next address is output.
Remark x: Don’t care
6
Data
Seiko Instruments Inc.
⎯
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
„ Absolute Maximum Ratings
Table 10
Item
Symbol
Ratings
Unit
Power supply voltage
VCC
−0.3 to +7.0
V
Input voltage
VIN
−0.3 to VCC +0.3
V
Output voltage
VOUT
−0.3 to VCC
V
Operating ambient temperature
Topr
−40 to +105
°C
Storage temperature
Tstg
−65 to +150
°C
Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical
damage. These values must therefore not be exceeded under any conditions.
„ Recommended Operating Conditions
Table 11
Item
Symbol
Power supply voltage
VCC
High level input voltage
VIH
Low level input voltage
VIL
(Ta = −40 to +85°C unless otherwise specified)
Conditions
Min.
Max.
Unit
READ, EWDS
1.8
5.5
V
WRITE, ERASE,
2.7
5.5
V
WRAL, ERAL, EWEN
VCC = 4.5 to 5.5 V
2.0
VCC
V
VCC = 2.7 to 4.5 V
0.8 × VCC
VCC
V
VCC = 1.8 to 2.7 V
0.8 × VCC
VCC
V
VCC = 4.5 to 5.5 V
0.0
0.8
V
VCC = 2.7 to 4.5 V
0.0
0.2 × VCC
V
VCC = 1.8 to 2.7 V
0.0
0.15 × VCC
V
„ Pin Capacitance
Table 12
Item
Input Capacitance
Output Capacitance
Symbol
CIN
COUT
Conditions
VIN = 0 V
VOUT = 0 V
(Ta = +25°C, f = 1.0 MHz, VCC = 5.0 V)
Min.
Max.
Unit
⎯
8
pF
⎯
10
pF
„ Endurance
Table 13
Item
Symbol
Operating Ambient Temperature
Endurance
NW
−40 to +85°C
*1. For each address (Word: 16 bits)
Min.
106
Max.
⎯
Unit
cycles/word*1
Min.
100
20
Max.
⎯
⎯
Unit
year
year
„ Data Retention
Table 14
Item
Data retention
Symbol
−
Operation Ambient Temperature
+25°C
−40 to +85°C
Seiko Instruments Inc.
7
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
„ DC Electrical Characteristics
Table 15
Item
Symbol
Current consumption
(READ)
ICC1
Conditions
(Ta = −40 to +85°C unless otherwise specified)
VCC = 4.5 to 5.5 V VCC = 2.5 to 4.5 V VCC = 1.8 to 2.5 V
Unit
Min.
Max.
Min.
Max.
Min.
Max.
⎯
DO no load
⎯
0.8
0.5
⎯
0.4
mA
Table 16
Item
Symbol
Current consumption
(WRITE)
ICC2
(Ta = −40 to +85°C unless otherwise specified)
VCC = 4.5 to 5.5 V
VCC = 2.7 to 4.5 V
Unit
Min.
Max.
Min.
Max.
Conditions
⎯
DO no load
⎯
2.0
1.5
mA
Table 17
Item
Standby current
consumption
Input leakage
current
Output leakage
current
Low level output
voltage
Symbol
ISB
CS = GND, DO = Open,
Other inputs to VCC or GND
⎯
1.5
⎯
1.5
⎯
1.5
μA
ILI
VIN = GND to VCC
⎯
1.0
⎯
1.0
⎯
1.0
μA
ILO
VOUT = GND to VCC
⎯
1.0
⎯
1.0
⎯
1.0
μA
IOL = 2.1 mA
IOL = 100 μA
IOH = −400 μA
IOH = −100 μA
IOH = −10 μA
Only when write
disable mode
⎯
⎯
2.4
VCC− 0.3
VCC− 0.2
0.4
0.1
⎯
⎯
⎯
⎯
⎯
⎯
VCC− 0.3
VCC− 0.2
⎯
0.1
⎯
⎯
⎯
⎯
⎯
⎯
⎯
VCC− 0.2
⎯
0.1
⎯
⎯
⎯
V
V
V
V
V
1.5
⎯
1.5
⎯
1.5
⎯
V
VOL
High level output
VOH
voltage
Write enable latch
VDH
data hold voltage
8
Conditions
(Ta = −40 to +85°C unless otherwise specified)
VCC =
VCC =
VCC =
4.5 to 5.5 V
2.5 to 4.5 V
1.8 to 2.5 V Unit
Min.
Max.
Min.
Max.
Min. Max.
Seiko Instruments Inc.
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
„ AC Electrical Characteristics
Table 18
Measurement Conditions
0.1 × VCC to 0.9 × VCC
Input pulse voltage
0.5 × VCC
Output reference voltage
Output load
100 pF
Table 19
(Ta = −40 to +85°C unless otherwise specified)
Item
Symbol
VCC = 4.5 to 5.5 V VCC = 2.5 to 4.5 V VCC = 1.8 to 2.5 V
Min.
Max.
Min.
Max.
Min.
Max.
Unit
CS setup time
tCSS
0.2
⎯
0.4
⎯
1.0
⎯
μs
CS hold time
tCSH
0
⎯
0
⎯
0
⎯
μs
CS deselect time
tCDS
0.2
⎯
0.2
⎯
0.4
⎯
μs
Data setup time
tDS
0.1
⎯
0.2
⎯
0.4
⎯
μs
Data hold time
tDH
0.1
⎯
0.2
⎯
0.4
⎯
μs
Output delay time
tPD
⎯
0.4
⎯
0.8
⎯
2.0
μs
Clock frequency*1
0
2.0
0
0.5
0
0.25
MHz
fSK
SK clock time “L” *1
0.1
⎯
0.5
⎯
1.0
⎯
μs
tSKL
SK clock time “H” *1
0.1
⎯
0.5
⎯
1.0
⎯
μs
tSKH
Output disable time
tHZ1, tHZ2
0
0.15
0
0.5
0
1.0
μs
Output enable time
tSV
0
0.15
0
0.5
0
1.0
μs
*1. The clock cycle of the SK clock (frequency: fSK) is 1/fSK μs. This clock cycle is determined by a
combination of several AC characteristics, so be aware that even if the SK clock cycle time is minimized,
the clock cycle (1/fSK) cannot be made equal to tSKL(Min.) + tSKH(Min.).
Table 20
Item
Write time
Symbol
tPR
Min.
⎯
Seiko Instruments Inc.
(Ta = −40 to +85°C unless otherwise specified)
VCC = 2.7 to 5.5 V
Unit
Typ.
Max.
4.0
8.0
ms
9
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
1/fSK
tCSS
*2
tCDS
CS
tSKH
tCSH
tSKL
SK
tDS
DI
tDH
tDS
Valid data
Valid data
tPD
tPD
DO
High-Z
(READ)
DO
tDH
*1
High-Z
tSV
tHZ2
tHZ1
High-Z
High-Z
(VERIFY)
*1.
*2.
Indicates high impedance.
1/fSK is the SK clock cycle. This clock cycle is determined by a combination of several AC characteristics,
so be aware that even if the SK clock cycle time is minimized, the clock cycle (1/fSK) cannot be made equal
to tSKL(Min.) + tSKH(Min.).
Figure 8
10
Timing Chart
Seiko Instruments Inc.
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
„ Operation
All instructions are executed by inputting DI in synchronization with the rising edge of SK after CS goes high. An
instruction set is input in the order of start bit, instruction, address, and data.
Instruction input finishes when CS goes low. A low level must be input to CS between commands during tCDS.
While a low level is being input to CS, the S-93C46B/56B/66B is in standby mode, so the SK and DI inputs are
invalid and no instructions are allowed.
„ Start Bit
A start bit is recognized when the DI pin goes high at the rise of SK after CS goes high.
bit is not recognized even if the SK pulse is input as long as the DI pin is low.
1.
After CS goes high, a start
Dummy clock
SK clocks input while the DI pin is low before a start bit is input are called dummy clocks. Dummy clocks are
effective when aligning the number of instruction sets (clocks) sent by the CPU with those required for serial
memory operation. For example, when a CPU instruction set is 16 bits, the number of instruction set clocks
can be adjusted by inserting a 7-bit dummy clock for the S-93C46B and a 5-bit dummy clock for the S93C56B/66B.
2.
Start bit input failure
• When the output status of the DO pin is high during the verify period after a write operation, if a high level is
input to the DI pin at the rising edge of SK, the S-93C46B/56B/66B recognizes that a start bit has been input.
To prevent this failure, input a low level to the DI pin during the verify operation period (refer to “4.1 Verify
operation”).
• When a 3-wire interface is configured by connecting the DI input pin and DO output pin, a period in which the
data output from the CPU and the serial memory collide may be generated, preventing successful input of the
start bit. Take the measures described in “„ 3-Wire Interface (Direct Connection between DI and DO)”.
Seiko Instruments Inc.
11
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
3.
Rev.7.0_00
Reading (READ)
The READ instruction reads data from a specified address.
After CS has gone high, input an instruction in the order of the start bit, read instruction, and address. Since
the last input address (A0) has been latched, the output status of the DO pin changes from high impedance
(High-Z) to low, which is held until the next rise of SK. 16-bit data starts to be output in synchronization with
the next rise of SK.
3. 1
Sequential read
After the 16-bit data at the specified address has been output, inputting SK while CS is high automatically
increments the address, and causes the 16-bit data at the next address to be output sequentially. The
above method makes it possible to read the data in the whole memory space. The last address (An yyy
A1 A0 = 1 yyy 1 1) rolls over to the top address (An yyy A1 A0 = 0 yyy 0 0).
CS
SK
1
DI
①
2
1
3
0
4
A5
5
A4
6
A3
7
A2
8
A1
9
11
12
23
24
25
26
27
39
28
40
41
42
43
44
A0
High-Z
DO
10
D15
0
D14
D13
D2
D1
D0
D15
D14
D13
D2
D1
ADRINC
Figure 9
D0
D15
D14
D13
High-Z
ADRINC
Read Timing (S-93C46B)
CS
SK
DI
DO
1
①
2
1
3
0
4
5
A6
High-Z
6
7
8
9
A5
A4
A3
A2
10
A1
11
12
13
14
24
25 26
27
28
29
40
43
44
45
A0
x : S-93C56B
A7: S-93C66B
0
D15 D14 D13
High-Z
D2
D1
D0 D15 D14 D13
ADRINC
Figure 10
12
41 42
Read Timing (S-93C56B, S-93C66B)
Seiko Instruments Inc.
D2
D1
D0 D15 D14 D13
ADRINC
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
4.
Writing (WRITE, ERASE, WRAL, ERAL)
A write operation includes four write instructions: data write (WRITE), data erase (ERASE), chip write (WRAL),
and chip erase (ERAL).
A write instruction (WRITE, ERASE, WRAL, ERAL) starts a write operation to the memory cell when a low level
is input to CS after a specified number of clocks have been input. The SK and DI inputs are invalid during the
write period, so do not input an instruction.
Input an instruction while the output status of the DO pin is high or high impedance (High-Z).
A write operation is valid only in program enable mode (refer to “5. Write enable (EWEN) and write disable
(EWDS)”).
4. 1
Verify operation
A write operation executed by any instruction is completed within 8 ms (write time tPR: typically 4 ms), so if
the completion of the write operation is recognized, the write cycle can be minimized. A sequential
operation to confirm the status of a write operation is called a verify operation.
(1) Operation
After the write operation has started (CS = low), the status of the write operation can be verified by
confirming the output status of the DO pin by inputting a high level to CS again. This sequence is
called a verify operation, and the period that a high level is input to the CS pin after the write operation
has started is called the verify operation period.
The relationship between the output status of the DO pin and the write operation during the verify
operation period is as follows.
• DO pin = low: Writing in progress (busy)
• DO pin = high: Writing completed (ready)
(2) Operation example
There are two methods to perform a verify operation: Waiting for a change in the output status of the
DO pin while keeping CS high, or suspending the verify operation (CS = low) once and then performing
it again to verify the output status of the DO pin. The latter method allows the CPU to perform other
processing during the wait period, allowing an efficient system to be designed.
Caution 1. Input a low level to the DI pin during a verify operation.
2. If a high level is input to the DI pin at the rise of SK when the output status of the DO pin is
high, the S-93C46B/56B/66B latches the instruction assuming that a start bit has been input.
In this case, note that the DO pin immediately enters a high-impedance
(High-Z) state.
Seiko Instruments Inc.
13
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
4. 2
Rev.7.0_00
Writing data (WRITE)
To write 16-bit data to a specified address, change CS to high and then input the WRITE instruction,
address, and 16-bit data following the start bit. The write operation starts when CS goes low. There is no
need to set the data to 1 before writing. If the clocks more than the specified number have been input, the
clock pulse monitoring circuit cancels the WRITE instruction. For details of the clock pulse monitoring
circuit, refer to “„ Function to Protect Against Write due to Erroneous Instruction Recognition”.
tCDS
CS
Standby
Verify
SK
1
DI
c
2
3
0
1
4
5
6
7
8
9
10
A5
A4
A3
A2
A1
A0
D15
25
D0
tHZ1
tSV
High-Z
DO
busy
ready
High-Z
tPR
Figure 11
Data Write Timing (S-93C46B)
tCDS
CS
SK
DI
1
c
2
0
3
1
4
5
6
7
8
9
10
11
12
27
A6
A5
A4
A3
A2
A1
A0
D15
D0
High-Z
DO
tSV
x : S-93C56B
A7: S-93C66B
Figure 12
14
Standby
Verify
Data Write Timing (S-93C56B, S-93C66B)
Seiko Instruments Inc.
tHZ1
busy
tPR
ready
High-Z
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
4. 3
Erasing data (ERASE)
To erase 16-bit data at a specified address, set all 16 bits of the data to 1, change CS to high, and then
input the ERASE instruction and address following the start bit. There is no need to input data. The data
erase operation starts when CS goes low. If the clocks more than the specified number have been input,
the clock pulse monitoring circuit cancels the ERASE instruction. For details of the clock pulse monitoring
circuit, refer to “„ Function to Protect Against Write due to Erroneous Instruction Recognition”.
tCDS
CS
Standby
Verify
SK
1
2
DI
c
1
3
1
4
5
6
7
8
A5
A4
A3
A2
A1
9
A0
tSV
High-Z
busy
DO
tHZ1
ready
High-Z
tPR
Figure 13
Data Erase Timing (S-93C46B)
tCDS
CS
SK
DI
Standby
Verify
1
c
2
1
3
1
4
5
6
7
8
9
A6
A5
A4
A3
A2
10
A1
11
A0
tSV
High-Z
DO
x : S-93C56B
A7: S-93C66B
Figure 14
busy
tPR
tHZ1
ready
High-Z
Data Erase Timing (S-93C56B, S-93C66B)
Seiko Instruments Inc.
15
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
4. 4
Rev.7.0_00
Writing to chip (WRAL)
To write the same 16-bit data to the entire memory address space, change CS to high, and then input the
WRAL instruction, an address, and 16-bit data following the start bit. Any address can be input. The
write operation starts when CS goes low. There is no need to set the data to 1 before writing. If the clocks
more than the specified number have been input, the clock pulse monitoring circuit cancels the WRAL
instruction. For details of the clock pulse monitoring circuit, refer to “„ Function to Protect Against
Write due to Erroneous Instruction Recognition”.
tCDS
CS
Standby
Verify
SK
1
2
DI
c
0
3
4
0
5
0
6
7
8
9
1
10
25
D0
D15
tSV
4Xs
High-Z
DO
busy
tHZ1
ready
High-Z
tPR
Figure 15
Chip Write Timing (S-93C46B)
tCDS
CS
SK
1
2
DI
c
0
DO
3
0
4
0
5
6
7
8
9
10
1
6Xs
High-Z
11
12
27
D15
D0
tSV
tHZ1
busy
tPR
Figure 16
16
Standby
Verify
Chip Write Timing (S-93C56B, S-93C66B)
Seiko Instruments Inc.
ready
High-Z
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
4. 5
Erasing chip (ERAL)
To erase the data of the entire memory address space, set all the data to 1, change CS to high, and then
input the ERAL instruction and an address following the start bit. Any address can be input. There is no
need to input data. The chips erase operation starts when CS goes low. If the clocks more than the
specified number have been input, the clock pulse monitoring circuit cancels the ERAL instruction. For
details of the clock pulse monitoring circuit, refer to “„ Function to Protect Against Write due to
Erroneous Instruction Recognition”.
CS
SK
1
2
3
4
DI
c
0
0
1
5
6
7
8
9
0
tSV
4Xs
tHZ1
High-Z
DO
Standby
Verify
tCDS
busy
ready
High-Z
tPR
Figure 17
Chip Erase Timing (S-93C46B)
CS
Standby
Verify
tCDS
SK
1
2
3
4
DI
c
0
0
1
5
6
7
8
9
11
0
6Xs
DO
10
tSV
tHZ1
High-Z
busy
ready
High-Z
tPR
Figure 18
Chip Erase Timing (S-93C56B, S-93C66B)
Seiko Instruments Inc.
17
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
5.
Rev.7.0_00
Write enable (EWEN) and write disable (EWDS)
The EWEN instruction is an instruction that enables a write operation. The status in which a write operation is
enabled is called the program enable mode.
The EWDS instruction is an instruction that disables a write operation. The status in which a write operation is
disabled is called the program disable mode.
After CS goes high, input an instruction in the order of the start bit, EWEN or EWDS instruction, and address
(optional). Each mode becomes valid by inputting a low level to CS after the last address (optional) has been
input.
Standby
CS
SK
1
DI
c
2
3
0
4
5
6
7
8
9
0
4Xs
11 = EWEN
00 = EWDS
Figure 19
Write Enable/Disable Timing (S-93C46B)
CS
Standby
SK
1
DI
c
2
0
3
4
5
7
8
9
10
11
0
11 = EWEN
00 = EWDS
Figure 20
6
6Xs
Write Enable/Disable Timing (S-93C56B, S-93C66B)
(1) Recommendation for write operation disable instruction
It is recommended to implement a design that prevents an incorrect write operation when a write instruction
is erroneously recognized by executing the write operation disable instruction when executing instructions
other than write instruction, and immediately after power-on and before power off.
18
Seiko Instruments Inc.
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
„ Write Protect Function during the Low Power Supply Voltage
The S-93C46B/56B/66B provides a built-in detector. When the power supply voltage is low or at power application,
the write instructions (WRITE, ERASE, WRAL, and ERAL) are cancelled, and the write disable state (EWDS) is
automatically set. The detection voltage is 1.75 V typ., the release voltage is 2.05 V typ., and there is a hysteresis of
about 0.3 V (refer to Figure 21). Therefore, when a write operation is performed after the power supply voltage has
dropped and then risen again up to the level at which writing is possible, a write enable instruction (EWEN) must be
sent before a write instruction (WRITE, ERASE, WRAL, or ERAL) is executed.
When the power supply voltage drops during a write operation, the data being written to an address at that time is
not guaranteed.
Hysteresis
About 0.3 V
Power supply voltage
Release voltage (+VDET)
2.05 V Typ.
Detection voltage (−VDET)
1.75 V Typ.
Write instruction cancelled
Write disable state (EWDS) automatically set
Figure 21
Operation during Low Power Supply Voltage
Seiko Instruments Inc.
19
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
„ Function to Protect Against Write due to Erroneous Instruction Recognition
The S-93C46B/56B/66B provides a built-in clock pulse monitoring circuit which is used to prevent an erroneous
write operation by canceling write instructions (WRITE, ERASE, WRAL, and ERAL) recognized erroneously due to
an erroneous clock count caused by the application of noise pulses or double counting of clocks.
Instructions are cancelled if a clock pulse more or less than specified number decided by each write operation
(WRITE, ERASE, WRAL, or ERAL) is detected.
<Example> Erroneous recognition of program disable instruction (EWDS) as erase instruction (ERASE)
Example of S-93C46B
Noise pulse
CS
1
2
3
4
5
6
7
8
9
SK
DI
1
Input EWDS instruction
Erroneous recognition as
ERASE instruction due to
0
0
0
0
0
0
0
0
1 1 10
0
0
00
0
0
0
0
noise pulse
In products that do not include a clock pulse monitoring circuit, FFFF is mistakenly written
on address 00h. However the S-93C46B detects the overcount and cancels the instruction
without performing a write operation.
Figure 22
20
Example of Clock Pulse Monitoring Circuit Operation
Seiko Instruments Inc.
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
„ 3-Wire Interface (Direct Connection between DI and DO)
There are two types of serial interface configurations: a 4-wire interface configured using the CS, SK, DI, and DO
pins, and a 3-wire interface that connects the DI input pin and DO output pin.
When the 3-wire interface is employed, a period in which the data output from the CPU and the data output from the
serial memory collide may occur, causing a malfunction. To prevent such a malfunction, connect the DI and DO
pins of the S-93C46B/56B/66B via a resistor (10 to 100 kΩ) so that the data output from the CPU takes precedence
in being input to the DI pin (refer to “Figure 23 Connection of 3-Wire Interface”).
CPU
S-93C46B/56B/66B
SIO
DI
DO
R : 10 to 100 kΩ
Figure 23
Connection of 3-Wire Interface
„ I/O Pin
1.
Connection of input pins
All the input pins of the S-93C46B/56B/66B employ a CMOS structure, so design the equipment so that high
impedance will not be input while the S-93C46B/56B/66B is operating. Especially, deselect the CS input (a low
level) when turning on/off power and during standby. When the CS pin is deselected (a low level), incorrect
data writing will not occur. Connect the CS pin to GND via a resistor (10 to 100 kΩ pull-down resistor). To
prevent malfunction, it is recommended to use equivalent pull-down resistors for pins other than the CS pin.
2.
Equivalent circuit of input and output pin
The following shows the equivalent circuits of input pins of the S-93C46B/56B/66B. None of the input pins
incorporate pull-up and pull-down elements, so special care must be taken when designing to prevent a floating
status.
Output pins are high-level/low-level/high-impedance tri-state outputs. The TEST pin is disconnected from the
internal circuit by a switching transistor during normal operation. As long as the absolute maximum rating is
satisfied, the TEST pin and internal circuit will never be connected.
Seiko Instruments Inc.
21
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
2. 1
Rev.7.0_00
Input pin
CS
Figure 24
CS Pin
SK, DI
Figure 25
SK, DI Pin
Figure 26
TEST Pin
TEST
22
Seiko Instruments Inc.
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
2. 2
Output pin
VCC
DO
Figure 27
3.
DO Pin
Input pin noise elimination time
The S-93C46B/56B/66B include a built-in low-pass filter to eliminate noise at the SK, DI, and CS pins. This
means that if the supply voltage is 5.0 V (at room temperature), noise with a pulse width of 20 ns or less can be
eliminated.
Note, therefore, the noise with a pulse width of more than 20 ns will be recognized as a pulse if the voltage
exceeds VIH/VIL.
„ Precaution
• Do not apply an electrostatic discharge to this IC that exceeds the performance ratings of the built-in electrostatic
protection circuit.
• SII claims no responsibility for any and all disputes arising out of or in connection with any infringement by products
including this IC of patents owned by a third party.
Seiko Instruments Inc.
23
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
„ Characteristics (Typical Data)
1.
DC Characteristics
1. 1
Current consumption (READ) ICC1
vs. ambient temperature Ta
1. 2
Current consumption (READ) ICC1
vs. ambient temperature Ta
VCC = 3.3 V
fSK = 500 kHz
DATA = 0101
VCC = 5.5 V
fSK = 2 MHz
DATA = 0101
0.4
0.4
ICC1
(mA)
ICC1
(mA)
0.2
0
0.2
−40
0
85
0
−40
Ta (°C)
1. 3
85
Ta (°C)
Current consumption (READ) ICC1
vs. ambient temperature Ta
1. 4
Current consumption (READ) ICC1
vs. power supply voltage VCC
Ta = 25°C
fSK = 1 MHz, 500 kHz
DATA = 0101
∼
VCC = 1.8 V
fSK = 10 kHz
DATA = 0101
0.4
0.4
ICC1
(mA)
ICC1
(mA)
0.2
0
0
1 MHz
0.2
500 kHz
−40
0
0
85
2
Ta (°C)
3
4
5
6
VCC (V)
1. 5
Current consumption (READ) ICC1
vs. power supply voltage VCC
1. 6
Current consumption (READ) ICC1
vs. Clock frequency fSK
Ta = 25°C
fSK = 100 kHz, 10 kHz
DATA = 0101
VCC = 5.0 V
Ta = 25°C
0.4
0.4
ICC1
(mA)
ICC1
(mA)
100 kHz
0.2
0.2
0
10 kHz
0
2
3
4
5 6
7
100 k
1 M 2M 10M
fSK (Hz)
VCC (V)
24
10 k
Seiko Instruments Inc.
7
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
1. 7
Current consumption (WRITE) ICC2
vs. ambient temperature Ta
1. 8
Current consumption (WRITE) ICC2
vs. ambient temperature Ta
VCC = 3.3 V
VCC = 5.5 V
1.0
1.0
ICC2
(mA)
ICC2
(mA)
0.5
0.5
0
−40
0
0
85
−40
0
Ta (°C)
Ta (°C)
1. 9
Current consumption (WRITE) ICC2
vs. ambient temperature Ta
1. 10
Current consumption (WRITE) ICC2
vs. power supply voltage VCC
VCC = 2.7 V
Ta = 25°C
1.0
1.0
ICC2
(mA)
ICC2
(mA)
0.5
0.5
0
−40
0
0
85
2
3
Current consumption in standby mode ISB
vs. ambient temperature Ta
1. 12
5 6
7
Current consumption in standby mode ISB
vs. power supply voltage VCC
Ta = 25°C
CS = GND
VCC = 5.5 V
CS = GND
1.0
1.0
ISB
(μA)
ISB
(μA)
0.5
0.5
0
4
VCC (V)
Ta (°C)
1. 11
85
−40
0
0
85
2
3
4
5 6
7
VCC (V)
Ta (°C)
Seiko Instruments Inc.
25
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
1. 13
Rev.7.0_00
Input leakage current ILI
vs. ambient temperature Ta
1. 14
Input leakage current ILI
vs. ambient temperature Ta
VCC = 5.5 V
CS, SK, DI,
TEST = 5.5 V
VCC=5.5 V
CS, SK, DI,
TEST=0 V
1.0
1.0
ILI
(μA)
lLI
(μA)
0.5
0.5
0
0
-40
0
−40
85
Output leakage current ILO
vs. ambient temperature Ta
1. 16
Output leakage current ILO
vs. ambient temperature Ta
VCC = 5.5 V
DO = 5.5 V
VCC = 5.5 V
DO = 0 V
1.0
1.0
ILO
(μA)
ILO
(μA)
0.5
0
0.5
−40
0
0
85
−40
Ta (°C)
1. 17
1. 18
85
High-level output voltage VOH
vs. ambient temperature Ta
VCC = 2.7 V
IOH = −100 μA
2.7
VOH
(V)
4.4
2.6
2.5
4.2
−40
0
−40
85
0
Ta (°C)
Ta (°C)
26
0
Ta (°C)
High-level output voltage VOH
vs. ambient temperature Ta
VCC = 4.5 V
IOH = −400 μA
4.6
VOH
(V)
85
Ta (°C)
Ta (°C)
1. 15
0
Seiko Instruments Inc.
85
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
1. 19
High-level output voltage VOH
vs. ambient temperature Ta
2.5
VOH
(V)
1. 20
High-level output voltage VOH
vs. ambient temperature Ta
VCC = 2.5 V
IOH = −100 μA
1.9
VOH
(V)
2.4
2.3
VCC = 1.8 V
IOH = −10 μA
1.8
1.7
−40
0
−40
85
Ta (°C)
1. 21
VOL
(V)
1. 22
Low-level output voltage VOL
vs. ambient temperature Ta
VCC = 4.5 V
IOL = 2.1 mA
0.03
0.2
VOL 0.02
(V)
0.1
0.01
−40
0
VCC = 1.8 V
IOL = 100 μA
−40
85
0
85
Ta (°C)
Ta (°C)
1. 23
85
Ta (°C)
Low-level output voltage VOL
vs. ambient temperature Ta
0.3
0
High-level output current IOH
vs. ambient temperature Ta
1. 24
High-level output current IOH
vs. ambient temperature Ta
VCC = 4.5 V
VOH = 2.4 V
VCC = 2.7 V
VOH = 2.4 V
−20.0
−2
IOH
(mA)
IOH
(mA)
−10.0
0
−1
−40
0
0
85
Ta (°C)
−40
0
85
Ta (°C)
Seiko Instruments Inc.
27
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
1. 25
Rev.7.0_00
High-level output current IOH
vs. ambient temperature Ta
1. 26
High-level output current IOH
vs. ambient temperature Ta
VCC = 2.5 V
VOH = 2.2 V
VCC = 1.8 V
VOH = 1.6 V
−2
−1.0
IOH
(mA)
IOH
(mA)
−1
0
−0.5
−40
0
0
−40
85
Ta (°C)
1. 27
Low-level output current IOL
vs. ambient temperature Ta
1. 28
Low-level output current IOL
vs. ambient temperature Ta
VCC = 1.8 V
VOL = 0.1 V
1.0
20
IOL
(mA)
IOL
(mA)
0.5
10
0
0
−40
0
Ta (°C)
85
Input inverted voltage VINV
vs. power supply voltage VCC
1. 30
−40
0
Ta (°C)
85
Input inverted voltage VINV
vs. ambient temperature Ta
VCC = 5.0 V
CS, SK, DI
Ta = 25°C
CS, SK, DI
3.0
3.0
VINV
(V)
VINV
(V)
1.5
0
2.0
1
2
3
4 5
6 7
0
−40
0
Ta (°C)
VCC (V)
28
85
Ta (°C)
VCC = 4.5 V
VOL = 0.4 V
1. 29
0
Seiko Instruments Inc.
85
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
1. 31 Low supply voltage detection voltage −VDET
vs. ambient temperature Ta
1. 32 Low supply voltage release voltage +VDET
vs. ambient temperature Ta
2.0
2.0
+VDET
(V)
−VDET
(V)
1.0
0
1.0
−40
0
0
85
−40
0
85
Ta (°C)
Ta (°C)
Seiko Instruments Inc.
29
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
2.
Rev.7.0_00
AC Characteristics
2. 1
Maximum operating frequency fMAX.
vs. power supply voltage VCC
2. 2
Write time tPR
vs. power supply voltage VCC
Ta = 25°C
fMAX.
(Hz)
Ta = 25°C
2M
1M
4
tPR
(ms)
100k
2
10k
1
2
3
4
5
1
2
3
VCC (V)
2. 3
Write time tPR
vs. ambient temperature Ta
2. 4
Write time tPR
vs. ambient temperature Ta
VCC = 5.0 V
VCC = 3.0 V
6
tPR
(ms)
tPR
(ms)
4
4
2
2
−40
0
−40
85
Ta (°C)
0
85
Ta (°C)
Write time tPR
vs. ambient temperature Ta
2. 6
Data output delay time tPD
vs. ambient temperature Ta
VCC = 2.7 V
VCC = 4.5 V
6
0.3
tPR
(ms)
tPD
(μs)
4
0.2
2
0.1
−40
0
85
−40
Ta (°C)
30
5 6
VCC (V)
6
2. 5
4
Seiko Instruments Inc.
0
Ta (°C)
85
7
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
2. 7
Data output delay time tPD
vs. ambient temperature Ta
2. 8
Data output delay time tPD
vs. ambient temperature Ta
VCC = 2.7 V
VCC = 1.8 V
0.6
1.5
tPD
(μs)
tPD
(μs)
0.4
1.0
0.2
0.5
−40
0
−40
85
Ta (°C)
0
85
Ta (°C)
Seiko Instruments Inc.
31
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
„ Product Name Structure
1.
Product name
1. 1
8-Pin SOP (JEDEC), 8-Pin TSSOP, SNT-8A
S-93CxxB
x
0
I
-
xxxx
x
Environmental code
U:
Lead-free (Sn 100%), halogen-free
G:
Lead-free (for details, please contact our sales office)
Package name (abbreviation) and IC packing specifications
J8T1: 8-Pin SOP(JEDEC), Tape
T8T1: 8-Pin TSSOP, Tape
I8T1: SNT-8A, Tape
Operation temperature
I:
−40 to +85°C
Fixed
Pin assignment
D:
8-Pin SOP(JEDEC)
8-Pin TSSOP
SNT-8A
R:
8-Pin SOP(JEDEC) (Rotated)
Product name
S-93C46B : 1 K-bit
S-93C56B : 2 K-bit
S-93C66B : 4 K-bit
1. 2
TMSOP-8
S-93CxxB
D0
I
-
K8T3
U
Environmental code
U:
Lead-free (Sn 100%), halogen-free
Package name (abbreviation) and IC packing specifications
K8T3: TMSOP-8, Tape
Operation temperature
I:
−40 to +85°C
Fixed
Product name
S-93C46B : 1 K-bit
S-93C56B : 2 K-bit
S-93C66B : 4 K-bit
32
Seiko Instruments Inc.
3-WIRE SERIAL E2PROM
S-93C46B/56B/66B
Rev.7.0_00
1. 3
8-Pin DIP
S-93CxxB
D0
I
-
D8S1
G
Environmental code
G:
Lead-free (for details, please contact our sales office)
Package name (abbreviation) and IC packing specifications
D8S1: 8-Pin DIP, Tube
Operation temperature
I:
−40 to +85°C
Fixed
Product name
S-93C46B : 1 K-bit
S-93C56B : 2 K-bit
S-93C66B : 4 K-bit
2.
Package
Package name
8-Pin DIP
8-Pin SOP
(JEDEC)
8-Pin TSSOP
SNT-8A
TMSOP-8
Environmental code = G
Environmental code = U
Environmental code = G
Environmental code = U
Package
DP008-F-P-SD
FJ008-A-P-SD
FJ008-A-P-SD
FT008-A-P-SD
FT008-A-P-SD
PH008-A-P-SD
FM008-A-P-SD
Drawing code
Tape
Reel
⎯
⎯
FJ008-D-C-SD FJ008-D-R-SD
FJ008-D-C-SD
FJ008-D-R-S1
FT008-E-C-SD FT008-E-R-SD
FT008-E-C-SD FT008-E-R-S1
PH008-A-C-SD PH008-A-R-SD
FM008-A-C-SD FM008-A-R-SD
Seiko Instruments Inc.
Land
⎯
⎯
⎯
PH008-A-L-SD
⎯
33
9.6(10.6max.)
8
5
1
4
0.89
7.62
1.3
2.54
0.48±0.1
+0.11
0.25 -0.05
0° to 15°
No. DP008-F-P-SD-3.0
TITLE
DIP8-F-PKG Dimensions
DP008-F-P-SD-3.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
5.02±0.2
8
5
1
4
1.27
0.20±0.05
0.4±0.05
No. FJ008-A-P-SD-2.1
TITLE
No.
SOP8J-D-PKG Dimensions
FJ008-A-P-SD-2.1
SCALE
UNIT
mm
Seiko Instruments Inc.
4.0±0.1(10 pitches:40.0±0.2)
2.0±0.05
ø1.55±0.05
0.3±0.05
ø2.0±0.05
8.0±0.1
2.1±0.1
5°max.
6.7±0.1
1
8
4
5
Feed direction
No. FJ008-D-C-SD-1.1
TITLE
SOP8J-D-Carrier Tape
No.
FJ008-D-C-SD-1.1
SCALE
UNIT
mm
Seiko Instruments Inc.
60°
2±0.5
13.5±0.5
Enlarged drawing in the central part
ø21±0.8
2±0.5
ø13±0.2
No. FJ008-D-R-SD-1.1
TITLE
SOP8J-D-Reel
No.
FJ008-D-R-SD-1.1
SCALE
UNIT
QTY.
mm
Seiko Instruments Inc.
2,000
60°
2±0.5
13.5±0.5
Enlarged drawing in the central part
ø21±0.8
2±0.5
ø13±0.2
No. FJ008-D-R-S1-1.0
TITLE
SOP8J-D-Reel
No.
FJ008-D-R-S1-1.0
SCALE
UNIT
QTY.
mm
Seiko Instruments Inc.
4,000
+0.3
3.00 -0.2
8
5
1
4
0.17±0.05
0.2±0.1
0.65
No. FT008-A-P-SD-1.1
TITLE
TSSOP8-E-PKG Dimensions
FT008-A-P-SD-1.1
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
4.0±0.1
2.0±0.05
ø1.55±0.05
0.3±0.05
+0.1
8.0±0.1
ø1.55 -0.05
(4.4)
+0.4
6.6 -0.2
1
8
4
5
Feed direction
No. FT008-E-C-SD-1.0
TITLE
TSSOP8-E-Carrier Tape
FT008-E-C-SD-1.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
13.4±1.0
17.5±1.0
Enlarged drawing in the central part
ø21±0.8
2±0.5
ø13±0.5
No. FT008-E-R-SD-1.0
TITLE
TSSOP8-E-Reel
No.
FT008-E-R-SD-1.0
SCALE
QTY.
UNIT
mm
Seiko Instruments Inc.
3,000
13.4±1.0
17.5±1.0
Enlarged drawing in the central part
ø21±0.8
2±0.5
ø13±0.5
No. FT008-E-R-S1-1.0
TITLE
TSSOP8-E-Reel
FT008-E-R-S1-1.0
No.
SCALE
UNIT
QTY.
mm
Seiko Instruments Inc.
4,000
1.97±0.03
8
7
6
5
3
4
+0.05
1
0.5
2
0.08 -0.02
0.48±0.02
0.2±0.05
No. PH008-A-P-SD-2.0
TITLE
SNT-8A-A-PKG Dimensions
PH008-A-P-SD-2.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
+0.1
ø1.5 -0
5°
2.25±0.05
4.0±0.1
2.0±0.05
ø0.5±0.1
0.25±0.05
0.65±0.05
4.0±0.1
4 321
5 6 78
Feed direction
No. PH008-A-C-SD-1.0
TITLE
SNT-8A-A-Carrier Tape
PH008-A-C-SD-1.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
12.5max.
9.0±0.3
Enlarged drawing in the central part
ø13±0.2
(60°)
(60°)
No. PH008-A-R-SD-1.0
TITLE
SNT-8A-A-Reel
No.
PH008-A-R-SD-1.0
SCALE
UNIT
QTY.
mm
Seiko Instruments Inc.
5,000
0.52
2.01
0.52
0.3
0.2
0.3
0.2
0.3
0.2
0.3
Caution Making the wire pattern under the package is possible. However, note that the package
may be upraised due to the thickness made by the silk screen printing and of a solder
resist on the pattern because this package does not have the standoff.
No. PH008-A-L-SD-3.0
TITLE
SNT-8A-A-Land Recommendation
PH008-A-L-SD-3.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
2.90±0.2
8
5
1
4
0.13±0.1
0.2±0.1
0.65±0.1
No. FM008-A-P-SD-1.0
TITLE
TMSOP8-A-PKG Dimensions
No.
FM008-A-P-SD-1.0
SCALE
UNIT
mm
Seiko Instruments Inc.
2.00±0.05
4.00±0.1
4.00±0.1
1.00±0.1
+0.1
1.55 -0
1.05±0.05
0.30±0.05
3.25±0.05
4
1
5
8
Feed direction
No. FM008-A-C-SD-1.0
TITLE
TMSOP8-A-Carrier Tape
FM008-A-C-SD-1.0
No.
SCALE
UNIT
mm
Seiko Instruments Inc.
16.5max.
13.0±0.3
Enlarged drawing in the central part
13±0.2
(60°)
(60°)
No. FM008-A-R-SD-1.0
TMSOP8-A-Reel
TITLE
FM008-A-R-SD-1.0
No.
SCALE
UNIT
QTY.
4,000
mm
Seiko Instruments Inc.
www.sii-ic.com
•
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The information described herein is subject to change without notice.
Seiko Instruments Inc. is not responsible for any problems caused by circuits or diagrams described herein
whose related industrial properties, patents, or other rights belong to third parties. The application circuit
examples explain typical applications of the products, and do not guarantee the success of any specific
mass-production design.
When the products described herein are regulated products subject to the Wassenaar Arrangement or other
agreements, they may not be exported without authorization from the appropriate governmental authority.
Use of the information described herein for other purposes and/or reproduction or copying without the
express permission of Seiko Instruments Inc. is strictly prohibited.
The products described herein cannot be used as part of any device or equipment affecting the human
body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus
installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc.
Although Seiko Instruments Inc. exerts the greatest possible effort to ensure high quality and reliability, the
failure or malfunction of semiconductor products may occur. The user of these products should therefore
give thorough consideration to safety design, including redundancy, fire-prevention measures, and
malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.