HD74AC273 Octal D Flip-Flop Description The HD74AC273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition, is transferred to the corresponding flip-flops’s Q output All outputs will be forced Low independently of Clock or Data inputs by a Low voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements. Features • • • • • • • Ideal Buffer for MOS Microprocessor or Memory Eight Edge-Triggered D Flip-Flops Buffered Common Clock Buffered, Asynchronous Master Reset See HD74AC373 for Transparent Latch Version See HD74AC374 for 3-State Version Outputs Source/Sink 24 mA HD74AC273 Pin Arrangement MR 1 20 VCC Q0 2 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 Q3 9 12 Q4 Gnd 10 11 CP (Top view) Logic Symbol D0 D1 D2 D3 D4 D5 D6 D7 CP MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Pin Names D0 – D7 MR CP Q0 – Q7 2 Data Inputs Master Reset Clock Pulse Input Data Outputs HD74AC273 Logic Diagram D0 D1 D2 D3 D4 D5 D6 D7 CP D D Q Q D CP CP RD RD Q D CP Q D CP RD Q D CP RD Q D CP RD Q D CP RD Q CP RD RD MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Mode Select-Truth Table Inputs Outputs Operating Mode MR CP Dn Qn Reset (Clear) L X X L Load “1” H H H Load “0” H L L H : L : X : : High Voltage Level Low Voltage Level Immaterial Low-to-High Clock Transition DC Characteristics (unless otherwise specified) Item Symbol Max Unit Condition Maximum quiescent supply current I CC 80 µA VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case Maximum quiescent supply current I CC 8.0 µA VIN = VCC or ground, VCC = 5.5 V, Ta = 25°C 3 HD74AC273 AC Characteristics: HD74AC273 Ta = +25°C CL = 50 pF Ta = –40°C to +85°C CL = 50 pF Item Symbol VCC (V)*1 Min Typ Max Min Max Unit Maximum clock f max 3.3 90 125 — 75 — MHz 5.0 140 175 — 125 — 3.3 1.0 7.0 12.5 1.0 14.0 5.0 1.0 5.5 9.0 1.0 10.0 3.3 1.0 7.0 13.0 1.0 14.5 5.0 1.0 5.0 10.0 1.0 11.0 3.3 1.0 7.0 13.0 1.0 14.0 5.0 1.0 5.0 10.0 1.0 10.5 frequency Propagation delay t PLH Clock to output Propagation delay t PHL Clock to output Propagation delay t PHL MR to output Note: ns ns ns 1. Voltage Range 3.3 is 3.3 V ± 0.3 V Voltage Range 5.0 is 5.0 V ± 0.5 V AC Operating Requirements: HD74AC273 Ta = –40°C to +85°C CL = 50 pF Ta = +25°C CL = 50 pF Item Symbol VCC (V)*1 Typ Guaranteed Minimum Unit Setup time, HIGH or LOW t su 3.3 3.5 5.5 6.0 ns 5.0 2.5 4.0 4.5 3.3 –2.0 0.0 0.0 5.0 –1.0 1.0 1.0 3.3 3.5 5.5 6.0 5.0 2.5 4.0 4.5 3.3 2.0 5.5 6.0 5.0 1.5 4.0 4.5 3.3 1.5 3.5 4.5 5.0 1.0 2.0 3.0 Data to CP Hold time, HIGH or LOW th Data to CP Clock pulse width tw HIGH or LOW MR Pulse width tw HIGH or LOW Recovery time MR to CP Note: 4 t rec 1. Voltage Range 3.3 is 3.3 V ± 0.3 V Voltage Range 5.0 is 5.0 V ± 0.5 V ns ns ns ns HD74AC273 Capacitance Item Symbol Typ Unit Condition Input capacitance CIN 4.5 pF VCC = 5.5 V Power dissipation capacitance CPD 50.0 pF VCC = 5.0 V 5 Unit: mm 24.50 25.40 Max 6.30 11 1 7.00 Max 20 10 1.30 2.54 ± 0.25 0.48 ± 0.10 0.51 Min 1.27 Max 2.54 Min 5.08 Max 0.89 7.62 + 0.11 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) DP-20N — Conforms 1.26 g Unit: mm 12.6 13 Max 11 1 10 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0.80 Max *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 5.5 20 0.20 7.80 +– 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-20DA — Conforms 0.31 g Unit: mm 12.8 13.2 Max 11 1 10 0.20 ± 0.10 0.935 Max 1.27 *0.42 ± 0.08 0.40 ± 0.06 *0.27 ± 0.05 0.25 ± 0.04 2.65 Max 7.50 20 0.25 10.40 +– 0.40 1.45 0° – 8° 0.57 0.70 +– 0.30 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-20DB Conforms — 0.52 g Unit: mm 6.50 6.80 Max 11 1 10 4.40 20 0.65 *0.22+0.08 –0.07 0.20 ± 0.06 1.0 0.13 M 6.40 ± 0.20 *Dimension including the plating thickness Base material dimension 0.07 +0.03 –0.04 0.10 *0.17 ± 0.05 0.15 ± 0.04 1.10 Max 0.65 Max 0° – 8° 0.50 ± 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) TTP-20DA — — 0.07 g Cautions 1. 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