PD-9.1419 TARGET IRGCH70KE IRGCH70KE IGBT Die in Wafer Form C 1200 V Size 7 Ultra-Fast Speed 5" Wafer G E Electrical Characteristics ( Wafer Form ) Parameter VCE (on) V(BR)CES VGE(th) ICES IGES Description Collector-to-Emitter Saturation Voltage Colletor-to-Emitter Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Collector Current Gate-to-Emitter Leakage Current Guaranteed (Min/Max) Test Conditions 3.3V Max. IC = 20A, TJ = 25°C, V GE = 15V 1200V Min. TJ = 25°C, ICES = 250µA, VGE = 0V 3.0V Min., 6.0V Max. V GE = VCE , TJ =25°C, IC =250µA 250 µA Max. TJ = 25°C, VCE = 1200V ± 500 nA Max. TJ = 25°C, VGE = +/- 20V Mechanical Data Norminal Backmetal Composition, Thickness: Norminal Front Metal Composition, Thickness: Dimensions: Wafer Diameter: Wafer thickness: Relevant Die Mechanical Dwg. Number Minimum Street Width Reject Ink Dot Size Ink Dot Location Recommended Storage Environment: Cr-Ni-Ag ( 1kA-4kA-6kA ) 99% Al, 1% Si (3 microns) 0.340" x 0.340" 125mm, with std. < 100 > flat .015" + / -.003" 01-5153 100 Microns 0.25mm Diameter Minimum See Die Outline drawing below Store in original container, in dessicated nitrogen, with no contamination Die Outline INK DO T LO CATION 8.64 (.340 ) 2.39 (.094 ) EMITTE R G 1.42 (.056 ) 1.35 (.053 ) 8.64 (.340 ) NO TES : 1. ALL DIM ENSIONS ARE S HO W N IN MILLIMET ERS ( INCHES ) 2. CONTRO LLING DIMENSION : ( INCH ) 3. LETTE R DES IGNA TIO N : S = S OURCE S K = SO URCE KE LVIN G = GA TE IS = CURRE NT SE NS E 4. DIMENS IO NA L TO LERANCES BO NDING PADS : < 0.635 TO LERANCE = + /- 0.013 W IDT H < (.0250 ) T OLERA NCE =+/- (.0005 ) & > 0.635 TO LERANCE = +/- 0.025 LENG TH > (.0250 ) TO LERANCE = + /- ( .0010 ) O VERALL DIE < 1.270 TO LE RA NCE = +/- 0.102 W IDT H < (.050 ) TO LERANCE = +/- (.004 ) & > 0.635 T OLERA NCE = +/- 0.203 LENG TH > ( .050 ) T OLERA NCE = +/- (.008 ) 5. UNLESS O THERW IS E NO TED A LL DIE ARE GEN III