LD7575 07/28/2005 Green-Mode PWM Controller with High-Voltage Start-Up Circuit Product Spec. (Confidential) General Description Features The LD7575 is a current-mode PWM controller with z High-Voltage (500V) Startup Circuit excellent power-saving operation. It features a high- z Current Mode Control voltage current source to directly supply the startup current z Non-Audible-Noise Green Mode Control from bulk capacitor and further to provide a lossless startup z UVLO (Under Voltage Lockout) circuit. z LEB (Leading-Edge Blanking) on CS Pin blanking of the current sensing, internal slope compensation, z Programmable Switching Frequency and the small package provide the users a high efficiency, z Internal Slope Compensation minimum external component counts, and low cost solution z OVP (Over Voltage Protection) on Vcc for AC/DC power applications. z OLP (Over Load Protection) z 500mA Driving Capability The integrated functions such as the leading-edge Furthermore, the embedded over voltage protection, over load protection and the special green-mode control provide Applications the solution for users to design a high performance power z Switching AC/DC Adapter and Battery Charger circuit easily. z Open Frame Switching Power Supply z LCD Monitor/TV Power The LD7575 is offered in SOP-8 package. g Patent pending Typical Application 1 Leadtrend Technology Corporation LD7575-DS-01-PROMATE July 2005 LD7575 Pin Configuration HV NC VCC OUT SOP-8 (TOP VIEW) 8 7 6 5 YY: WW: PP: TOP MARK 2 3 4 CS GND RT 1 COMP YYWWPP Year code Week code Production code Ordering Information Part number Package Top Mark Shipping LD7575 CS SOP-8 LD7575CS 2500 /tape & reel LD7575 PS SOP-8 (PB Free) LD7575PS 2500 /tape & reel Pin Descriptions PIN NAME 1 RT 2 COMP FUNCTION This pin is to program the switching frequency. By connecting a resistor to ground to set the switching frequency. Voltage feedback pin (same as the COMP pin in UC384X), By connecting a photo-coupler to close the control loop and achieve the regulation. 3 CS 4 GND Ground Current sense pin, connect to sense the MOSFET current 5 OUT Gate drive output to drive the external MOSFET 6 VCC Supply voltage pin 7 NC Unconnected Pin Connect this pin to positive terminal of bulk capacitor to provide the startup current 8 HV for the controller. When Vcc voltage trips the UVLO(on), this HV loop will be off to save the power loss on the startup circuit. 2 Leadtrend Technology Corporation LD7575-DS-01-PROMATE July 2005 LD7575 Block Diagram HV 1mA 8V POR VCC UVLO Comparator 32V internal bias & Vref 16.0V/ 10.0V OVP Comparator OVP VCC OK RT 27.5V PG OSC Vref OK OLP Driver Stage OUT Green-Mode & Burst Control Vbias S Q PWM Comparator COMP R 2R R ∑ + Leading Edge Blanking CS + Slope Compensation POR 0.85V OCP Comparator clear 30mS Delay 5.0V OLP Comparator S PG GND 3 Leadtrend Technology Corporation LD7575-DS-01-PROMATE July 2005 /2 Counter R Q OLP LD7575 Absolute Maximum Ratings Supply Voltage VCC 30V High-Voltage Pin, HV 500V COMP, RT, CS -0.3 ~7V Junction Temperature 150°C Operating Ambient Temperature -40°C to 85°C Storage Temperature Range -65°C to 150°C Package Thermal Resistance 160°C/W Power Dissipation (at Ambient Temperature = 85°C) 400mW Lead temperature (SOP-8, Soldering, 10sec) 230°C Lead temperature (PB Free SOP-8, Soldering, 10sec) 260°C ESD Voltage Protection, Human Body Model (except HV Pin) 3KV ESD Voltage Protection, Machine Model 200V Gate Output Current 500mA Caution: Stresses beyond the ratings specified in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not limited. Recommended Operating Conditions Item Supply Voltage Vcc Min. Max. Unit 11 25 V Vcc Capacitor 10 47 µF Switching Frequency 50 130 KHz 4 Leadtrend Technology Corporation LD7575-DS-01-PROMATE July 2005 LD7575 Electrical Characteristics o (TA = +25 C unless otherwise stated, VCC=15.0V) PARAMETER CONDITIONS MIN TYP MAX UNITS 0.5 1.0 1.5 mA 35 µA 100 µA 2.0 3.0 mA VCOMP=3V 2.5 4.0 mA Protection tripped (OLP, OVP) 0.5 High-Voltage Supply (HV Pin) High-Voltage Current Source Vcc< UVLO(on) Off-State Leakage Current Vcc> UVLO(off) Supply Voltage (Vcc Pin) Startup Current Operating Current (with 1nF load on OUT pin) VCOMP=0V mA UVLO (off) 9.0 10.0 11.0 V UVLO (on) 15.0 16.0 17.0 V OVP Level 25.0 27.5 30.0 V 1.5 2.2 mA Voltage Feedback (Comp Pin) Short Circuit Current VCOMP=0V Open Loop Voltage COMP pin open Green Mode Threshold VCOMP 6.0 V 2.35 V Current Sensing (CS Pin) Maximum Input Voltage 0.80 Leading Edge Blanking Time 0.85 0.90 350 Input impedance nS 1 Delay to Output V MΩ 100 nS Oscillator (RT pin) Frequency RT=100KΩ Green Mode Frequency Fs=65.0KHz 60.0 65.0 70.0 20 KHz KHz Temp. Stability (-40°C ~105°C) 3 % Voltage Stability (VCC=11V-25V) 1 % Output Low Level VCC=15V, Io=20mA 1 V Output High Level VCC=15V, Io=20mA Rising Time Load Capacitance=1000pF 50 200 nS Falling Time Load Capacitance=1000pF 30 100 nS Gate Drive Output (OUT Pin) 8 V OLP (Over Load Protection) OLP Trip Level OLP Delay Time (note) Fs=65KHz Note: The OLP delay time is proportional to the period of switching cycle. frequency and the shorter OLP delay time. 5 Leadtrend Technology Corporation LD7575-DS-01-PROMATE July 2005 5.0 V 30 mS So that, the lower RT value will set the higher switching LD7575 Typical Performance Characteristics 0.90 0.89 1.3 VCS (off) (V) HV Current Source (mA) 1.5 1.1 0.88 0.87 0.9 0.86 0.7 -40 0 40 80 0.85 120 125 -40 0 Temperature (°C) Fig. 2 18.0 12 17.2 11.2 UVLO (off) (V) UVLO (on) (V) Fig. 1 HV Current Source vs. Temperature (HV=500V, Vcc=0V) 16.4 15.6 125 120 125 120 125 Temperature (°C) VCS (off) vs. Temperature 9.6 8 -40 0 40 80 120 125 -40 0 40 80 Temperature (°C) Fig. 4 UVLO (off ) vs. Temperature 70 26 68 24 Frequency (KHz) Frequency (KHz) 120 10.4 Temperature (°C) Fig. 3 UVLO (on) vs. Temperature 66 64 22 20 18 62 60 80 8.8 14.8 14.0 40 16 -40 0 40 80 120 125 -40 80 Fig. 6 Green Mode Frequency vs. Temperature 6 LD7575-DS-01-PROMATE July 2005 40 Temperature (°C) Temperature (°C) Fig. 5 Frequency vs. Temperature Leadtrend Technology Corporation 0 LD7575 25 Green mode frequency (KHz) 70 Frequency (KHz) 68 66 64 62 12 14 16 18 20 22 24 21 19 17 15 11 25 12 14 16 22 Fig. 7 Frequency vs. Vcc Fig. 8 Green mode frequency vs. Vcc 35 80 30 75 70 65 24 25 120 125 120 125 25 20 15 60 10 -40 0 40 80 120 125 -40 40 0 80 Temperature (°C) Temperature (°C) Fig. 10 Fig. 9 Max Duty vs. Temperature 7.0 6.0 6.5 5.5 6.0 5.0 OLP (V) VCOMP (V) 20 Vcc (V) 85 5.5 5.0 4.5 18 Vcc (V) VCC OVP (V) Max Duty (%) 60 11 23 VCC OVP vs. Temperature 4.5 4.0 -40 0 40 80 3.5 120 125 -40 0 Temperature (°C) Fig. 11 VCOMP open loop voltage vs. Temperature Fig. 12 7 Leadtrend Technology Corporation LD7575-DS-01-PROMATE July 2005 40 80 Temperature (°C) OLP-Trip Level vs. Temperature LD7575 Application Information threshold thus the current source is on to supply a current Operation Overview with 1mA. Meanwhile, the Vcc supply current is as low as As long as the green power requirement becomes a trend 100µA thus most of the HV current is utilized to charge the and the power saving is getting more and more important for Vcc capacitor. the switching power supplies and switching adaptors, the By using such configuration, the turn-on delay time will be almost same no matter under low-line or traditional PWM controllers are not able to support such new high-line conditions. requirements. Furthermore, the cost and size limitation force Whenever the Vcc voltage is higher than UVLO(on) to the PWM controllers need to be powerful to integrate more power on the LD7575 and further to deliver the gate drive functions to reduce the external part counts. The LD7575 signal, the high-voltage current source is off and the supply is targeted on such application to provide an easy and cost current is provided from the auxiliary winding of the effective solution; its detail features are described as below: transformer. Therefore, the power losses on the startup circuit can be eliminated and the power saving can be easily Internal High-Voltage Startup Circuit and achieved. Under Voltage Lockout (UVLO) An UVLO comparator is included to detect the voltage on the Vcc pin to ensure the supply voltage enough to power on the LD7575 PWM controller and in addition to drive the Vin power MOSFET. As shown in Fig. 14, a hysteresis is provided to prevent the shutdown from the voltage dip Cbulk D1 during startup. The turn-on and turn-off threshold level are set at 16V and 10.0V, respectively. C1 Vcc HV VCC OUT UVLO(on) LD7575 UVLO(off) CS Comp GND Rs t Fig. 13 HV Current Traditional circuit powers up the PWM controller through a 1mA startup resistor to provide the startup current. However, the startup resistor consumes significant power which is more ~ 0mA (off) and more critical whenever the power saving requirement is coming tight. t Theoretically, this startup resistor can be very high resistance value. However, higher resistor value Vcc current will cause longer startup time. Operating Current (Supply from Auxiliary Winding) To achieve an optimized topology, as shown in figure 13, Startup Current (<100uA) LD7575 implements a high-voltage startup circuit for such requirement. During the startup, a high-voltage current source sinks current from the bulk capacitor to provide the startup current as well as charge the Vcc capacitor C1. Fig. 14 During the startup transient, the Vcc is lower than the UVLO 8 Leadtrend Technology Corporation LD7575-DS-01-PROMATE July 2005 LD7575 Current Sensing, Leading-edge Blanking and the Negative Spike on CS Pin The typical current mode PWM controller feedbacks both current signal and voltage signal to close the control loop and achieve regulation. The LD7575 detects the primary MOSFET current from the CS pin, which is not only for the peak current mode control but also for the pulse-by-pulse current limit. The maximum voltage threshold of the current sensing pin is set as 0.85V. Thus the MOSFET peak current can be calculated as: IPEAK(MAX) = 0.85 V RS A 350nS leading-edge blanking (LEB) time is included in the input of CS pin to prevent the false-trigger caused by the current spike. In the low power application, if the total pulse width of the turn-on spikes is less than 350nS and the negative spike on the CS pin is not exceed -0.3V, the R-C filter (as shown in figure15) can be eliminated. However, the total pulse width of the turn-on spike is related to the output power, circuit design and PCB layout. Fig. 15 It is strongly recommended to add the small R-C filter (as shown in figure 16) for higher power application to avoid the CS pin damaged by the negative turn-on spike. Output Stage and Maximum Duty-Cycle An output stage of a CMOS buffer, with typical 500mA driving capability, is incorporated to drive a power MOSFET directly. And the maximum duty-cycle of LD7575 is limited to 75% to avoid the transformer saturation. Voltage Feedback Loop The voltage feedback signal is provided from the TL431 in the secondary side through the photo-coupler to the COMP pin of LD7575. The input stage of LD7575, like the UC384X, is with 2 diodes voltage offset then feeding into the voltage divider with 1/3 ratio, that is, V+ (PWM COMPARATOR ) = 1 × ( VCOMP − 2VF ) 3 A pull-high resistor is embedded internally thus can be Fig. 16 eliminated on the external circuit. 9 Leadtrend Technology Corporation LD7575-DS-01-PROMATE July 2005 LD7575 normal operation, this oscillator is dominated the switching Oscillator and Switching Frequency frequency. Connecting a resistor from RT pin to GND according to the Green-Mode Osc is not activated under normal operation . equation can program the normal switching frequency: OSC fSW = EN=1 65.0 × 100(KHz) RT(KΩ ) EN OUT Green-Mode Osc The suggested operating frequency range of LD7575 is within 50KHz to 130KHz. Set Vcomp S V+ COMP Reset 2R R V- R Internal Slope Compensation A fundamental issue of current mode control is the stability CS problem when its duty-cycle is operated more than 50%. To LEB Q PWM Comparator + ∑ + Ramp from Oscillator stabilize the control loop, the slope compensation is needed in the traditional UC384X design by injecting the ramp signal Fig. 17 from the RT/CT pin through a coupling capacitor. In LD7575, the internal slope compensation circuit has been The green-mode oscillator detects the Comp pin signal to implemented to simplify the external circuit design. determine if it is within the green-mode operation. When the detected signal Vcomp is lower than the green-mode threshold VGREEN, the green-mode oscillator is on. The On/Off Control green-mode oscillator, implemented by a VCO (voltage The LD7575 can be controlled to turn off by pulling COMP pin to lower than 1.2V. controlled oscillator), is a variable frequency oscillator. The gate output pin of LD7575 will By using this dual-oscillator control, the green-mode be disabled immediately under such condition. The off mode frequency can be well controlled and further to avoid the can be released when the pull-low signal is removed. generation of audible noise. Dual-Oscillator Green-Mode Operation There are many difference topologies has Over Load Protection (OLP) been To protect the circuit from the damage during over load implemented in different chips for the green-mode or power saving requirements such as “burst-mode condition or short condition, a smart OLP function is control”, implemented in the LD7575. Figure 18 shows the “skipping-cycle Mode”, “variable off-time control “…etc. The waveforms of the OLP operation. basic operation theory of all these approaches intended to condition, the feedback system will force the voltage loop reduce the switching cycles under light-load or no-load toward the saturation and thus pull the voltage on COMP pin condition either by skipping some switching pulses or (VCOMP) to high. reduce the switching frequency. switching frequency is 100KHz), the protection is activated In such and then turns off the gate output to stop the switching of approach, as shown in the block diagram, 2 oscillators are power circuit. implemented in LD7575. The first oscillator is to take care A divide-2 counter is implemented to reduce the average pin through an external resistor. Under this operation mode, power under OLP behavior. as shown in Fig. 17, the 2nd oscillation (green-mode count the number of UVLO(off). falling-time of the internal ramp will be constant to achieve The latch is released if the 2nd UVLO(off) point is counted then the output is Under the recovery to switching again. 10 LD7575-DS-01-PROMATE July 2005 Whenever OLP is activated, the output is latched off and the divide-2 counter starts to oscillator) is not activated. Therefore, the rising-time and the Leadtrend Technology Corporation The 30mS delay time is to prevent the false trigger from the power-on and turn-off transient. the normal switching frequency, which can be set by the RT good stability over all temperature range. Whenever the VCOMP trips the OLP threshold 5.0V and keeps longer than 30mS (when What LD7575 used to implement the power-saving operation is Leadtrend Technology’s own IP. Under such fault LD7575 By using such protection mechanism, the average input VCC power can be reduced to very low level so that the OVP Tripped component temperature and stress can be controlled within OVP Level the safe operating area. UVLO(on) UVLO(off) t VCC OUT UVLO(on) UVLO(off) Switching OLP 2nd UVLO(off) OLP Counter Reset Non-Switching Switching t t Fig. 19 COMP 30mS Fault Protection 5.0V A lot of protection features have been implemented in the OLP trip Level t LD7575 to prevent the power supply or adapter from being damaged caused by single fault condition on the open or OUT short condition on the pin of LD7575. Under the conditions listed below, the gate output will be off immediately to Switching Non-Switching Switching protect the power circuit --t Fig. 18 OVP (Over Voltage Protection) on Vcc The Vgs ratings of the nowadays power MOSFETs are most with maximum 30V. To prevent the Vgs from the fault condition, LD7575 is implemented an OVP function on Vcc. Whenever the Vcc voltage is higher than the OVP threshold voltage, the output gate drive circuit will be shutdown simultaneous thus to stop the switching of the power MOSFET until the next UVLO(on). The Vcc OVP function in LD7575 is an auto-recovery type protection. If the OVP condition, usually caused by the feedback loop opened, is not released, the Vcc will tripped the OVP level again and re-shutdown the output. is working as a hiccup mode. The Vcc Figure 19 shows its operation. On the other hand, if the OVP condition is removed, the Vcc level will get back to normal level and the output is automatically returned to the normal operation. 11 Leadtrend Technology Corporation LD7575-DS-01-PROMATE July 2005 y RT pin short to ground y RT pin floating y CS pin floating LD7575 Reference Application Circuit --- 10W (5V/2A) Adapter Pin < 0.15W when Pout = 0W & Vin = 264Vac Schematic AC input F1 R1A R1B NTC1 Z1 CX1 FL1 IC1 RT RT HV VCC OUT CS D1A~D1D C1 GND LD7575 COMP D2 R6 C2 R7 R4A R4B C5 D4 RS2 C4 T1 Q1 RS1 C51 C52 R56A ZD51 R54 C55 R55 L51 R56B R52 R53 C54 LD7575-DS-01-PROMATE July 2005 R51B R51A CR51 IC2 photocoupler CY1 IC51 12 Leadtrend Technology Corporation LD7575 BOM P/N Component Value Original P/N Component Value Note R1A N/A C1 22µF, 400V L-tec R1B N/A C2 22µF, 50V L-tec R4A 39KΩ, 1206 C4 1000pF, 1000V, 1206 Holystone R4B 39KΩ, 1206 C5 0.01µF, 16V, 0805 R6 2.2Ω, 1206 C51 1000pF, 50V, 0805 R7 10Ω, 1206 C52 1000µF, 10V L-tec RS1 2.7Ω, 1206, 1% C54 470µF, 10V L-tec RS2 2.7Ω, 1206, 1% C55 0.022µF, 16V, 0805 RT 100KΩ, 0805, 1% CX1 0.1µF X-cap R51A 100Ω, 1206 CY1 2200pF Y-cap R51B 100Ω, 1206 D1A 1N4007 R52 2.49KΩ, 0805, 1% D1B 1N4007 R53 2.49KΩ, 0805, 1% D1C 1N4007 R54 100Ω, 0805 D1D 1N4007 R55 1KΩ, 0805 D2 PS102R R56A 2.7KΩ, 1206 D4 1N4007 R56B N/A Q1 2N60B NTC1 5Ω, 3A 08SP005 CR51 SB540 FL1 20mH UU9.8 ZD51 6V2C T1 EI-22 IC1 LD7575CS L51 2.7µH IC2 EL817B IC51 TL431 13 Leadtrend Technology Corporation LD7575-DS-01-PROMATE July 2005 F1 250V, 1A Z1 N/A 600V, 2A SOP-8 1% LD7575 Package Information SOP-8 H A M J B F C I D Dimensions in Millimeters Dimensions in Inch Symbols MIN MAX MIN MAX A 4.801 5.004 0.189 0.197 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.178 0.229 0.007 0.009 I 0.102 0.254 0.004 0.010 J 5.791 6.198 0.228 0.244 M 0.406 1.270 0.016 0.050 θ 0° 8° 0° 8° Important Notice Leadtrend Technology Corp. reserves the right to make changes or corrections to its products at any time without notice. Customers should verify the datasheets are current and complete before placing order. 20 □ 14 Leadtrend Technology Corporation LD7575-DS-01-PROMATE July 2005 LD7575 Revision History Rev. Date Change Notice 00 07/21/’05 Original Specification. And before 01 07/28/’05 1. Page 2, Remove the unexpected code “skype.lnk” before the “ordering information”. 2. Page 4, Recommended operating condition, change the “min. supply voltage Vcc” from 10V to 11V since the UVLO range is from 9V to 11V. 3. Page 9, Add the gate resistor on figure 15 and figure 16 to avoid misunderstanding. 4. Page 11, Add the description “Figure 19 shows its operation.” In the section of “OVP on Vcc”. 5. Page 12, Add “Vin=264Vac” on the title. 15 Leadtrend Technology Corporation LD7575-DS-01-PROMATE July 2005