February 1996 PC87308VUL SuperI/O Enhanced Sidewinder Plug and Play Compatible Chip, with a Floppy Disk Controller, a Keyboard Controller, a Real-Time Clock, Two UARTs, Full Infrared Support and an IEEE 1284 Parallel Port General Description The PC87308VUL is a single chip solution to the most commonly used ISA, EISA and Micro Channel peripherals. It incorporates in one fully Plug and Play (PnP) compatible chip, a Floppy Disk Controller (FDC), a Keyboard and mouse Controller (KBC), a Real-Time Clock (RTC), two full function UARTs, Universal Infrared (UIR) support, a full IEEE 1284 parallel port, three general purpose chip select signals that can be programmed for game port control, and a separate configuration register set for each module. It also provides support for power management and standard ATÉ address decoding for on-chip functions. The PC87308VUL’s Plug and Play (PnP) support conforms with the ‘‘Plug and Play ISA Specification’’ Version 1.0a, May 5, 1994. The Universal Infrared (UIR) interface complies with the HPSIR, SHARP-IR and IrDA-2 standards and supports all four basic protocols for TV remote circuitry (RC-5, RC-5 extended, RECS80 and NEC). Features Y 100% compatibility with Plug and Play requirements specified in the ‘‘Plug and Play ISA Specification’’, ISA, EISA, and Micro Channel architectures. (Continued) Block Diagram TL/C/12651 – 1 TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. IBMÉ, PC-ATÉ and PS/2É are registered trademarks of International Business Machines Corporation. C1996 National Semiconductor Corporation TL/C/12651 RRD-B30M36/Printed in U. S. A. http://www.national.com PC87308VUL SuperI/O Enhanced Sidewinder Plug and Play Compatible Chip, with a Floppy Disk Controller, a Keyboard Controller, a Real-Time Clock, Two UARTs, Full Infrared Support and an IEEE 1284 Parallel Port PRELIMINARY Features (Continued) Y Y Y Y Ð DS1287, MC146818 and PC87911 compatibility Ð 242 bytes of battery backed up CMOS RAM in two banks Ð Selective lock mechanism for the RTC RAM Ð Battery backup up Century calendar in days, days of the week, months and years, with automatic leapyear adjustment Ð Battery backed-up time of day in seconds, minutes and hours that allows a 12 or 24 hour format and adjustments for daylight savings time Ð BCD or binary format for time keeping Ð Three different maskable interrupt flags: A special Plug and Play module that includes; Ð Flexible IRQs, DMAs and base addresses that meet the Plug and Play requirements of Microsoft’s 1995 hardware design guide for Windows and Plug and Play ISA Revision 1.0A. Ð Plug and Play ISA mode (with isolation mechanismÐ Wait for Key state) Ð Motherboard Plug and Play mode A Floppy Disk Controller (FDC) that provides: Ð A modifiable address that is referenced by a 16-bit programmable register Ð Software compatibility with the PC8477, which contains a superset of the floppy disk controller functions in the mDP8473, the NEC mPD765A and the N82077 Ð 13 IRQ channel options Ð Four 8-bit DMA channel options Ð 16-byte FIFO Ð Burst and non-burst modes Ð A high-performance, internal, analog data separator that does not require any external filter components Ð Support or standard 5.25× and 3.5× floppy disk drives Ð Automatic media sense support Ð Perpendicular recording drive support Ð 3-mode Floppy Disk Drive (FDD) support Ð Full support for IBM’sÉ Tape Drive Register (TDR) implementation of PC-ATÉ and PS/2É drive types A Keyboard and Mouse Controller (KBC) with: Ð A modifiable address that is referenced by a 16-bit programmable register, reported as a fixed address in resource data Ð 13 IRQ options for the keyboard controller Ð 13 IRQ options for the mouse controller Ð An 8-bit microcontroller Ð Software compatibility with the 8042AH and PC87911 microcontrollers Ð 2 KB of custom-design program ROM Ð 256 bytes of RAM for data Ð 5 programmable dedicated open drain I/O lines for keyboard controller applications Ð Asynchronous access to two data registers and one status register during normal operation Ð Support for both interrupt and polling Ð 93 instructions Ð An 8-bit timer/counter Ð Support for binary and BCD arithmetic Ð Operation at 8 MHz, 12 MHz or 16 MHz (programmable option) Ð Customizability using the PC87323VUL, which includes a RAM KBC, as a development platform for keyboard controller code for the PC87308VUL A Real-Time Clock (RTC) that has: Ð A modifiable address that is referenced by a 16-bit programmable register Ð 13 IRQ options with programmable polarity http://www.national.com # Periodic interruptsÐAt intervals from 122 ms to 500 ms # Time-of-day alarmÐAt intervals from once per second to once per day # Updated Ended InterruptÐOnce per second upon Y Y Y 2 completion of update Ð Separate battery pin, 2.4V operation that includes an internal UL protection resistor Ð 2 mA maximum power consumption during power down Ð Double-buffer time registers An Advanced Power supply Control (APC) that controls the main power supply to the system, using open-drain output, as follows: Power turned on when: Ð The RTC reaches a pre-determined date and time. Ð A high to low transition occurs on the RI input signals of the UARTs. Ð A ring pulse or pulse train is detected on the RING input signal. Ð A SWITCH input signal indicates a Switch On event. Power turned off when: Ð A SWITCH input signal indicates a Switch Off event. Ð A Fail-safe event occurs (power-save mode detected but the system is hung up). Ð Software turns power off. Two UARTs that provide: Ð Software compatibility with the PC16550A and the PC16450 Ð A modifiable address that is referenced by a 16-bit programmable register Ð 13 IRQ channel options Ð Shadow register support for write-only bits Ð Four 8-bit DMA options for UART2 A Universal Infrared (UIR) interface on UART2 that supports TV remote circuitry and is compliant with: Ð IrDA-2, including support for 4 Mbps and 1.15 Mbps baud rates Ð HP-SIR Ð ASK-IR option of SHARP-IR Ð DASK-IR option of SHARP-IR Ð Consumer remote control (TV Remote) mode Features (Continued) Y Y A bidirectional parallel port that includes: Ð A modifiable address that is referenced by a 16-bit programmable register Ð Software or hardware control Ð 13 IRQ channel options Ð Four 8-bit DMA channel options Ð Demand mode DMA support Ð An Enhanced Parallel Port (EPP) that is compatible with the new version EPP 1.9, and is IEEE 1284 compliant Ð An Enhanced Parallel Port (EPP) that also supports version EPP 1.7 of the Xircom specification. Ð Support for an Enhanced Parallel Port (EPP) as mode 4 of the Extended Capabilities Port (ECP) Ð An Extended Capabilities Port (ECP) that is IEEE 1284 compliant, including level 2 Ð Selection of internal pull-up or pull-down resistor for Paper End (PE) pin Ð Reduction of PCI bus utilization by supporting a demand DMA mode mechanism and a DMA fairness mechanism Ð A protection circuit that prevents damage to the parallel port when a printer connected to it powers up or is operated at high voltages Ð Output buffers that can sink and source 14 mA Three general purpose pins for three separate programmable chip select signals, as follows: Ð Can be programmed for game port control Ð The Chip Select 0 (CS0) signal produces open drain output and is powered by the VCCH Ð The Chip Select 1 (CS1) and 2 (CS2) signals have push-pull buffers and are powered by the main VDD Ð Decoding of chip select signals depends on the address and the Address Enable (AEN) signals, and can be qualified using the Read (RD) and Write (WR) signals. Y Y Y Y Y Y 3 16 Single-Bit General Purpose I/O ports (GPIO): Ð Modifiable addresses that are referenced by a 16-bit programmable reigster Ð Programmable direction for each signal (input or output) Ð Programmable drive type for each output pin (opendrain or push-pull) Ð Programmable option for internal pull-up resistor on each input pin Ð A back-drive protection circuit An X-bus data buffer that connects the 8-bit X data bus to the ISA data bus Clock source options: Ð Source is a 32.768 kHz crystal-an internal frequency multiplier generates all the required internal frequencies Ð Source may be either a 48 MHz or 24 MHz clock input signal Non-Volatile Memory (NVM) support via the Chip Select 0 (CS0) signal that is powered by the VCCH Enhanced Power Management, including: Ð Special configuration registers for power down Ð Reduced current leakage from pins Ð Low-power CMOS technology Ð Ability to shut off clocks to all modules General features include: Ð All accesses to the SuperI/O chip activate a Zero Wait State (ZWS) signal, except for accesses to the Enhanced Parallel Port (EPP) and to configuration registers Ð Access to all configuration registers is through an Index and a Data register, which can be relocated within the ISA I/O address space Ð 160-pin Plastic Quad Flatpack (PQFP) package http://www.national.com 1.0 Pin Description 1.1 CONNECTION DIAGRAM TL/C/12651 – 2 http://www.national.com 4 5 http://www.national.com PC87308VUL SuperI/O Enhanced Sidewinder Plug and Play Compatible Chip, with a Floppy Disk Controller, a Keyboard Controller, a Real-Time Clock, Two UARTs, Full Infrared Support and an IEEE 1284 Parallel Port Physical Dimensions inches (millimeters) Order Number PC87308VUL NS Package VUL160A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation 1111 West Bardin Road Arlington, TX 76017 Tel: 1(800) 272-9959 Fax: 1(800) 737-7018 http://www.national.com 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 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