BUK98150-55A TrenchMOS™ logic level FET Rev. 02 — 25 March 2002 M3D087 Product data 1. Description N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOS™1 technology, featuring very low on-state resistance. Product availability: BUK98150-55A in SOT223 (SC-73). 2. Features ■ ■ ■ ■ TrenchMOS™ technology Q101 compliant 150 °C rated Logic level compatible. 3. Applications ■ Automotive and general purpose power switching: ◆ 12 V and 24 V loads ◆ Motors, lamps and solenoids. 4. Pinning information Table 1: Pinning - SOT223 (SC-73), simplified outline and symbol Pin Description 1 gate (g) 2 drain (d) 3 source (s) 4 drain (d) Simplified outline Symbol d 4 g MBB076 1 Top view 2 3 MSB002 - 1 SOT223 (SC-73) 1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V. s BUK98150-55A Philips Semiconductors TrenchMOS™ logic level FET 5. Quick reference data Table 2: Quick reference data Symbol Parameter Conditions Typ Max Unit - 55 V VDS drain-source voltage (DC) ID drain current (DC) Tsp = 25 °C; VGS = 5 V - 5 A Tsp = 25 °C - 8 W - 150 °C VGS = 5 V; ID = 5 A 128 150 VGS = 4.5 V; ID = 5 A - 161 VGS = 10 V; ID = 5 A 116 137 mΩ mΩ mΩ Ptot total power dissipation Tj junction temperature RDSon drain-source on-state resistance 6. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS drain-source voltage (DC) VDGR drain-gate voltage (DC) VGS gate-source voltage (DC) ID drain current (DC) Conditions RGS = 20 kΩ Min Max Unit - 55 V - 55 V - ±15 V Tsp = 25 °C; VGS = 5 V; Figure 2 and 3 - 5 A Tsp = 100 °C; VGS = 5 V; Figure 2 - 3 A IDM peak drain current Tsp = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 - 22 A Tsp = 25 °C; Figure 1 Ptot total power dissipation - 8 W Tstg storage temperature −55 +150 °C Tj operating junction temperature −55 +150 °C Source-drain diode IDR reverse drain current (DC) Tsp = 25 °C - 5 A IDRM peak reverse drain current Tsp = 25 °C; pulsed; tp ≤ 10 µs - 22 A unclamped inductive load; ID = 5 A; VDS ≤ 55 V; VGS = 5 V; RGS = 50 Ω; starting Tj = 25 °C - 31 mJ Avalanche ruggedness EDS(AL)S non-repetitive avalanche energy © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09435 Product data Rev. 02 — 25 March 2002 2 of 12 BUK98150-55A Philips Semiconductors TrenchMOS™ logic level FET 03aa17 120 03nh98 5 ID (A) Pder (%) 4 80 3 2 40 1 0 0 0 50 100 150 25 200 50 75 100 Tsp (ºC) 125 150 Tsp (ºC) VGS ≥ 4.5 V P tot P der = ---------------------- × 100% P ° tot ( 25 C ) Fig 1. Normalized total power dissipation as a function of solder point temperature. Fig 2. Continuous drain current as a function of solder point temperature. 102 03na29 ID (A) Limit RDSon = VDS/ID tp = 10 µs 10 100 µs 1 ms 1 DC 10 ms 100 ms 10-1 1 10 VDS (V) 102 Tsp = 25 °C; IDM is single pulse. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09435 Product data Rev. 02 — 25 March 2002 3 of 12 BUK98150-55A Philips Semiconductors TrenchMOS™ logic level FET 7. Thermal characteristics Table 4: Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-sp) thermal resistance from junction to solder point Figure 4 - - 15 K/W Rth(j-a) thermal resistance from junction to ambient - 70 - K/W 7.1 Transient thermal impedance 102 03na30 Zth(j-sp) (K/W) 10 δ = 0.5 0.2 0.1 1 0.05 0.02 δ= P 10-1 tp T single shot t tp T 10-2 10-6 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09435 Product data Rev. 02 — 25 March 2002 4 of 12 BUK98150-55A Philips Semiconductors TrenchMOS™ logic level FET 8. Characteristics Table 5: Characteristics Tj = 25 °C unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit Static characteristics V(BR)DSS VGS(th) IDSS drain-source breakdown voltage ID = 0.25 mA; VGS = 0 V Tj = 25 °C 55 - - V Tj = −55 °C 50 - - V gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 drain-source leakage current Tj = 25 °C 1 1.5 2 V Tj = 150 °C 0.6 - - V Tj = −55 °C - - 2.3 V Tj = 25 °C - 0.05 10 µA Tj = 150 °C - - 500 µA - 2 100 nA Tj = 25 °C - 128 150 mΩ Tj = 150 °C - - 276 mΩ VGS = 4.5 V; ID = 5 A; - - 161 mΩ VGS = 10 V; ID = 5 A; - 116 137 mΩ VGS = 5 V; VDD = 44 V; ID = 5 A; Figure 14 - 5.3 - nC - 1.0 - nC - 2.8 - nC - 240 320 pF - 40 48 pF - 25 34 pF - 8 - ns VDS = 55 V; VGS = 0 V IGSS gate-source leakage current VGS = ±10 V; VDS = 0 V RDSon drain-source on-state resistance VGS = 5 V; ID = 5 A; Figure 7 and 8 Dynamic characteristics Qg(tot) total gate charge Qgs gate-to-source charge Qgd gate-to-drain (Miller) charge Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time tr rise time - 57 - ns td(off) turn-off delay time - 16 - ns tf fall time - 13 - ns VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 12 VDD = 20 V; RL = 3.3 Ω; VGS = 5 V; RG = 10 Ω; © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09435 Product data Rev. 02 — 25 March 2002 5 of 12 BUK98150-55A Philips Semiconductors TrenchMOS™ logic level FET Table 5: Characteristics…continued Tj = 25 °C unless otherwise specified Symbol Parameter Conditions Min Typ Max Unit - 0.85 1.2 V Source-drain diode VSD source-drain (diode forward) voltage IS = 5 A; VGS = 0 V; Figure 15 trr reverse recovery time Qr recovered charge IS = 5 A; dIS/dt = −100 A/µs VGS = −10 V; VDS = 30 V 03na26 25 ID (A) 8 - 24 - ns - 30 - nC 03na24 140 10 RDSon (mΩ) VGS = 6 V 20 120 5 15 4 10 100 3 5 2.2 0 0 2 4 6 80 8 0 10 VDS (V) 15 Tj = 25 °C; ID = 5 A Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values. 03na27 320 Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values. 03aa28 2.4 VGS = 3 V 3.2 10 VGS (V) Tj = 25 °C; tp = 300 µs RDSon (mΩ) 5 a 3.4 3.6 1.8 240 3.8 1.2 4 160 0.6 5 10 0 80 2 6 10 ID (A) 14 -60 Tj = 25 °C 60 120 o Tj ( C) 180 R DSon a = --------------------------R DSon ( 25 °C ) Fig 7. Drain-source on-state resistance as a function of drain current; typical values. Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09435 Product data 0 Rev. 02 — 25 March 2002 6 of 12 BUK98150-55A Philips Semiconductors TrenchMOS™ logic level FET 03aa33 2.5 VGS(th) max (V) 03aa36 10-1 ID (A) 10-2 2 typ min 10-3 1.5 min 1 10-4 0.5 10-5 typ max 10-6 0 -60 0 60 120 Tj (° C) 0 180 1 2 3 VGS (V) Tj = 25 °C; VDS = VGS ID = 1 mA; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature. Fig 10. Sub-threshold drain current as a function of gate-source voltage. 03na25 6 03na28 600 gfs (S) Ciss C (pF) 4 Coss 400 Crss 2 200 0 0 0 2 4 6 8 10-2 10 10-1 Tj = 25 °C; VDS = 25 V 102 10 VGS = 0 V; f = 1 MHz Fig 11. Forward transconductance as a function of drain current; typical values. Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09435 Product data 1 VDS (V) ID (A) Rev. 02 — 25 March 2002 7 of 12 BUK98150-55A Philips Semiconductors TrenchMOS™ logic level FET 03na21 6 03na23 5 VGS (V) ID (A) VDD = 14 V 4 VDD = 44 V 4 3 Tj = 150 ºC 2 2 1 Tj = 25 ºC 0 0 0 1 2 3 0 4 2 4 VGS (V) QG (nC) 6 Tj = 25 °C; ID = 5 A VDS = 25 V Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values. Fig 14. Gate-source voltage as a function of turn-on gate charge; typical values. 03na22 20 IS (A) 15 10 Tj = 150 ºC 5 Tj = 25 ºC 0 0.0 0.4 0.8 1.2 1.6 VSD (V) VGS = 0 V Fig 15. Reverse diode current as a function of reverse diode voltage; typical values. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09435 Product data Rev. 02 — 25 March 2002 8 of 12 BUK98150-55A Philips Semiconductors TrenchMOS™ logic level FET 9. Package outline Plastic surface mounted package; collector pad for good heat transfer; 4 leads D SOT223 E B A X c y HE v M A b1 4 Q A A1 1 2 3 Lp bp e1 w M B detail X e 0 2 4 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp b1 c D E e e1 HE Lp Q v w y mm 1.8 1.5 0.10 0.01 0.80 0.60 3.1 2.9 0.32 0.22 6.7 6.3 3.7 3.3 4.6 2.3 7.3 6.7 1.1 0.7 0.95 0.85 0.2 0.1 0.1 OUTLINE VERSION SOT223 REFERENCES IEC JEDEC EIAJ SC-73 EUROPEAN PROJECTION ISSUE DATE 97-02-28 99-09-13 Fig 16. SOT223 (SC-73). © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09435 Product data Rev. 02 — 25 March 2002 9 of 12 BUK98150-55A Philips Semiconductors TrenchMOS™ logic level FET 10. Soldering 7.00 3.85 3.60 3.50 0.30 solder lands 1.20 (4x) solder resist 4 occupied area solder paste 7.40 3.90 4.80 7.65 1 2 3 1.20 (3x) 1.30 (3x) 5.90 6.15 MSA443 Dimensions in mm. Fig 17. Reflow soldering footprint for SOT223 (SC-73). 11. Revision history Table 6: Revision history Rev Date 02 20020325 CPCN Description - Product data; second version, supersedes Rev 01 of 20001003. Modifications: • • • • 01 20001003 - Gate-source voltage maximum increased from 10 to 15 V in limiting values table. Rth(j-sp) maximum decreased from 20 K/W to 15 K/W in thermal characteristics table. Switching speed measurements updated in characteristics table. Total power dissipation, peak drain current, peak reverse drain current, and non-repetitive avalanche energy figures updated in quick reference data and limiting values. Product specification; initial version. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09435 Product data Rev. 02 — 25 March 2002 10 of 12 BUK98150-55A Philips Semiconductors TrenchMOS™ logic level FET 12. Data sheet status Data sheet status[1] Product status[2] Definition Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. [1] [2] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 13. Definitions 14. Disclaimers Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: [email protected]. Product data Fax: +31 40 27 24825 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 09435 Rev. 02 — 25 March 2002 11 of 12 Philips Semiconductors BUK98150-55A TrenchMOS™ logic level FET Contents 1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 14 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 © Koninklijke Philips Electronics N.V. 2002. Printed in The Netherlands All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 25 March 2002 Document order number: 9397 750 09435