ETC ES4428

ES4428/ES4427
Web/DVD Set-Top Box Solution
Product Brief
DESCRIPTION
ES4428 FEATURES
The ES4428/ES4427 Web/DVD Internet set-top box chipset
seamlessly combines both Web browser technology and DVD
technology into a highly integrated, low-cost solution for the next
generation of Internet set-top boxes for home use.
• On-chip hardware interface with V.90 data/fax/voice modem
The ES4428, which is based on ESS’s Programmable
Multimedia Processor (PMP) device architecture, includes a
programmable internal RISC processor core that makes it
adaptable for use in embedded systems applications such as
set-top boxes. The ES4427 companion chip supplies proper
video sync capabilities and performs NTSC- and PAL-based
video encoding and decoding as necessary to provide broadcast
quality video to the television screen.
• Configurable for browser/DVD applications
• Hardware support for infrared remote control and/or wireless
The ES4428 DVD processor integrates MPEG-based audio and
video data stream decoding for DVD/VCD/SuperVCD playback,
DVD system navigation and Dolby AC-3 decoding into a single
device. The ES4428 demuxes the incoming DVD audio and
video data streams from the DVD loader using its glueless 8/16bit parallel interface, which is hardware-compatible with many
DVD loaders. The ES4428 also supports both 8- and 16-bit
Flash/Read-Only Memory (ROM) and 8- and 16-bit Synchronous
DRAM (SDRAM) memory I/O operations.
• VideoCD 1.1 and 2.0, Interactive 3.0, Super VCD and Audio CD
The ES4428 controls data I/O transactions to and from the
ES4427 companion chip through its 8-bit Device Serial Connect
(DSC) parallel bus interface. The ES4428 also provides a 16-bit
wide hardware interface with V.90-compatible modem
subsystems incorporated into the set-top box design.
The ES4427 incorporates a multi-standard TV encoder that
supports both the NTSC and PAL formats and CCIR-601 nonsquare operations. Two microphone ADCs and PLL clock
synthesizers are incorporated in the ES4427 device architecture.
The ES4427 includes an I/O-mapped auxiliary expansion port
that interfaces with the ES4428. Four pins of the port can be
configured as edge-triggered interrupts, supporting critical
functions, such as handling remote control and modem interrupt
requests, DVD/VCD loader resets and modem board resets.
Command and register accesses are issued through the
DSC interface from the ES4428 DVD processor to the
ES4427 through the device serial communication (DSC)
interface for accessing the internal registers of the
ES4427. The DSC interface port is comprised of three
interface signals, the strobe (DSC_S), data (DSC_D), and
clock (DSC_C).
The DSC port is selected when the DSC strobe goes high
and latches the data at the rising edge of the clock. Each
16-bit DSC transfer is comprised of an address followed
by data.
The ES4428 is available in an industry-standard 208-pin Plastic
Quad Flat Pack (PQFP) package, while the ES4427 is available
in an industry-standard 100-pin PQFP package.
ESS Technology, Inc.
subsystem implemented
• 640 x 480 NTSC and 640 x 576 PAL television video formats
supported
keyboard
• On-chip MPEG audio/video decoder and system parser
• On-chip on-screen display (OSD) controller supports 4-bit
blending.
• On-chip subpicture unit (SPU) decoder supports karaoke lyric,
subtitle and closed captioning functions.
•
•
•
•
•
compatibility available with Video CD / Super VCD player
configuration
VideoCD 1.1 and 2.0, Interactive 3.0, Super VCD, Audio CD
and MP3 compatibility available with Super VCD / DVD player
configuration
DTS audio decoding supported
Programmable multimedia processor architecture
ISO/IEC 13818-2 MPEG-2 compliant
ISO/IEC 11172 MPEG-1 compliant
ES4427 FEATURES
• 8-bit DSC parallel bus interface generates edge-triggered
interupts for data read/write interfacing with ES4428
• Dual microphone and vocal assist hardware support provided
• PLL clock synthesizer based on 27 MHz crystal input generates
required clocks for video encoder, video DACs and video
processor
SOFTWARE SUPPORT
• Software stack support for the POP3, SMTP and SNMP Internet
e-mail protocols defined by RFC 821, RFC 1157and RFC 2449
• Software stack support provided for the HTTP Web browsing
protocol defined by RFC 1945, RFC 2068 and RFC 2616
• Software stack support provided for the TCP/IP Internet
protocols defined by RFC 791 and RFC 793
• Software stack support provided for RTP payload format for
•
•
•
MPEG-1/2 and H.261 video streaming protocols defined by
RFC 2032, RFC 2038 and RFC 2250
Software support for HTML 1.0, 2.0 and 3.2, *.aiff, *.au and
*.wav audio file formats and *.gif, *.jpg and *.xbm graphic file
formats, JavaScript 1.1, SSL 2.0 and SSL 3.0
Character generation and software support for English,
Big 5/GB Chinese and Japanese fonts
Software support for infrared remote control and wireless
keyboard
SAM0358-052201
1
ES4428/ES4427 PRODUCT BRIEF
ES4428 PINOUT
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105
VSS
NC
NC
NC
NC
NC
NC
NC
VCC
VSS
NC
NC
NC
NC
NC
HD15
HD14
VCC
VSS
HD13
HD12
HD11
HD10
HD9
HD8
HD7
VCC
VSS
HD6
HD5
HD4
HD3
HD2
HD1
HD0
VCC
VSS
HSYNC#
VSYNC#
PCLKQSCN
PCLK2XSCN
YUV7
YUV6
YUV5
VSS
VCC
YUV4
YUV3
YUV2
YUV1
YUV0
DCLK
Figure 1 shows the ES4428 device pinout.
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
ES4428
208-Pin PQFP Package
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
VCC
VSS
DSCK
DQM
DCS0#
VCC
VSS
DCS1#
DB15
DB14
DB13
DB12
VCC
VSS
DB11
DB10
DB9
DB8
DB7
DB6
VSS
VCC
DB5
DB4
DB3
DB2
DB1
DB0
VSS
VCC
DRAS2#/DBANKSEL0
DRAS1#/DBANKSEL1
DRAS0#
DWE#
DOE#/DSCK_EN
DCAS#
VCC
VSS
DMA11
DMA10
DMA9
DMA8
DMA7
DMA6
VSS
VCC
DMA5
DMA4
DMA3
DMA2
DMA1
DMA0
VCC
LA4
LA5
LA6
LA7
LA8
LA9
VSS
VCC
LA10
LA11
LA12
LA13
LA14
LA15
LA16
VSS
VCC
LA17
LA18
LA19
LA20
LA21
RESET#
TDMDX/RSEL
VSS
VCC
TDMDR
TDMCLK
TDMFS
TDMTSC#
TWS/SEL_PLL1
TSD/SEL_PLL0
VSS
VCC
SEL_PLL2
NC
NC
MCLK
TBCK
NC
NC
VSS
VCC
RSD
RWS
RBCK
APLLCAP
XIN
XOUT
VCC
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
VCC
NC
VPP
AUX0
AUX1
AUX2
VSS
VCC
AUX3
AUX4
AUX5
AUX6
AUX7
LOE#
VSS
VCC
LCS0#
LCS1#
LCS2#
LCS3#
VSS
LD0
LD1
LD2
LD3
LD4
VCC
VSS
LD5
LD6
LD7
LD8
LD9
LD10
LD11
VSS
VCC
LD12
LD13
LD14
LD15
LWRLL#
LWRHL#
VSS
VCC
NC
NC
LA0
LA1
LA2
LA3
VSS
Figure 1 ES4428 Device Pinout
2
SAM0358-052201
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
ES4428 PIN DESCRIPTION
Table 1 lists the pin descriptions for the ES4428.
Table 1 ES4428 Pin Descriptions
Name
Number
I/O
I
VCC
1, 9, 18, 27, 35, 44, 51,
59, 68, 75, 83, 92, 99,
104, 111, 121, 130, 139,
148, 157, 164, 172, 183,
193, 201
I
VSS
8, 17, 26, 34, 43, 52, 60,
67, 76, 84, 91, 98, 103,
112, 120, 129, 138, 147,
156, 163, 171, 177, 184,
192, 200, 208
LA[21:0]
23:19,16:10,7:2,207:204
O
Device address output.
RESET#
24
I
Reset.
TDMDX
Definition
3.3V power supply.
Ground.
O
TDM transmit data output.
I
ROM Select.
RSEL
0
1
Selection
16-bit ROM
8-bit ROM
RSEL
25
TDMDR
28
I
TDM receive data input.
TDMCLK
29
I
TDM clock input.
TDMFS
30
I
TDM frame sync.
TDMTSC#
31
O
TDM output enable.
TWS
O
Audio transmit frame sync output.
System and DSCK output clock frequency selection at reset time. The matrix
below lists the available clock frequencies and their respective PLL bit
settings..
SEL_PLL1
TSD
SEL_PLL2
0
0
0
0
1
1
1
1
32
SEL_PLL1
0
0
1
1
0
0
1
1
SEL_PLL0
0
1
0
1
0
1
0
1
Clock Output
VCO doesn’t work.
27 MHz
Bypass mode
54 MHz
121.5 MHz
81 MHz
94.5 MHz
108 MHz
33
O
I
Refer to the description and matrix for SEL_PLL1 pin 32.
36
I
Refer to the description and matrix for SEL_PLL1 pin 32.
37, 38, 41, 42, 146:142,
155:149, 158, 203:202
—
MCLK
39
I/O
Audio master clock for audio DAC.
TBCK
40
I/O
Audio transmit bit clock output.
SEL_PLL0
SEL_PLL2
NC
Audio transmit serial data output.
No connect. Leave open.
RSD
45
I
Audio receive serial data input.
RWS
46
I
Audio receive frame sync input.
RBCK
47
I
Audio receive bit clock input.
APLLCAP
48
I
Analog PLL capacitor input.
3
SAM0358-052201
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
Table 1 ES4428 Pin Descriptions (Continued)
Name
XIN
XOUT
DMA[11:0]
Number
I/O
49
I
Definition
Crystal input.
50
O
Crystal output.
66:61, 58:53
O
DRAM address bus [11:0].
DCAS#
69
O
DRAM column address strobe.
DOE#
70
O
DRAM output enable.
O
DRAM clock enable.
DWE#
71
O
DRAM write enable.
DRAS0#
72
O
DRAM row address strobe 0.
DRAS1#
73
O
DRAM row address strobe 1 (active-low).
O
DRAM address bus select 1 output. Only active in 64Mb SDRAM mode.
74
O
DRAM row address strobe 2 output.
96:93, 90:85, 82:77
I/O
DSCK_EN
DBANKSEL1
DRAS2#
DBANKSEL0
DB[15:0]
DCS[1:0]#
O
DRAM address bus select 0 output. Only active in 64Mb SDRAM mode.
DRAM data bus [15:0].
97, 100
O
SDRAM chip select [1:0].
DQM
101
O
Data input/output mask.
DSCK
102
O
Output clock to SDRAM.
DCLK
105
I
27 MHz clock input to PLL.
115:113, 110:106
O
8-bit YUV output.
116
I/O
2X pixel clock.
YUV[7:0]
PCLK2XSCN
PCLKQSCN
117
I/O
Pixel clock.
VSYNC#
118
I/O
Vertical sync.
HSYNC#
119
I/O
Horizontal sync.
HD[15:0]
141:140, 137:131,
128:122
I/O
Host data bus
VPP
AUX[7:0]
LOE#
159
I
169:165,162:160
I/O
5.0V power supply.
Auxiliary ports.
EPROM device output enable.
170
O
176:173
O
EPROM chip select [3:0].
LD[15:0]
197:194, 191:185,
182:178
I/O
EPROM device data bus.
LWRLL#
198
O
Device write enable.
LWRHL#
199
O
Device write enable (active-low).
LCS[3:0]#
4
SAM0358-052201
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
ES4427 PINOUT
VSSAA
VREF
VREFM
RSET
COMP
VSSAV
VSSAV
CDAC
VCCAV
VCCAV
YDAC
VSSAV
VSSAV
VDAC
ACAP
VCC
AUX6
AUX5
AUX4
AUX3
XOUT
VSS
VCC
XIN
VSS
NC
VSS
VCC
PCLK
2XPCLK
Figure 2 shows the ES4427 device pinout.
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
DSC_D7
81
50
MIC1
HSYN_B
82
49
MIC2
DSC_D6
83
48
AOL+
VSYN_B
84
47
AOL-
DSC_D5
85
46
AOR-
YUV7
86
45
AOR+
YUV6
87
44
VCCAA
YUV5
88
43
VREFP
YUV4
89
42
VCM
VCC
90
VSSAA
VSS
91
41
40
YUV3
92
39
AUX14
DSC_D4
93
38
AUX13
YUV2
94
37
RBCK/SER_IN
DSC_D3
95
36
AUX12/C2PO
YUV1
96
35
AUX11/IRQ
DSC_D2
97
34
AUX10
YUV0
98
RSD/SEL_PLL0
DSC_D1
99
33
32
ES4427
100-pin PQFP
VCC
VSS
NC
NC
NC
NC
VSS
VSS
RSTOUT_B
RWS/SEL_PLL1
TBCK
TSD
AUX9
TWS/SPLL_OUT
AUX8
MCLK
VCC
MUTE
AUX7
RESET_B
DCLK/EXT_CLK
AUX2
DSC_S
AUX1
DSC_D0
AUX0
DSC_C
VCC
NC
NC
VSS
NC
31
100
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
VSS
AUX15/IR
Figure 2 ES4427 Device Pinout
ES4427 PIN DESCRIPTION
Table 2 lists the pin descriptions for the ES4427.
Table 2 ES4427 Pin Descriptions
Name
Number
I/O
VSS
1, 25:26, 31, 72,
75, 77, 91, 100
I
NC
2:4, 27:30, 76
VCC
DSC_C
AUX0
Definition
Ground.
No connect.
5, 16, 32, 66, 73, 78, 90
I
5.0V power supply.
6
I
Clock for programming to access internal registers.
7
I/O
General purpose I/O.
8, 81, 83, 85,
93, 95, 97, 99
I/O
Data for programming to access internal registers.
AUX1
9
I/O
General purpose I/O.
DSC_S
10
I
AUX2
11
I/O
General purpose I/O.
DCLK
12
O
MPEG decoder output clock.
I
EXT_CLK is the external clock EXT_CLK is an input during bypass PLL mode.
Reset.
DSC_D[7:0]
EXT_CLK
Strobe for programming to access internal registers.
RESET#
13
I
AUX7
14
I/O
MUTE
15
O
Audio mute.
MCLK
17
I
Audio master clock.
5
SAM0358-052201
General purpose I/O.
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
Table 2 ES4427 Pin Descriptions (Continued)
Name
Number
I/O
Definition
AUX8
18
I/O
General purpose I/O.
TWS
19
SPLL_OUT
I
Transmit audio frame sync.
O
SPLL_OUT is the select PLL output.
AUX9
20
I/O
TSD
21
I
Transmit audio data input.
TBCK
22
RWS
SEL_PLL1
23
RSTOUT#
24
RSD
SEL_PLL0
33
General purpose I/O.
I
Transmit audio bit clock.
O
Receive audio frame sync.
I
System and DSCK output clock frequency selection at reset time. The matrix
below lists the available clock frequencies and their respective PLL bit settings..
SEL_PLL1
0
0
1
1
SEL_PLL0
0
1
0
1
DCLK
Bypass PLL (input mode)
27 MHz (output mode) Default
32.4 MHz (output mode)
40.5 MHz (output mode)
O
Reset output.
O
Receive audio data input.
I
Refer to the description and matrix for SEL_PLL1 pin 23.
AUX10
34
I/O
General purpose I/O.
AUX11
35
I/O
Interrupt output to ES4428.
AUX12
36
I/O
CD loader C2PO.
O
Receive audio bit output clock.
I
SER_IN is the serial input DSC mode. 1 = Serial DSC mode. 0 = Parallel DSC
mode.
RBCK
SER_IN
37
AUX13
38
I/O
General purpose I/O.
AUX14
39
I/O
Interrupt input from Modem DSP.
AUX15
40
I/O
VSSAA
41,51
I
Audio analog ground.
I
ADC Common Mode Reference (CMR) buffer output. CMR is approximately 2.25
V. Bypass to analog ground with 47 µF electrolytic in parallel with 0.1 µF.
43
I
DAC and ADC maximum reference. Bypass to VCMR with 10 µF in parallel with 0.1
µF.
VCCAA
44
I
5.0V analog audio power supply.
AOR+,
AOR-
45, 46
O
AOL-, AOL+
47, 48
O
Left channel output.
MIC2
49
I
Microphone input 2.
MIC1
50
I
Microphone input 1.
VREF
52
I
Internal resistor divider generates Common Mode Reference (CMR) voltage.
Bypass to analog ground with 0.1 µF.
53
I
DAC and ADC minimum reference. Bypass to VCMR with 10 µF in parallel
with 0.1 µF.
54
I
Full scale DAC current adjustment.
COMP
55
I
Compensation pin.
VSSAV
56:57, 62:63
I
Video analog ground
CDAC
58
O
Modulated chrominance output.
VCCAV
59, 60
I
Video VCC, 5 V
VCM
VREFP
VREFM
RSET
6
42
SAM0358-052201
IR interrupt Input.
Right channel output.
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
Table 2 ES4427 Pin Descriptions (Continued)
Name
Number
I/O
Definition
YDAC
61
O
Y luminance data bus for screen video port.
VDAC
64
O
Composite video output.
ACAP
65
I
Audio CAP
AUX6
67
I/O
General purpose I/O.
AUX5
68
I/O
General purpose I/O.
AUX4
69
I/O
Modem DSP reset.
AUX3
70
I/O
CD loader reset.
XOUT
71
O
Crystal output.
XIN
74
I
27 MHz crystal input.
PCLK
79
I/O
13.5 MHz pixel clock.
2XPCLK
80
I/O
27 MHz doubled pixel clock.
HSYNC#
82
O
Horizontal sync.
VSYNC#
84
O
Vertical sync.
YUV[7:0]
86:89, 92, 94, 96, 98
I
YUV data bus for screen video port.
SYSTEM BLOCK DIAGRAM
Figure 3 shows a sample system block diagram of an
ESS-based Web/DVD system.
Phone
Line
Remote
Control/
Wireless
Keyboard
ES2898
Modem DSP
ES2828
MC’97 AFE
Front Panel
Interface
Video
Encoder
ES4428
Web/DVD
Processor
Audio
DAC
SDRAM
ES4427
Companion Chip
ROM or
Flash ROM
Smart Card
(ISO 7816-3)
DVD
Drive
Figure 3 ES4428/ES4427 System Block Diagram
7
SAM0358-052201
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
MECHANICAL DIMENSIONS, ES4428
Figure 4 shows the mechanical dimensions of the ES4428.
D
D1
D3
156
105
Note:
1. All dimensions are in inches (millimeters).
104
157
2. Actual package used has millimeter native
dimensions – take care with rounding from metric
to imperial.
E3 E1
E
Symbol
Min
Nom
Max
A
–
–
0.165
A1
0.010 (0.25)
–
–
A2
0.130 (3.30)
0.134 (3.40)
0.138 (3.50)
B
0.007 (0.18)
0.009 (0.23)
0.011 (0.28)
C
0.005 (0.12)
0.006 (0.16)
0.008 (0.20)
D
1.195 (30.35)
1.205 (30.60)
1.215 (30.85)
D1
1.098 (27.90)
1.102 (28.00)
1.106 (28.10)
D3
208
53
Index
Pin 1
1
52
1.004 (25.50) REF
e
0.0197 (0.50) BASIC
E
1.195 (30.35)
1.205 (30.60)
1.215 (30.85)
E1
1.098 (27.90)
1.102 (28.00)
1.106 (28.10)
E3
A
1.004 (25.50) REF
L
0.016 (0.40)
0.020 (0.50)
0.024 (0.60)
φ
0i
2.5 i
5.0 i
e
see detail
A2
A1
B
φ
L
C
Figure 4 ES4428 Mechanical Dimensions
8
SAM0358-052201
ESS Technology, Inc.
ES4428/ES4427 PRODUCT BRIEF
MECHANICAL DIMENSIONS, ES4427
Figure 5 shows the mechanical dimensions of the ES4427.
D
D1
A2
A1
ES4427
E
E1
100-Pin PQFP
e
e1
L
b
L1
1
Millimeters
Symbol
Description
Min
Nom
Max
D
Lead to lead, X-axis
23.65
23.90
24.15
D1
Package’s outside, X-axis
19.90
20.00
20.10
E
Lead to lead, Y-axis
17.65
17.90
18.15
E1
Package’s outside, Y-axis
13.90
14.00
14.10
A1
Board standoff
0.10
0.25
0.36
A2
Package thickness
2.57
2.71
2.87
b
Lead width
0.20
0.30
0.40
e
Lead pitch
-
0.65
-
e1
Lead gap
0.24
-
-
L
Foot length
0.65
0.80
0.95
L1
Lead length
1.88
1.95
2.02
-
Foot angle
0°
-
7°
-
Coplanarity
-
-
0.102
-
Leads in X-axis
-
30
-
-
Leads in Y-axis
-
20
-
-
Total leads
-
100
-
-
Package type
-
PQFP
-
Figure 5 ES4427 Mechanical Dimensions
ESS Technology, Inc.
SAM0358-052201
9
ES4428/ES4427 PRODUCT BRIEF
ORDERING INFORMATION
Part Number
Description
Package
ES4428
Web DVD Processor
208-pin PQFP
ES4427
Companion Chip
100-pin PQFP
No part of this publication may be reproduced, stored in a
retrieval system, transmitted, or translated in any form or
by any means, electronic, mechanical, manual, optical, or
otherwise, without the prior written permission of ESS
Technology, Inc.
ESS Technology, Inc. makes no representations or
warranties regarding the content of this document.
All specifications are subject to change without prior
notice.
ESS Technology, Inc. assumes no responsibility for any
errors contained herein.
(P) U.S. Patent 4,214,125 and others, other patents
pending.
All other trademarks are owned by their respective
holders and are used for identification purposes only.
10
© 2000—2001 ESS Technology, Inc. All rights reserved.
SAM0358-052201