AMSCO NA53

CUB
NA53
R
Austria Mikro Systeme International
0.6 µm CMOS
NA53 is a 5-input NAND gate with 3x drive strength.
Truth Table
Capacitance
A
B
C
D
E
Q
L
X
X
X
X
H
X
L
X
X
X
H
X
X
L
X
X
H
X
X
X
L
X
H
X
X
X
X
L
H
H
H
H
H
H
L
Ci (pF)
A
B
C
D
E
NA53
A
B
C
D
E
Q
Area
1.22 mils
Power
2
14.31 µW / MHz
Delay [ns] = tpd.. = f(SL, L)
Output Slope [ns] = op_sl.. = f(L)
AC Characteristics :
0.050
0.050
0.053
0.056
0.056
Tj = 25°C
with SL = Input Slope [ns] ; L = Output Load [pF]
with L = Output Load [pF]
VDD = 5V
Typical Process
AC Characteristics
Characteristics
Symbol
Delay A to Q
SL = 0.1
SL = 2.0
L = 0.3
L = 2.1
L = 3.0
L = 0.3
L = 2.1
L = 3.0
tpdar
tpdaf
0.57
0.51
1.56
1.38
2.09
1.82
0.91
0.49
1.88
1.35
2.37
1.80
Delay B to Q
tpdbr
tpdbf
0.65
0.56
1.64
1.44
2.16
1.86
1.02
0.52
2.01
1.38
2.53
1.82
Delay C to Q
tpdcr
tpdcf
0.72
0.59
1.71
1.45
2.24
1.90
1.10
0.51
2.11
1.38
2.58
1.82
Delay D to Q
tpddr
tpddf
0.78
0.61
1.78
1.48
2.30
1.95
1.19
0.49
2.19
1.35
2.67
1.79
Delay E to Q
tpder
tpdef
0.84
0.61
1.83
1.50
2.35
1.92
1.26
0.44
2.25
1.30
2.74
1.73
Output Slope A to Q
op_slar
op_slaf
0.67
0.55
3.93
2.87
5.46
4.03
0.65
0.53
3.90
2.87
5.57
3.92
Output Slope B to Q
op_slbr
op_slbf
0.67
0.52
3.93
2.90
5.48
4.05
0.67
0.53
3.91
2.91
5.55
4.07
Output Slope C to Q
op_slcr
op_slcf
0.67
0.52
3.95
2.85
5.46
4.01
0.68
0.53
3.92
2.90
5.58
4.08
Output Slope D to Q
op_sldr
op_sldf
0.67
0.53
3.90
2.86
5.57
4.12
0.68
0.53
3.93
2.88
5.52
4.07
Output Slope E to Q
op_sler
op_slef
0.68
0.52
3.88
2.91
5.53
4.05
0.67
0.53
3.93
2.87
5.57
4.07
Sept. 1996
- 233 -
Rev. N/C