IRFD220 Data Sheet January 2002 0.8A, 200V, 0.800 Ohm, N-Channel Power MOSFET Features • 0.8A, 200V This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. • rDS(ON) = 0.800Ω • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Formerly developmental type TA09600. Ordering Information PART NUMBER IRFD220 Symbol PACKAGE HEXDIP BRAND D IRFD220 NOTE: When ordering, use the entire part number. G S Packaging HEXDIP DRAIN GATE SOURCE ©2002 Fairchild Semiconductor Corporation IRFD220 Rev. B IRFD220 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor (See Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg IRFD220 200 200 0.8 6.4 ±20 1.0 0.008 85 -55 to 150 UNITS V V A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to TJ = 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS V Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 9) 200 - - Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA Zero Gate Voltage Drain Current On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) IDSS ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) 2.0 - 4.0 V VDS = Rated BVDSS , VGS = 0V - - 25 µA VDS = 0.8 x Rated BVDSS , VGS = 0V, TC = 125oC - - 250 µA VDS > ID(ON) x rDS(ON)MAX , VGS = 10V (Figure 6) 0.8 - - A VGS = ±20V - - ±100 nA ID = 0.4A, VGS = 10V (Figures 7, 8) - 0.5 0.8 Ω 0.5 1.1 - S - 20 40 ns - 30 60 ns - 50 100 ns - 30 60 ns - 11 15 nC - 6.0 - nC - 5.0 - nC VDS > ID(ON) x rDS(ON)MAX , ID = 0.4A (Figure 11) VDD = 0.5 x Rated BVDSS , ID ≈≈ 0.8A, RG = 9.1Ω, RL = 74Ω, VGS = 10V, MOSFET Switching Times are Essentially Independent of Operating Temperature tf Qg(TOT) Gate to Source Charge Qgs Gate to Drain “Miller” Charge Qgd VGS = 10V, ID ≈ 0.8A, VDS = 0.8 x Rated BVDSS IG(REF) = 1.5mA, (Figure 13) Gate Charge is Essentially Independent of Operating Temperature Input Capacitance CISS - 450 - pF Output Capacitance COSS VGS = 0V, VDS = 25V, f = 1MHz (Figure 10) - 150 - pF Reverse Transfer Capacitance CRSS - 40 - pF - 4.0 - nH - 6.0 - nH - - 120 oC/W Internal Drain Inductance LD Measured from the Drain Lead, 2mm (0.08in) from Package to Center of Die Internal Source Inductance LS Measured from the Source Lead, 2mm (0.08in) from Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Devices Inductances D LD G LS S Thermal Resistance Junction to Ambient ©2002 Fairchild Semiconductor Corporation RθJA Free Air Operation IRFD220 Rev. B IRFD220 Source to Drain Diode Specifications PARAMETER SYMBOL Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) TEST CONDITIONS ISD MIN TYP MAX UNITS - - 0.8 A - - 6.4 A TJ = 25oC, ISD = 0.8A, VGS = 0V (Figure 12) - - 2.0 V TJ = 150oC, ISD = 0.8A, dISD/dt = 100A/µs TJ = 150oC, ISD = 0.8A, dISD/dt = 100A/µs - 150 - ns - 0.6 - µC Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode ISDM D G S Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge VSD trr QRR NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. 4. VDD = 25V, starting TJ = 25oC, L = 12.62mH, RG = 50Ω, peak IAS = 3.5A. Typical Performance Curves Unless Otherwise Specified 1.0 1.0 ID , DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 0.2 0.8 0.6 0.4 0.2 0 0 0 25 50 75 100 TA , AMBIENT TEMPERATURE (oC) 125 150 25 10 ID , DRAIN CURRENT (A) ID , DRAIN CURRENT (A) 10µs 100µs 1ms 10ms 100ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 0.01 1s DC 1 10 102 VDS , DRAIN TO SOURCE VOLTAGE (V) FIGURE 3. FORWARD BIAS SAFE OPERATING AREA ©2002 Fairchild Semiconductor Corporation 150 125 VGS = 10V VGS = 7V PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 8 VGS = 6V 6 4 VGS = 5V 2 VGS = 4V TC = 25oC TJ = MAX RATED 0.001 100 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs AMBIENT TEMPERATURE 10 0.1 75 TA , AMBIENT TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT TEMPERATURE 1 50 103 0 0 20 40 60 80 VDS , DRAIN TO SOURCE VOLTAGE (V) 100 FIGURE 4. OUTPUT CHARACTERISTICS IRFD220 Rev. B IRFD220 Typical Performance Curves Unless Otherwise Specified (Continued) ID(ON) , ON-STATE DRAIN CURRENT (A) 5 ID , DRAIN CURRENT (A) VGS = 10V VGS = 8V 4 VGS = 6V VGS = 5V 3 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 2 1 VGS = 4V 10 8 0 2 4 6 8 VDS , DRAIN TO SOURCE VOLTAGE (V) 10 TJ = -55oC TJ = 25oC 6 TJ = 125oC 4 2 0 0 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS > ID(ON) x rDS(ON)MAX 0 2 FIGURE 5. SATURATION CHARACTERISTICS PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 8 10 VGS = 10V, ID = 0.4A 2.2 NORMALIZED ON RESISTANCE rDS(ON) , ON-STATE RESISTANCE (Ω) 6 FIGURE 6. TRANSFER CHARACTERISTICS 1.0 0.8 VGS = 20V 0.6 VGS = 10V 0.4 0.2 0 4 VGS , GATE TO SOURCE VOLTAGE (V) 1.8 1.4 1.0 0.6 0.2 0 6 4 ID , DRAIN CURRENT (A) 2 -40 10 8 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) FIGURE 7. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 8. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 1.25 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS = CDS + CGD 800 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1000 ID = 250µA 1.15 1.05 0.95 600 CISS 400 COSS 200 0.85 CRSS 0.75 -40 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) FIGURE 9. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE ©2002 Fairchild Semiconductor Corporation 0 0 10 40 30 20 VDS , DRAIN TO SOURCE VOLTAGE (V) 50 FIGURE 10. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE IRFD220 Rev. B IRFD220 Typical Performance Curves 10 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TJ = -55oC 4 TJ = 25oC TJ = 125oC 3 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX ISD , SOURCE TO DRAIN CURRENT (A) gfs , TRANSCONDUCTANCE (S) 5 Unless Otherwise Specified (Continued) 2 1 TJ = 150oC TJ = 25oC 1 0.1 0 0 2 4 6 8 10 1 0 ID , DRAIN CURRENT (A) 2 3 VSD , SOURCE TO DRAIN VOLTAGE (V) FIGURE 11. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 12. SOURCE TO DRAIN DIODE VOLTAGE 20 VGS , GATE TO SOURCE (V) ID = 0.8A VDS = 40V 15 VDS = 100V VDS = 160V 10 5 0 4 0 8 16 12 20 Qg , GATE CHARGE (nC) FIGURE 13. GATE TO SOURCE VOLTAGE vs GATE CHARGE Test Circuits and Waveforms VDS BVDSS tP L VDS IAS VARY tP TO OBTAIN REQUIRED PEAK IAS VDD + RG VDD - VGS DUT 0V tP 0 IAS 0.01Ω FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT ©2002 Fairchild Semiconductor Corporation tAV FIGURE 15. UNCLAMPED ENERGY WAVEFORMS IRFD220 Rev. B IRFD220 Test Circuits and Waveforms (Continued) tON tOFF td(ON) td(OFF) tf tr VDS RL 90% + RG - 90% DUT VGS 0 VGS 12V BATTERY 0.2µF 50% FIGURE 17. RESISTIVE SWITCHING WAVEFORMS VDS (ISOLATED SUPPLY) VDD Qg(TOT) SAME TYPE AS DUT 50kΩ Qgd D VDS DUT G IG(REF) 0 S IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 18. GATE CHARGE TEST CIRCUIT ©2002 Fairchild Semiconductor Corporation VGS Qgs 0.3µF 0 50% PULSE WIDTH 10% FIGURE 16. SWITCHING TIME TEST CIRCUIT CURRENT REGULATOR 10% 10% 0 VDD 90% IG(REF) 0 FIGURE 19. GATE CHARGE WAVEFORMS IRFD220 Rev. B TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4