RF1S530SM Data Sheet [ /Title (RF1S 530SM ) /Subject (14A, 100V, 0.160 Ohm, NChannel Power MOSFETs) /Autho r () /Keywords (14A, 100V, 0.160 Ohm, NChannel Power MOSFETs, Intersil Corporation, TO263AB ) /Creator () February 2001 14A, 100V, 0.160 Ohm, N-Channel Power MOSFETs Features These are N-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. • rDS(ON) = 0.160Ω Formerly developmental type TA17411. Ordering Information PART NUMBER RF1S530SM PACKAGE TO-263AB File Number 1575.8 • 14A, 100V • Single Pulse Avalanche Energy Rated • SOA is Power Dissipation Limited • Nanosecond Switching Speeds • Linear Transfer Characteristics • High Input Impedance • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol D BRAND RF1S530 NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in the tape and reel, i.e., RF1S530SM9A. G S Packaging JEDEC TO-263AB DRAIN (FLANGE) GATE SOURCE Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg RF1S530SM 100 100 14 10 56 ±20 79 0.53 69 -55 to 175 UNITS V V A A A V W W/oC mJ oC 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 150oC. ©2001 Fairchild Semiconductor Corporation RF1S530SM Rev. A RF1S530SM Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS 100 - - V VGS = VDS, ID = 250µA 2 - 4.0 V VDS = 95V, VGS = 0V - - 25 µA µA Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 10) Gate to Threshold Voltage VGS(TH) Zero Gate Voltage Drain Current IDSS VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 150oC On-State Drain Current (Note 2) ID(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time rDS(ON) gfs td(ON) tr Turn-Off Delay Time Fall Time td(OFF) VDS > ID(ON) x rDS(ON) MAX, VGS = 10V VGS = ±20V ID = 8.3A, VGS = 10V (Figures 8, 9) VDS ≥ 50V, ID = 8.3A (Figure 12) VDD = 50V, ID ≈ 14A, RG ≈ 12Ω, RL = 3.4Ω MOSFET Switching Times are Essentially Independent of Operating Temperature tf Total Gate Charge (Gate to Source + Gate to Drain) Qg(TOT) VGS = 10V, ID = 14A, VDS = 0.8 x Rated BVDSS Ig(REF) = 1.5mA (Figure 14) Gate Charge is Essentially Independent of Operating Temperature - - 250 14 - - A - - ±500 nA Ω - 0.14 0.16 5.1 7.6 - S - 12 15 ns - 35 65 ns - 25 70 ns - 25 59 ns - 18 30 nC - 4 - nC - 7 - nC - 600 - pF pF Gate to Source Charge Qgs Gate to Drain “Miller” Charge Qgd Input Capacitance CISS Output Capacitance COSS - 250 - Reverse Transfer Capacitance CRSS - 50 - pF - 3.5 - nH - 4.5 - nH - 7.5 - nH - - 1.9 oC/W Internal Drain Inductance LD VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) Measured from the Contact Screw on Tab To Center of Die Measured from the Drain Lead, 6mm (0.25in) from Package to Center of Die Internal Source Inductance LS Modified MOSFET Symbol Showing the Internal Devices Inductances Measured from the Source Lead, 6mm (0.25in) From Header to Source Bonding Pad D LD G LS S Thermal Resistance Junction to Case RθJC Thermal Resistance Junction to Ambient RθJA Free Air Operation - - 62.5 oC/W RθJA RF1S540SM Mounted on FR-4 Board with Minimum Mounting Pad - - 62 oC/W MIN TYP MAX UNITS - - 14 A - - 56 A Source to Drain Diode Specifications PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 2) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode D G S Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge VSD TJ = 25oC, ISD = 14A, VGS = 0V (Figure 13) - - 2.5 V trr TJ = 25oC, ISD = 14A, dISD/dt = 100A/µs 5.5 120 250 ns QRR TJ = 25oC, ISD = 14A, dISD/dt = 100A/µs 0.17 0.6 1.3 µC NOTES: 2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 25V, starting TJ = 25oC, L = 530µH, RG = 25Ω, peak IAS = 14A (Figures 15, 16). ©2001 Fairchild Semiconductor Corporation RF1S530SM Rev. A RF1S530SM Typical Performance Curves Unless Otherwise Specified 15 1.0 12 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 9 6 3 0.2 0 0 125 50 75 100 TC , CASE TEMPERATURE (oC) 25 0 150 25 175 75 100 150 125 175 TC , CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE ZθJC, TRANSIENT THERMAL IMPEDANCE 50 FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 10 1 0.5 0.2 PDM 0.1 0.1 0.05 t1 0.02 0.01 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC + TC SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 0.1 10 1 t P , RECTANGULAR PULSE DURATION (s) FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE 25 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10 3 10 2 10µs 100µs 10 1ms 10ms 1 0.1 TC = 25oC TJ = 175oC SINGLE PULSE 1 10 10 2 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 4. FORWARD BIAS SAFE OPERATING AREA ©2001 Fairchild Semiconductor Corporation VGS = 7V VGS = 10V VGS = 8V 20 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 15 VGS = 6V 10 VGS = 5V 5 VGS = 4V 0 10 3 0 10 20 30 40 50 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 5. OUTPUT CHARACTERISTICS RF1S530SM Rev. A RF1S530SM Typical Performance Curves Unless Otherwise Specified (Continued) ID, DRAIN CURRENT (A) PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX IDS(ON), DRAIN TO SOURCE CURRENT (A) 25 VGS = 8V 20 VGS = 7V VGS = 10V 15 VGS = 6V 10 VGS = 5V 5 VGS = 4V 0 0 2 1 3 100 10 175oC 0.1 0 VDS, DRAIN TO SOURCE VOLTAGE (V) NORMALIZED ON RESISTANCE rDS(ON), ON-STATE RESISTANCE (Ω) 3.0 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 1.2 0.9 0.6 VGS = 10V 0.3 VGS = 20V 0 0 12 36 24 48 10 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 14A 2.4 1.8 1.2 0.6 0 -60 -40 -20 60 0 20 40 60 80 100 120 140 160 180 TJ , JUNCTION TEMPERATURE (oC) ID, DRAIN CURRENT (A) FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT 1500 1.25 ID = 250µA 1.15 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 1200 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 7. TRANSFER CHARACTERISTICS FIGURE 6. SATURATION CHARACTERISTICS 1.5 25oC 1 5 4 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS ≥ 50V 1.05 0.95 0.85 900 CISS 600 COSS 300 0.75 -60 -40 -20 CRSS 0 20 40 60 80 100 120 140 160 180 TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE ©2001 Fairchild Semiconductor Corporation 0 1 102 10 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE RF1S530SM Rev. A RF1S530SM Typical Performance Curves PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDS ≥ 50V 8 6 100 ISD, SOURCE TO DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE (S) 10 Unless Otherwise Specified (Continued) 25oC 175oC 4 2 10 5 10 15 0.1 25 20 25oC 175oC 1 0 0 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 0.4 0.8 1.2 1.6 VSD , SOURCE TO DRAIN VOLTAGE (V) 0 I D , DRAIN CURRENT (A) FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT 2.0 FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 20 VGS, GATE TO SOURCE (V) ID = 14A VDS = 50V 16 VDS = 20V 12 VDS = 80V 8 4 0 0 6 12 18 24 30 QG , GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE Test Circuits and Waveforms VDS BVDSS tP L VDS IAS VARY tP TO OBTAIN REQUIRED PEAK IAS VDD + RG - VGS VDD DUT 0V tP 0 IAS 0.01Ω FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT ©2001 Fairchild Semiconductor Corporation tAV FIGURE 16. UNCLAMPED ENERGY WAVEFORMS RF1S530SM Rev. A RF1S530SM Test Circuits and Waveforms (Continued) tON tOFF td(ON) td(OFF) tf tr VDS RL 90% + RG - 10% 10% 0 VDD 90% 90% DUT VGS 0 50% 50% PULSE WIDTH 10% VGS FIGURE 18. RESISTIVE SWITCHING WAVEFORMS FIGURE 17. SWITCHING TIME TEST CIRCUIT VDS (ISOLATED SUPPLY) CURRENT REGULATOR 12V BATTERY 0.2µF VDD Qg(TOT) SAME TYPE AS DUT 50kΩ Qgd Qgs 0.3µF D Ig(REF) VDS DUT G 0 S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT ©2001 Fairchild Semiconductor Corporation VGS IG(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS RF1S530SM Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ Star* Power™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ UltraFET VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H1