RFP15N05L, RFP15N06L Data Sheet January 2002 15A, 50V and 60V, 0.140 Ohm, Logic Level N-Channel Power MOSFETs Features • 15A, 50V and 60V These are N-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. • rDS(ON) = 0.140Ω Formerly developmental type TA0522. • Nanosecond Switching Speeds Ordering Information • Linear Transfer Characteristics PART NUMBER PACKAGE BRAND RFP15N05L TO-220AB RFP15N05L RFP15N06L TO-220AB RFP15N06L NOTE: When ordering, use the entire part number. • Design Optimized for 5V Gate Drives • Can be Driven from QMOS, NMOS, TTL Circuits • Compatible with Automotive Drive Requirements • SOA is Power Dissipation Limited • High Input Impedance • Majority Carrier Device • Related Literature - TB334 “Guidelines for Soldering Surface Mount Components to PC Boards” Symbol D G S Packaging JEDEC TO-220AB DRAIN (TAB) ©2002 Fairchild Semiconductor Corporation SOURCE DRAIN GATE RFP15N05L, RFP15N06L Rev. B RFP15N05L, RFP15N06L Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Above TC = 25oC, Derate Linearly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg RFP15N05L 50 50 15 40 ±10 60 0.48 -55 to 150 RFP15N06L 60 60 15 40 ±10 60 0.48 -55 to 150 UNITS V V A A V W W/oC oC 300 260 300 260 oC oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER MIN TYP MAX UNITS RFP15N05L 50 - - V RFP15N06L 60 - - V VGS = VDS, ID = 250µA (Figure 7) 1 - 2 V VDS = 48V, VDS = 50V - - 1 µA - - 50 µA VGS = ±10V, VDS = 0V - - 100 nA ID = 15A, VGS = 5V (Figures 5, 6) - - 0.140 Ω VDS = 25V, VGS = 0V, f = 1MHz (Figure 8) - - 900 pF Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS ID = 250µA, VGS = 0V VDS = 48V, VDS = 50V Gate to Source Leakage Current Drain to Source On Resistance (Note 2) IGSS rDS(ON) TC = 125oC Input Capacitance CISS Output Capacitance COSS - - 450 pF Reverse-Transfer Capacitance CRSS - - 200 pF Turn-On Delay Time td(ON) - 16 40 ns tr - 250 325 ns td(OFF) - 200 325 ns VGS = 5V - 225 325 ns RFP15N05L, RFP15N06L - - 2.083 oC/W MIN TYP MAX UNITS ISD = 7.5A - - 1.4 V ISD = 4A, dISD/dt = 100A/µs - 225 - ns Rise Time Turn-Off Delay Time Fall Time tf RθJC VDD = 30V, ID = 7.5A, RG = 6.25Ω (Figures 10, 11) Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage (Note 2) Diode Reverse Recovery Time SYMBOL VSD trr TEST CONDITIONS NOTE: 2. Pulsed: pulse duration = ≤ 300µs maximum, duty cycle = ≤ 2%. 3. Repititive rating: pulse width limited by maximum junction temperature. ©2002 Fairchild Semiconductor Corporation RFP15N05L, RFP15N06L Rev. B RFP15N05L, RFP15N06L Typical Performance Curves Unless Otherwise Specified POWER DISSIPATION MULTIPLIER 1.2 100 TC = 25oC CURVES MUST BE DERATED LINEARLY WITH INCREASE IN TEMPERATURE ID, DRAIN CURRENT (A) 1.0 0.8 0.6 0.4 ID MAX CONTINUOUS DC 10 ER AT I 0 50 100 1 RFP15N05L 0 150 1 FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE 16 PULSE DURATION = 80µs DUTY CYCLE ≤ 0.5% MAX TC = 25oC VGS = 7.5V IDS, DRAIN TO SOURCE CURRENT IDS, DRAIN TO SOURCE CURRENT (A) 1000 FIGURE 2. FORWARD BIAS SAFE OPERATING AREA 40 30 VGS = 5V VGS = 10V VGS = 4.5V 20 VGS = 4V VGS = 3.5V 10 VGS = 3V VGS = 2.5V VGS = 2V 0 0 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) 5 VDS = 10V PULSE DURATION = 80µs DUTY CYCLE ≤ 0.5% MAX 14 -40oC 10 25oC 8 6 4 2 0 125oC 0 -40oC 1 2 3 4 VGS, GATE TO SOURCE VOLTAGE (V) 5 FIGURE 4. TRANSFER CHARACTERISTICS 2.0 0.3 NORMALIZED DRAIN TO SOURCE ON RESISTANCE VGS = 5V PULSE DURATION = 80µs DUTY CYCLE ≤ 0.5% MAX 0.2 TC = 125oC 25oC 0.1 -40oC 0 125oC 12 FIGURE 3. SATURATION CHARACTERISTICS ON RESISTANCE (Ω) RFP15N06L 10 100 VDS, DRAIN SOURCE VOLTAGE (V) TC, CASE TEMPERATURE (oC) rDS(ON), DRAIN TO SOURCE ON OPERATION IN THIS AREA IS LIMITED BY rDS(ON) 0.2 0 OP 0 2 4 6 8 10 12 ID, DRAIN TO SOURCE CURRENT (A) 14 16 FIGURE 5. DRAIN TO SOURCE ON RESISTANCE vs DRAIN CURRENT ©2002 Fairchild Semiconductor Corporation VGS = 10V, ID = 15A PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 1.5 1 0.5 0 -50 0 50 100 150 TJ, JUNCTION TEMPERATURE (oC) 200 FIGURE 6. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE RFP15N05L, RFP15N06L Rev. B RFP15N05L, RFP15N06L Typical Performance Curves Unless Otherwise Specified (Continued) 1600 1.4 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS ≈ CDS + CGD 1400 ID = 250µA 1200 C, CAPACITANCE (pF) 1.2 1 0.8 1000 CISS 800 600 COSS 400 CRSS 200 0.6 -50 0 0 50 100 150 TJ, JUNCTION TEMPERATURE (oC) 200 FIGURE 7. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE 0 10 20 30 40 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 8. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 10 60 RL = 4Ω IG(REF) = 0.5mA VGS = 5V BVDSS DRAIN TO SOURCE VOLTAGE (V) 50 45 8 GATE SOURCE VOLTAGE VDD = BVDSS 30 6 VDD = BVDSS 4 0.75BVDSS 0.50BVDSS 0.25BVDSS 15 2 DRAIN SOURCE VOLTAGE GATE TO SOURCE VOLTAGE (V) NORMALIZED GATE THRESHOLD VOLTAGE VGS = VDS 0 0 20 IG (REF) IG (ACT) 80 t, TIME (µs) IG (REF) IG (ACT) NOTE: Refer to Fairchild Application Notes AN7254 and AN7260. FIGURE 9. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT Test Circuits and Waveforms tON tOFF td(ON) td(OFF) tr RL VDS tf 90% 90% + RG - VDD 10% 0 10% DUT 90% VGS VGS 0 FIGURE 10. SWITCHING TIME TEST CIRCUIT ©2002 Fairchild Semiconductor Corporation 10% 50% 50% PULSE WIDTH FIGURE 11. RESISTIVE SWITCHING WAVEFORMS RFP15N05L, RFP15N06L Rev. B RFP15N05L, RFP15N06L Test Circuits and Waveforms (Continued) VDS VDD RL Qg(TOT) VDS VGS = 10V VGS Qg(5) + VDD DUT IG(REF) VGS = 5V VGS - VGS = 1V 0 Qg(TH) IG(REF) 0 FIGURE 12. GATE CHARGE TEST CIRCUIT ©2002 Fairchild Semiconductor Corporation FIGURE 13. GATE CHARGE WAVEFORMS RFP15N05L, RFP15N06L Rev. B TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4