HARRIS ICL8038AMJD

ICL8038
S E M I C O N D U C T O R
Precision Waveform Generator/
Voltage Controlled Oscillator
November 1996
Features
Description
• Low Frequency Drift with Temperature . . . 250ppm/oC
The ICL8038 waveform generator is a monolithic integrated
circuit capable of producing high accuracy sine, square, triangular, sawtooth and pulse waveforms with a minimum of
external components. The frequency (or repetition rate) can
be selected externally from 0.001Hz to more than 300kHz
using either resistors or capacitors, and frequency modulation and sweeping can be accomplished with an external
voltage. The ICL8038 is fabricated with advanced monolithic
technology, using Schottky barrier diodes and thin film resistors, and the output is stable over a wide range of temperature and supply variations. These devices may be interfaced
with phase locked loop circuitry to reduce temperature drift
to less than 250ppm/oC.
• Low Distortion . . . . . . . . . . . . . 1% (Sine Wave Output)
• High Linearity . . . . . . . . . 0.1% (Triangle Wave Output)
• Wide Frequency Range . . . . . . . . . . 0.001Hz to 300kHz
• Variable Duty Cycle . . . . . . . . . . . . . . . . . . . . 2% to 98%
• High Level Outputs . . . . . . . . . . . . . . . . . . . . TTL to 28V
• Simultaneous Sine, Square, and Triangle Wave
Outputs
• Easy to Use - Just a Handful of External Components
Required
Ordering Information
STABILITY
TEMP. RANGE (oC)
0 to 70
14 Ld PDIP
E14.3
ICL8038CCJD
250ppm/oC (Typ)
250ppm/oC (Typ)
0 to 70
14 Ld CERDIP
F14.3
ICL8038BCJD
180ppm/oC (Typ)
0 to 70
14 Ld CERDIP
F14.3
ICL8038ACJD
0 to 70
14 Ld CERDIP
F14.3
ICL8038BMJD (Note)
120ppm/oC (Typ)
350ppm/oC (Max)
-55 to 125
14 Ld CERDIP
F14.3
ICL8038AMJD (Note)
250ppm/oC (Max)
-55 to 125
14 Ld CERDIP
F14.3
PART NUMBER
ICL8038CCPD
PACKAGE
PKG. NO.
NOTE: Add /883B to part number if 883 processing is required.
Pinout
Functional Diagram
ICL8038
(PDIP, CERDIP)
TOP VIEW
V+
6
CURRENT
SOURCE
#1
COMPARATOR
#1
I
SINE WAVE 1
ADJUST
14 NC
SINE
WAVE OUT
2
13 NC
TRIANGLE
OUT
3
12 SINE WAVE
ADJUST
4
11 V- OR GND
5
10 TIMING
CAPACITOR
DUTY CYCLE
FREQUENCY
ADJUST
V+
FM BIAS
6
7
10
2I
9
SQUARE
WAVE OUT
8
FM SWEEP
INPUT
C
CURRENT
SOURCE
#2
COMPARATOR
#2
FLIP-FLOP
V- OR GND
11
BUFFER
9
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1996
8-153
SINE
CONVERTER
BUFFER
3
2
File Number
2864.2
ICL8038
Absolute Maximum Ratings
Thermal Information
Supply Voltage (V- to V+) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V
Input Voltage (Any Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V- to V+
Input Current (Pins 4 and 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA
Output Sink Current (Pins 3 and 9) . . . . . . . . . . . . . . . . . . . . . 25mA
Thermal Resistance (Typical, Note 1)
θJA (oC/W) θJC (oC/W)
CERDIP Package . . . . . . . . . . . . . . . .
75
20
PDIP Package . . . . . . . . . . . . . . . . . . .
115
N/A
Maximum Junction Temperature (Ceramic Package) . . . . . . . . 175oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range
ICL8038AM, ICL8038BM . . . . . . . . . . . . . . . . . . . -55oC to 125oC
ICL8038AC, ICL8038BC, ICL8038CC . . . . . . . . . . . .0oC to 70oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
VSUPPLY = ±10V or +20V, TA = 25oC, RL = 10kΩ, Test Circuit Unless Otherwise Specified
PARAMETER
SYMBOL
Supply Voltage Operating Range
VSUPPLY
Supply Current
TEST
CONDITIONS
ICL8038CC
MIN
TYP MAX
ICL8038BC(BM)
ICL8038AC(AM)
MIN
MIN
TYP MAX
TYP MAX
UNITS
V+
Single Supply
+10
-
+30
+10
-
+30
+10
-
+30
V
V+, V-
Dual Supplies
±5
-
±15
±5
-
±15
±5
-
±5
V
-
-
-
12
15
-
12
15
mA
ISUPPLY
8038AM 8038BM
VSUPPLY = ±10V
(Note 2)
8038AC, 8038BC, 8038CC
12
20
-
12
20
-
12
20
mA
FREQUENCY CHARACTERISTICS (All Waveforms)
Max. Frequency of Oscillation
fMAX
100
-
-
100
-
-
100
-
-
kHz
Sweep Frequency of FM Input
fSWEEP
-
10
-
-
10
-
-
10
-
kHz
Sweep FM Range
(Note 3)
-
35:1
-
-
35:1
-
-
35:1
-
FM Linearity
10:1 Ratio
-
0.5
-
-
0.2
-
-
0.2
-
8038AC, 8038BC, 8038CC
0oC to 70oC
-
250
-
-
180
-
-
120
8038AM, 8038BM
-55oC to 125oC
-
-
-
-
350
-
-
250
ppm/oC
Over Supply
Voltage Range
-
-
-
0.05
-
0.05
-
%/V
Frequency Drift with
Temperature (Note 5)
Frequency Drift with Supply Voltage
%
∆f/∆T
∆f/∆V
0.05
ppm/oC
OUTPUT CHARACTERISTICS
Square Wave
-
Leakage Current
IOLK
V9 = 30V
-
-
1
-
-
1
-
-
1
µA
Saturation Voltage
VSAT
ISINK = 2mA
-
0.2
0.5
-
0.2
0.4
-
0.2
0.4
V
Rise Time
tR
RL = 4.7kΩ
-
180
-
-
180
-
-
180
-
ns
Fall Time
tF
RL = 4.7kΩ
-
40
-
-
40
-
-
40
-
ns
Typical Duty Cycle Adjust
(Note 6)
∆D
98
2
-
98
2
-
98
%
2
Triangle/Sawtooth/Ramp
Amplitude
VTRIAN-
RTRI = 100kΩ
0.30 0.33
-
0.30 0.33
-
0.30 0.33
-
xVSUPPLY
-
%
GLE
Linearity
-
8-154
0.1
-
-
0.05
-
-
0.05
ICL8038
Electrical Specifications
PARAMETER
VSUPPLY = ±10V or +20V, TA = 25oC, RL = 10kΩ, Test Circuit Unless Otherwise Specified (Continued)
SYMBOL
Output Impedance
TEST
CONDITIONS
ZOUT
IOUT = 5mA
VSINE
RSINE = 100kΩ
ICL8038CC
MIN
TYP MAX
ICL8038BC(BM)
ICL8038AC(AM)
MIN
MIN
TYP MAX
TYP MAX
UNITS
-
200
-
-
200
-
-
200
-
Ω
0.2
0.22
-
0.2
0.22
-
0.2
0.22
-
xVSUPPLY
Sine Wave
Amplitude
THD
THD
RS = 1MΩ
(Note 4)
-
2.0
5
-
1.5
3
-
1.0
1.5
%
THD Adjusted
THD
Use Figure 4
-
1.5
-
-
1.0
-
-
0.8
-
%
NOTES:
2. RA and RB currents not included.
3. VSUPPLY = 20V; RA and RB = 10kΩ, f ≅ 10kHz nominal; can be extended 1000 to 1. See Figures 5A and 5B.
4. 82kΩ connected between pins 11 and 12, Triangle Duty Cycle set at 50%. (Use RA and RB.)
5. Figure 1, pins 7 and 8 connected, VSUPPLY = ±10V. See Typical Curves for T.C. vs VSUPPLY.
6. Not tested, typical value for design purposes only.
Test Conditions
PARAMETER
RA
RB
RL
C
SW1
MEASURE
Supply Current
10kΩ
10kΩ
10kΩ
3.3nF
Closed
Current Into Pin 6
Sweep FM Range (Note 7)
10kΩ
10kΩ
10kΩ
3.3nF
Open
Frequency at Pin 9
Frequency Drift with Temperature
10kΩ
10kΩ
10kΩ
3.3nF
Closed
Frequency at Pin 3
Frequency Drift with Supply Voltage (Note 8)
10kΩ
10kΩ
10kΩ
3.3nF
Closed
Frequency at Pin 9
Sine
10kΩ
10kΩ
10kΩ
3.3nF
Closed
Pk-Pk Output at Pin 2
Triangle
10kΩ
10kΩ
10kΩ
3.3nF
Closed
Pk-Pk Output at Pin 3
Leakage Current (Off) (Note 9)
10kΩ
10kΩ
3.3nF
Closed
Current into Pin 9
Saturation Voltage (On) (Note 9)
10kΩ
10kΩ
3.3nF
Closed
Output (Low) at Pin 9
Rise and Fall Times (Note 11)
10kΩ
10kΩ
4.7kΩ
3.3nF
Closed
Waveform at Pin 9
Max
50kΩ
~1.6kΩ
10kΩ
3.3nF
Closed
Waveform at Pin 9
Min
~25kΩ
50kΩ
10kΩ
3.3nF
Closed
Waveform at Pin 9
Triangle Waveform Linearity
10kΩ
10kΩ
10kΩ
3.3nF
Closed
Waveform at Pin 3
Total Harmonic Distortion
10kΩ
10kΩ
10kΩ
3.3nF
Closed
Waveform at Pin 2
Output Amplitude (Note 10)
Duty Cycle Adjust (Note 11)
NOTES:
7. The hi and lo frequencies can be obtained by connecting pin 8 to pin 7 (fHI) and then connecting pin 8 to pin 6 (fLO). Otherwise apply
Sweep Voltage at pin 8 (2/3 VSUPPLY +2V) ≤ VSWEEP ≤ VSUPPLY where VSUPPLY is the total supply voltage. In Figure 5B, pin 8 should
vary between 5.3V and 10V with respect to ground.
8. 10V ≤ V+ ≤ 30V, or ±5V ≤ VSUPPLY ≤ ±15V.
9. Oscillation can be halted by forcing pin 10 to +5V or -5V.
10. Output Amplitude is tested under static conditions by forcing pin 10 to 5V then to -5V.
11. Not tested; for design purposes only.
8-155
ICL8038
Test Circuit
+10V
4
7
RL
10K
RB
10K
RA
10K
5
6
9
SW1
N.C.
ICL8038
8
3
RTRI
10
12 2
11
C
3300pF
RSINE
82K
-10V
FIGURE 1. TEST CIRCUIT
Detailed Schematic
6
CURRENT SOURCES
R1
8
11K
7
Q1
Q2
V+
REXT B
REXT A
5
4
R41
4K
R32
5.2K
Q14
Q48
R8
5K
Q3
R2
Q
39K 6
Q4
R19
Q5
Q9
Q8
10
Q16Q17
CEXT
Q10
R3
30K
Q18
Q15
R46
40K
Q11
R7B
R7A
15K
10K
Q12
Q30
R4
100
Q32
R5
100
R13
620
Q24
R10
5K
R11
270
Q23
R12
2.7K
Q25
R16
1.8K
Q35
Q28
Q26
Q49
R22
10K
R43
27K
R14
27K
9
10K
Q41
Q27
R15
470
Q29
R35
330
Q43
Q42
R25
33K
R26
33K
R27
33K
R45
33K
R28
33K
R29
33K
R30
33K
R31
33K
Q22
Q19
R6
100
Q33
Q34
2.7K
R21
R9
5K
R34
375
Q45
Q44
Q20 Q21
Q13
Q31
Q46
800
R20
COMPARATOR
Q7
1
R33
200
Q47
R17
4.7K
R18
4.7K
R41
27K
R23
Q37
Q39
Q36 Q
38
Q40
3 R44
1K
2.7K
R24
Q50
R37
330
Q51
Q52
R38
375
Q53
Q54
800
R39
200
Q55
Q56
R42
BUFFER AMPLIFIER
27K
11
R36
1600
2
R40
5.6K
12
REXTC
82K
SINE CONVERTER
FLIP-FLOP
Application Information (See Functional Diagram)
An external capacitor C is charged and discharged by two current sources. Current source #2 is switched on and off by a flipflop, while current source #1 is on continuously. Assuming that
the flip-flop is in a state such that current source #2 is off, and
the capacitor is charged with a current I, the voltage across the
capacitor rises linearly with time. When this voltage reaches the
level of comparator #1 (set at 2/3 of the supply voltage), the flipflop is triggered, changes states, and releases current source
#2. This current source normally carries a current 2I, thus the
capacitor is discharged with a net-current I and the voltage
across it drops linearly with time. When it has reached the level
of comparator #2 (set at 1/3 of the supply voltage), the flip-flop
is triggered into its original state and the cycle starts again.
Four waveforms are readily obtainable from this basic generator circuit. With the current sources set at I and 2I respectively, the charge and discharge times are equal. Thus a
triangle waveform is created across the capacitor and the
flip-flop produces a square wave. Both waveforms are fed to
buffer stages and are available at pins 3 and 9.
8-156
ICL8038
The levels of the current sources can, however, be selected
over a wide range with two external resistors. Therefore, with
the two currents set at values different from I and 2I, an
asymmetrical sawtooth appears at Terminal 3 and pulses
with a duty cycle from less than 1% to greater than 99% are
available at Terminal 9.
The sine wave is created by feeding the triangle wave into a
nonlinear network (sine converter). This network provides a
decreasing shunt impedance as the potential of the triangle
moves toward the two extremes.
Waveform Timing
The symmetry of all waveforms can be adjusted with the
external timing resistors. Two possible ways to accomplish
this are shown in Figure 3. Best results are obtained by
keeping the timing resistors RA and RB separate (A). RA
controls the rising portion of the triangle and sine wave and
the 1 state of the square wave.
The magnitude of the triangle waveform is set at 1/3
VSUPPLY; therefore the rising portion of the triangle is,
The falling portion of the triangle and sine wave and the 0
state of the square wave is:
t
2
R R C
C × 1/3V SUPPLY
A B
C×V
= ------------- = ----------------------------------------------------------------------------------- = -------------------------------------V
1
V
( 2R A – R B )
0.66
SUPPLY
SUPPLY
2 ( 0.22 ) ------------------------ – 0.22 -----------------------R
R
B
A
Thus a 50% duty cycle is achieved when RA = RB.
If the duty cycle is to be varied over a small range about 50%
only, the connection shown in Figure 3B is slightly more convenient. A 1kΩ potentiometer may not allow the duty cycle to
be adjusted through 50% on all devices. If a 50% duty cycle
is required, a 2kΩ or 5kΩ potentiometer should be used.
With two separate timing resistors, the frequency is given by:
1
1
f = ---------------- = -----------------------------------------------------t1 + t2
RAC 
RB

------------ 1 + -------------------------
0.66 
2R A – R B 
or, if RA = RB = R
0.33
f = ----------- (for Figure 3A)
RC
Neither time nor frequency are dependent on supply voltage,
even though none of the voltages are regulated inside the
integrated circuit. This is due to the fact that both currents
and thresholds are direct, linear functions of the supply voltage and thus their effects cancel.
RA × C
C × 1/3 × V SUPPLY × R A
C×V
t 1 = -------------- = ------------------------------------------------------------------- = -----------------I
0.22 × V SUPPLY
0.66
FIGURE 2A. SQUARE WAVE DUTY CYCLE - 50%
FIGURE 2B. SQUARE WAVE DUTY CYCLE - 80%
FIGURE 2. PHASE RELATIONSHIP OF WAVEFORMS
V+
V+
RA
7
4
RL
RB
5
6
1kΩ
RA
9
7
8
ICL8038
10
11
C
3
4
5
10
82K
11
C
V- OR GND
6
ICL8038
8
12 2
RL
RB
9
3
12 2
100K
V- OR GND
FIGURE 3A.
FIGURE 3B.
FIGURE 3. POSSIBLE CONNECTIONS FOR THE EXTERNAL TIMING RESISTORS
8-157
ICL8038
Reducing Distortion
To minimize sine wave distortion the 82kΩ resistor between
pins 11 and 12 is best made variable. With this arrangement
distortion of less than 1% is achievable. To reduce this even
further, two potentiometers can be connected as shown in
Figure 4; this configuration allows a typical reduction of sine
wave distortion close to 0.5%.
V+
1kΩ
RA
7
4
5
8
RL
RB
6
ICL8038
10
11
12
9
3
1
2
100kΩ
10kΩ
C
100kΩ
10kΩ
V- OR GND
FIGURE 4. CONNECTION TO ACHIEVE MINIMUM SINE WAVE
DISTORTION
output can be made TTL compatible (load resistor connected to +5V) while the waveform generator itself is powered from a much higher voltage.
Frequency Modulation and Sweeping
The frequency of the waveform generator is a direct function
of the DC voltage at Terminal 8 (measured from V+). By
altering this voltage, frequency modulation is performed. For
small deviations (e.g. ±10%) the modulating signal can be
applied directly to pin 8, merely providing DC decoupling
with a capacitor as shown in Figure 5A. An external resistor
between pins 7 and 8 is not necessary, but it can be used to
increase input impedance from about 8kΩ (pins 7 and 8 connected together), to about (R + 8kΩ).
For larger FM deviations or for frequency sweeping, the
modulating signal is applied between the positive supply
voltage and pin 8 (Figure 5B). In this way the entire bias for
the current sources is created by the modulating signal, and
a very large (e.g. 1000:1) sweep range is created (f = 0 at
VSWEEP = 0). Care must be taken, however, to regulate the
supply voltage; in this configuration the charge current is no
longer a function of the supply voltage (yet the trigger thresholds still are) and thus the frequency becomes dependent on
the supply voltage. The potential on Pin 8 may be swept
down from V+ by (1/3 VSUPPLY - 2V).
V+
Selecting RA, RB and C
R 1 × ( V+ – V- ) 1
0.22 ( V+ – V- )
I = ---------------------------------------- × -------- = -----------------------------------( R1 + R2 )
RA
RA
RB
RA
For any given output frequency, there is a wide range of RC
combinations that will work, however certain constraints are
placed upon the magnitude of the charging current for optimum performance. At the low end, currents of less than 1µA
are undesirable because circuit leakages will contribute significant errors at high temperatures. At higher currents
(I > 5mA), transistor betas and saturation voltages will contribute increasingly larger errors. Optimum performance will,
therefore, be obtained with charging currents of 10µA to
1mA. If pins 7 and 8 are shorted together, the magnitude of
the charging current due to RA can be calculated from:
4
7
RL
5
6
9
R
8
FM
ICL8038
10
3
12 2
11
C
81K
V- OR GND
FIGURE 5A. CONNECTIONS FOR FREQUENCY MODULATION
R1 and R2 are shown in the Detailed Schematic.
V+
A similar calculation holds for RB.
The capacitor value should be chosen at the upper end of its
possible range.
SWEEP
VOLTAGE
4
RL
RB
RA
5
6
9
Waveform Out Level Control and Power Supplies
The waveform generator can be operated either from a single power supply (10V to 30V) or a dual power supply (±5V
to ±15V). With a single power supply the average levels of
the triangle and sine wave are at exactly one-half of the supply voltage, while the square wave alternates between V+
and ground. A split power supply has the advantage that all
waveforms move symmetrically about ground.
The square wave output is not committed. A load resistor
can be connected to a different power supply, as long as the
applied voltage remains within the breakdown capability of
the waveform generator (30V). In this way, the square wave
8-158
8
ICL8038
10
11
C
3
12 2
81K
V- OR GND
FIGURE 5B. CONNECTIONS FOR FREQUENCY SWEEP
FIGURE 5.
ICL8038
Typical Applications
The sine wave output has a relatively high output impedance
(1kΩ Typ). The circuit of Figure 6 provides buffering, gain
and amplitude adjustment. A simple op amp follower could
also be used.
+10V
1N457
DUTY CYCLE
0.1µF
4
5
6
2
AMPLITUDE
100K
8
5
+
741
10K
FREQ.
-
ICL8038
10
20K
V-
With a dual supply voltage the external capacitor on Pin 10 can
be shorted to ground to halt the ICL8038 oscillation. Figure 7
shows a FET switch, diode ANDed with an input strobe signal
to allow the output to always start on the same slope.
V+
4
15K
5
9
ICL8038
8
1N914
11
10
2
1N914
C
STROBE
2N4392
-15V
100K
OFF
6
9
3
≈15M
11
0.0047µF
12 2
DISTORTION
100K
-10V
IGURE 8. VARIABLE AUDIO OSCILLATOR, 20Hz TO 20kHzY
FIGURE 6. SINE WAVE OUTPUT BUFFER AMPLIFIERS
RB
ICL8038
10
4.7K
11
RA
8
4
20K
C
7
4.7K
RB
RA
7
15K
1K
4.7K
V+
+15V (+10V)
-15V (-10V)
ON
FIGURE 7. STROBE TONE BURST GENERATOR
To obtain a 1000:1 Sweep Range on the ICL8038 the voltage across external resistors RA and RB must decrease to
nearly zero. This requires that the highest voltage on control
Pin 8 exceed the voltage at the top of RA and RB by a few
hundred mV. The Circuit of Figure 8 achieves this by using a
diode to lower the effective supply voltage on the ICL8038.
The large resistor on pin 5 helps reduce duty cycle variations
with sweep.
The linearity of input sweep voltage versus output frequency
can be significantly improved by using an op amp as shown
in Figure 9.
8-159
ICL8038
R1
FM BIAS
V1+
SQUARE
WAVE
OUT
VCO
IN
INPUT
DEMODULATED
FM
AMPLIFIER
PHASE
DETECTOR
V2+
DUTY
CYCLE
FREQUENCY
ADJUST
7 4
TRIANGLE
OUT
6
5
3
SINE WAVE
OUT
9
8
ICL8038
10
2
11
12
SINE WAVE
ADJ.
1
R2
SINE WAVE
ADJ.
TIMING
CAP.
LOW PASS
FILTER
V-/GND
FIGURE 9. WAVEFORM GENERATOR USED AS STABLE VCO IN A PHASE-LOCKED LOOP
HIGH FREQUENCY
SYMMETRY
10kΩ
500Ω
4.7kΩ
1N753A
(6.2V)
100kΩ
4.7kΩ
1MΩ
1kΩ
100kΩ
1,000pF
4
5
6
LOW FREQUENCY
SYMMETRY
9
+15V
-
1kΩ
741
+
-VIN
8
ICL8038
FUNCTION GENERATOR
3
11
SINE WAVE
OUTPUT
-
P4
10
+15V
12 2
+
741
+
50µF
100kΩ 15V
10kΩ
OFFSET
SINE WAVE
DISTORTION
3,900pF
-15V
FIGURE 10. LINEAR VOLTAGE CONTROLLED OSCILLATOR
Use in Phase Locked Loops
Its high frequency stability makes the ICL8038 an ideal
building block for a phase locked loop as shown in Figure 10.
In this application the remaining functional blocks, the phase
detector and the amplifier, can be formed by a number of
available ICs (e.g., MC4344, NE562, HA2800, HA2820).
In order to match these building blocks to each other, two
steps must be taken. First, two different supply voltages are
used and the square wave output is returned to the supply of
the phase detector. This assures that the VCO input voltage
will not exceed the capabilities of the phase detector. If a
smaller VCO signal is required, a simple resistive voltage
divider is connected between pin 9 of the waveform generator and the VCO input of the phase detector.
Second, the DC output level of the amplifier must be made
compatible to the DC level required at the FM input of the
waveform generator (pin 8, 0.8V+). The simplest solution here
is to provide a voltage divider to V+ (R1, R2 as shown) if the
amplifier has a lower output level, or to ground if its level is
higher. The divider can be made part of the low-pass filter.
This application not only provides for a free-running frequency with very low temperature drift, but is also has the
unique feature of producing a large reconstituted sinewave
signal with a frequency identical to that at the input.
For further information, see Harris Application Note AN013,
“Everything You Always Wanted to Know About the
ICL8038”.
8-160
ICL8038
Definition of Terms
Supply Voltage (VSUPPLY). The total supply voltage from
V+ to V-.
Output Amplitude. The peak-to-peak signal amplitude
appearing at the outputs.
Supply Current. The supply current required from the
power supply to operate the device, excluding load currents
and the currents through RA and RB.
Saturation Voltage. The output voltage at the collector of
Q23 when this transistor is turned on. It is measured for a
sink current of 2mA.
Frequency Range. The frequency range at the square wave
output through which circuit operation is guaranteed.
Rise and Fall Times. The time required for the square wave
output to change from 10% to 90%, or 90% to 10%, of its
final value.
Sweep FM Range. The ratio of maximum frequency to minimum frequency which can be obtained by applying a sweep
voltage to pin 8. For correct operation, the sweep voltage
should be within the range:
(2/3 VSUPPLY + 2V) < VSWEEP < VSUPPLY
FM Linearity. The percentage deviation from the best fit
straight line on the control voltage versus output frequency
curve.
Triangle Waveform Linearity. The percentage deviation
from the best fit straight line on the rising and falling triangle
waveform.
Total Harmonic Distortion. The total harmonic distortion at
the sine wave output.
Typical Performance Curves
1.03
NORMALIZED FREQUENCY
SUPPLY CURRENT (mA)
20
-55oC
15
125oC
25oC
10
5
5
10
15
20
25
1.02
1.01
1.00
0.99
0.98
30
5
10
15
SUPPLY VOLTAGE (V)
FIGURE 11. SUPPLY CURRENT vs SUPPLY VOLTAGE
25
30
FIGURE 12. FREQUENCY vs SUPPLY VOLTAGE
200
1.03
1.02
1.01
1.00
25oC
20
30
20
10
RISE TIME
125oC
150
10
TIME (ns)
NORMALIZED FREQUENCY
20
SUPPLY VOLTAGE (V)
30
-55oC
125oC
100
25oC
FALL TIME
0.99
-55oC
50
0.98
-50
-25
0
25
75
0
125
0
TEMPERATURE (oC)
FIGURE 13. FREQUENCY vs TEMPERATURE
2
4
6
8
LOAD RESISTANCE (kΩ)
FIGURE 14. SQUARE WAVE OUTPUT RISE/FALL TIME vs
LOAD RESISTANCE
8-161
10
ICL8038
Typical Performance Curves (Continued)
1.0
NORMALIZED PEAK OUTPUT VOLTAGE
SATURATION VOLTAGE
2
1.5
125oC
1.0
25oC
-55oC
0.5
2
4
6
8
-55oC
0.8
LOAD CURRENT TO V+
0
10
2
4
LOAD CURRENT (mA)
6
8
12
14
16
18
20
FIGURE 16. TRIANGLE WAVE OUTPUT VOLTAGE vs LOAD
CURRENT
1.2
10.0
1.1
LINEARITY (%)
1.0
0.9
0.8
1.0
0.1
0.7
0.6
0.01
10
100
1K
10K
100K
1M
10
100
1K
10K
100K
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 17. TRIANGLE WAVE OUTPUT VOLTAGE vs
FREQUENCY
FIGURE 18. TRIANGLE WAVE LINEARITY vs FREQUENCY
1.1
12
10
DISTORTION (%)
NORMALIZED OUTPUT VOLTAGE
10
LOAD CURRENT (mA)
FIGURE 15. SQUARE WAVE SATURATION VOLTAGE vs LOAD
CURRENT
NORMALIZED OUTPUT VOLTAGE
25oC
0.9
0
0
125oC
LOAD CURRENT
TO V -
1.0
0.9
8
6
4
ADJUSTED
UNADJUSTED
2
10
100
1K
10K
100K
1M
0
10
100
1K
10K
100K
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 19. SINE WAVE OUTPUT VOLTAGE vs FREQUENCY
FIGURE 20. SINE WAVE DISTORTION vs FREQUENCY
8-162
1M