AD ADR370

Precision Low Power 2.048 V
SOT-23 Voltage Reference
ADR370*
FEATURES
Initial Accuracy: ⴞ4 mV Max
Initial Accuracy Error: ⴞ0.2%
Low TCVO: ⴞ50 ppm/ⴗC Max from –40ⴗC to +125ⴗC,
30 ppm/ⴗC Max from +25ⴗC to +70ⴗC
Load Regulation: 200 ␮V/mA, 100 ppm/mA
Line Regulation: 25 ␮V/V, 20 ppm/V
Wide Operating Range: VIN = 2.3 V to 15 V
Low Power: 72 ␮A Max
High Output Sink/Source Current: ⴞ5 mA Min
Wide Temperature Range: –40ⴗC to +125ⴗC
Tiny 3-Lead SOT-23 Package with Standard Pinout
PIN CONFIGURATION
3-Lead SOT-23
VIN 1
ADR370
APPLICATIONS
Battery-Powered Instrumentation
Portable Medical Instruments
Data Acquisition Systems
Industrial Process Control Systems
Automotive
GENERAL DESCRIPTION
The ADR370 is a low cost, 3-terminal (series) band-gap voltage
reference featuring high accuracy, high stability, and low power
consumption packaged in a tiny 3-lead SOT-23 package. Precise
matching and thermal tracking of on-chip components, as well as
patented temperature drift curvature correction design techniques,
have been employed to ensure that the ADR370 provides an
accurate 2.048 V output.
3 GND
VOUT 2
Table I. ADR370 Products
Products
Output Initial
Temperature
Voltage Accuracy Coefficent
(VO)
(mV) (%) (ppm/°C)
ADR370BRT-REEL7
ADR370ART-REEL7
2.048
2.048
4
10
0.2
0.5
50
100
This micropowered, low dropout voltage device will source or
sink up to 5 mA of load current while providing a stable 2.048 V
output. The compact footprint, high accuracy, and an operating
range of 2.3 V to 12 V make the ADR370 ideal for use in 3 V
and 5 V systems where there may be wide variations in supply
voltage and a need to minimize power dissipation.
The ADR370 is offered in A and B grades; all devices are specified
over the extended industrial range of –40°C to +125°C.
*Protected by U.S.Patent No. 5,969,657; other patents pending.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
ADR370–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS (T = T
A
Parameter
Symbol
Output Voltage (@ 25°C)
Initial Accuracy Error
A Grade
B Grade
Output Voltage Temperature Drift
A Grade
B Grade
Supply Headroom
Load Regulation
MIN
to TMAX, VIN = 5 V, unless otherwise noted.)
Min
Typ
VO
2.044
2.048 2.052
VOERR
VOERR
VOERR
VOERR
–10
–0.5
–4
–0.2
TCVO
TCVO
TCVO
VIN – VOUT
Line Regulation
Ripple Rejection
Quiescent Current
Short-Circuit Current to Ground
Noise Voltage (@ 25°C)
∆VOUT/∆VIN
Turn-On Settling Time
Long Term Stability
Output Voltage Hysteresis
Temperature Range
CL = 0.2 µF
Conditions
–40°C to +125°C
–40°C to +125°C
25°C to 70°C
Max
–0.200
–0.480
–0.425
mV
%
mV
%
100
50
30
ppm/°C
ppm/°C
ppm/°C
mV
+0.200
+0.480
+0.425
20
mV/mA
mV/mA
mV/mA
ppm/V
80
72
15
0.1 Hz to 10 Hz
10 Hz to 10 kHz
70
50
100
1,000 Hours @ 25°C
100
115
–40
V
+10
+0.5
+4
+0.2
200
0 mA < IOUT < 5 mA @ 25°C
–3 mA < IOUT < 0 mA @ 25°C
–0.1 mA < IOUT < +0.1 mA
VOUT 200 mV < VIN < 15 V
IOUT = 0 mA
VIN = 5 V ± 100 mV (f = 120 Hz)
Unit
+125
dB
µA
µA
µV p-p
µV rms
µs
ppm/1,000 hrs
ppm
°C
*Guaranteed by characterization.
Specifications subject to change without notice.
–2–
REV. A
ADR370
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Storage Temperature Range
RT Package . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Operating Temperature Range . . . . . . . . . . . –40°C to +125°C
Lead Temperature Range
Soldering, 60 sec . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared, 15 sec . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
Package Type
␪JA
␪JC
Unit
3-SOT-23 (RT)
220
102
°C/W
*Absolute maximum ratings apply at 25°C, unless otherwise noted.
ORDERING GUIDE
Model
Output
Voltage
(VO)
Initial
Accuracy
(mV) (%)
Temperature
Number
Coefficient
Package
Package
of Parts
(ppm/°C)
Description Option Branding per Reel
Temperature
Range
ADR370BRT-R2
ADR370BRT-REEL7
ADR370ART-R2
ADR370ART-REEL7
2.048
2.048
2.048
2.048
±4
±4
± 10
± 10
50
50
100
100
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
0.5
0.2
0.5
0.5
SOT-23
SOT-23
SOT-23
SOT-23
3-Lead
3-Lead
3-Lead
3-Lead
RPB
RPB
RPA
RPA
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADR370 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. A
–3–
250
3,000
250
3,000
ADR370–Typical Performance Characteristics
12
6
10
4
LINE REGULATION – ppm/V
VIN 5V TO 15V
8
–40ⴗC
∆ VO – mV
6
4
+125ⴗC
2
+25ⴗC
0
2
0
–2
–4
–6
–8
–2
–4
–4
–3
–2
–1
0
1
LOAD – mA
2
3
4
–10
–40
5
TPC 1. Load Regulation vs. Load Current
125
TPC 4. Line Regulation vs. Temperature
2.048
0
0
2.046
VIN = 5V
0
VIN = 15V
VOLTAGE – 10␮V/DIV
OUTPUT VOLTAGE – V
45
TEMPERATURE – ⴗC
2.044
2.042
2.040
0
0
0
0
2.038
0
2.036
–40
45
TEMPERATURE – ⴗC
0
125
0
TPC 2. Output Voltage vs. Temperature
0
0
0
0
0
0
TIME – 0.1s/DIV
0
0
0
0
TPC 5. Voltage Noise 0.1 Hz to 10 Hz
80
0
0
VIN = 15V
0
VOLTAGE – 200␮V/DIV
SUPPLY CURRENT – ␮A
70
60
VIN = 5V
50
40
0
0
0
0
30
0
20
–40
45
TEMPERATURE – ⴗC
0
125
0
0
0
0
0
0
0
TIME – 0.1s/DIV
0
0
0
0
TPC 6. Voltage Noise 10 Hz to 100 kHz
TPC 3. Supply Current vs. Temperature
–4–
REV. A
ADR370
0
0
CL = 0.1␮F
CBY = 0.1␮F
CLOAD = 0.22␮F
0
0
VOUT = 1V/DIV
0
0
0
0
VOLTAGE – V
VOLTAGE – V
VIN = 1V/DIV
0
0
0
0
VOUT = 1V/DIV
VIN = 5V/DIV
0
0
0
0
0
0
0
0
0
0
0
0
0
TIME – 100␮s/DIV
0
0
0
0
0
TPC 7. Turn-On Response
0
0
0
0
0
0
TIME – 100␮s/DIV
0
0
0
0
0
0
TPC 9. Line Transient Response
0
0
RLOAD = 1k⍀
0
0
0
0
CBY = 0.1␮F
CLOAD = 0.1␮F
VOUT = 20mV/DIV
VOLTAGE – V
VOLTAGE – V
VOUT = 1V/DIV
0
0
0
0
0
VIN = 2V/DIV
0
VIN = 5V/DIV
0
0
0
0
0
0
0
0
0
0
0
0
0
TIME – 100␮s/DIV
0
0
0
0
0
0
0
0
0
0
TIME – 100ms/DIV
0
0
TPC 10. Load Transient Response
TPC 8. Turn-Off Response
REV. A
0
–5–
ADR370
PARAMETER DEFINITIONS
Temperature Coefficient
THEORY OF OPERATION
The ADR370 uses the band-gap concept to produce a stable,
low temperature coefficient voltage reference suitable for high
accuracy data acquisition components and systems. This device
makes use of underlying temperature characteristics of a silicon
transistor’s base-emitter voltage (VBE) in the forward biased
operating region. Under this condition, all such transistors have
a –2 mV/°C temperature coefficient (TC) and a VBE that, when
extrapolated to absolute zero, 0 K, (with collector current proportional to absolute temperature) approximates the silicon
band-gap voltage. By summing a voltage that has an equal and
opposite temperature coefficient of 2 mV/°C with a VBE of a
forward biased transistor, an almost zero TC reference can be
developed. The simplified circuit diagram in Figure 1 shows how
a compensating voltage, V1, is achieved by driving two transistors
at different current densities and amplifying the resultant VBE
difference (∆VBE, which has a positive TC). The sum (VBG) of VBE
and V1 is then buffered and amplified to produce a stable reference
voltage of 2.048 V at the output.
Temperature coefficient is the change of output voltage with
respect to operating temperature changes, normalized by the
output voltage at 25°C. This parameter is expressed in ppm/°C
and can be determined with the following equation
VO (T2 ) −VO (T1 )
 ppm 
=
TCVO 
× 106

°
25
°
×
−
C
V
C
T
T
(
)
(
)
2
1
O


where:
(1)
VO (25°C) = VO at 25°C.
VO (T1) = VO at Temperature 1.
VO (T2) = VO at Temperature 2.
Line Regulation
Line regulation is the change in output voltage due to a specified
change in input voltage. This parameter accounts for the effects
of self-heating. Line regulation is expressed in either percent per
volt, parts-per-million per volt, or microvolts per volt change in
input voltage.
VIN
Load Regulation
R4
Load regulation is the change in output voltage due to a specified
change in load current. This parameter accounts for the effects
of self-heating. Load regulation is expressed in either microvolts
per milliampere, parts-per-million per milliampere, or ohms of
dc output resistance.
R3
VOUT
R5
Long Term Stability
VDS
Long term stability is the typical shift of output voltage at 25°C
on a sample of parts subjected to a test of 1,000 hours at 25°C.
R2
R6
∆VO = VO (t0 ) −VO (t1 )
∆VO [ ppm ] =
VO (t0 ) −VO (t1 )
where:
VO (t0 )
R1
GND
× 10
(2)
6
Figure 1. Simplified Schematic
Applying the ADR370
In order to achieve the specified performance, two external
components should be used in conjunction with the ADR370,
a 4.7 µF capacitor and a 1 µF capacitor should be applied to the
input and output, respectively. Figure 2 shows the ADR370 with
both the input and output capacitors attached.
VO (T1) = VO at 25°C at time 0.
VO (T2) = VO at 25°C after 1,000 hours operation at 25°C.
Thermal Hysteresis
Thermal hysteresis is defined as the change of output voltage after
the device is cycled through temperature from +25°C to –40°C
to +125°C and back to +25°C. This is a typical value from a sample
of parts put through such a cycle.
For further transient response optimization, an additional 0.1 µF
capacitor in parallel with the 4.7 µF input capacitor can be used.
A 1 µF output capacitor will provide stable performance for all
loading conditions. The ADR370 can, however, operate under
low (–100 µA < IOUT < +100 µA) current conditions with just a
0.2 µF output capacitor and a 1 µF input capacitor.
VO _ HYS = VO (25°C ) − VO _ TC
VO _ HYS [ ppm ] =
VO (25°C ) − VO _ TC
where:
V1
VO (25°C )
× 106
(3)
VO (25°C) = VO at 25°C.
VIN
CIN
VO_TC = VO at 25°C after temperature cycle at +25°C to –40°C
to +125°C and back to +25°C.
4.7␮F
ADR370
GND
VOUT
COUT
1␮F
Figure 2. Typical Connection Diagram
–6–
REV. A
ADR370
APPLICATIONS
Low Cost Negative Reference
VL + 2.5V < VDD < VL + 12V
ADR370
A low cost negative reference can be obtained by leveraging the
current sinking capability of the ADR370. Simply tying the VOUT
terminal to ground and adding a bias resistor, RSET, to the GND
pin of the device, a negative voltage reference can be obtained
as shown in Figure 3. RSET should be chosen such that ISET
remains between 1 mA to 5 mA.
VIN
VOUT
RSET
GND
ISET =
2.048V
RSET
VL
Iq = 65␮A
RL
IL
VDD
ADR370
VIN
Figure 5. Low Cost Current Source
VOUT
Precision Current Source with Adjustable Output
GND
A precision current source can be implemented with the circuit
shown in Figure 6. By adding a mechanical or digital potentiometer, this circuit becomes an adjustable current source. If a
digital potentiometer like the AD5201 is used, the load current
is simply the voltage across terminals B-to-W of the digital
potentiometer divided by RSET.
–VREF
RSET
ISET
VSS
Figure 3. Low Cost Negative Reference
IL =
Precision Negative Reference
Without using any matching resistors, a precision negative reference
can be obtained using the configuration shown in Figure 4. The
voltage difference between VOUT and GND of the ADR370 is
2.048 V. Since VOUT is at virtual ground, U2 will close the loop by
forcing the GND pin to be the negative reference node. U2 should
be a low offset voltage precision op amp, such as the OP1177.
VREF × D
RSET × 256
(5)
where D is the decimal equivalent of the digital potentiometer
input code.
12V
ADR370
0V TO (2.048V + VL)
VIN
U1
VOUT
B
2.3V TO 12V
ADR370
VIN
GND
AD5201
W
A
RSET
VOUT
+12V
+15V
GND
U2
–VREF
–2.048V TO VL
OP1177
VL
OP1177
–12V
–15V
RL
IL
Figure 4. Precision Negative Reference
Figure 6. Programmable 0 mA to 5 mA Current Source
Low Cost Current Source
Figure 5 illustrates how a simple, low cost current source can be
configured using the ADR370. The load current, IL, is simply
the sum of ISET and the quiescent current, Iq. ISET is simply the
reference voltage generated by the ADR370 divided by RSET.
To optimize the resolution of this circuit, dual supply op amps
should be used because the ground potential of ADR370 can
swing from –2.048 V at zero scale to VL at full scale of the
potentiometer setting.
2.048V
(4)
RSET
The quiescent current, Iq, varies slightly with load. The variation
in Iq limits the use of this circuit to general-purpose applications.
I SET =
REV. A
–7–
ADR370
12-Bit Precision Programmable Current Source
Precision Boosted Output Regulator
By replacing the potentiometer in Figure 6 with a 12-bit precision
DAC like the AD5322, a higher precision programmable current
source can be achieved. Figure 7 illustrates the implementation
of this circuit. The load current can be determined with the
following equation.
A precision voltage output with boosted current can be realized
with the circuit shown in Figure 8. In this circuit, VO is maintained
by the ADR370 at 2.048 V.
IL =
VREF (1 − D)
The ADR370 sources a maximum of 5 mA if the load current,
IL, is more than 5 mA, current is furnished by the transistor, Q1,
and the input voltage supply VDD.
(6)
RSET × 4096
4V TO 12V
VDD
The compliance voltage should be kept low so that the supply
voltage to U2, between VDD and GND, does not fall below 2.5 V.
R1
10k⍀
2N3906
U1
Q1
+5V
ADR370
ADR370
VIN
VOUT
VIN
VREF (1 – D2/N)
U2
GND
VOUT
AD5322
VIN
GND
+5V
VDD
VO
RSET
RL
IL
+5V
GND
1
2
U3
OP1177
V+
V–
TOL ±0.05%
Figure 8. Precision Boosted Output Regulator
3
VL
Q1 will be turned on to regulate current as needed. R1 is required
to bias the base of Q1 and must be large enough to comply with
the supply current requirements of the ADR370. The supply
voltage can be as low as 4 V.
11
–5V
RL
IL
Figure 7. 12-Bit Programmable Current Source
The maximum current output of this circuit is limited by the
power dissipation of the bipolar transistor, Q1.
PDISS = (VDD − 2.048) × I L
(7)
Using the 2N3906 PNP transistor shown in Figure 8 and a 4 V
power supply, RL should be chosen so that a maximum of 100 mA
is drawn from the circuit, which limits the power dissipation of
Q1 to ~200 mW.
–8–
REV. A
ADR370
TAPE AND REEL DIMENSIONS
OUTLINE DIMENSIONS
Dimensions shown in millimeters.
3-Lead Small Outline Transistor Package [SOT-23-3]
(RT-3)
4.10
4.00
3.90
1.55
1.50
1.50
Dimensions shown in millimeters.
1.10
1.00
0.90
2.05
2.00
1.95
0.35
0.30
0.25
1.85
1.75
1.65
8.30
8.00
7.70
3.04
2.90
2.80
2.80
2.70
2.60
1.40
1.30
1.20
3.55
3.50
3.45
3
1
3.20
3.10
2.90
1.00 MIN
0.75 MIN
PIN 1
0.95 BSC
1.90 BSC
DIRECTION OF UNREELING
1.12
0.89
7" REEL 100.00
OR
13" REEL 330.00
0.10
0.01
14.40 MAX
SEATING
PLANE
1.50 MIN
20.20
MIN
13.20
13.00
12.80
0.50
0.30
0.60
0.50
0.40
COMPLIANT TO JEDEC STANDARDS TO-236AB
7" REEL 50.00 MIN
OR
13" REEL 100.00 MIN
9.90
8.40
8.40
REV. A
2.64
2.10
2
–9–
0.20
0.08
ADR370
Revision History
Location
Page
7/03—Data Sheet changed from REV. 0 to REV. A.
Updated FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Updated Table I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Updated ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Updated ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Updated ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Updated PARAMETER DEFINITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
–10–
REV. A
–11–
–12–
C03432–0–7/03(A)