MAX707, MAX708 P Supervisory Circuits The MAX707/708 are cost–effective system supervisor circuits designed to monitor Vcc in digital systems and provide a reset signal to the host processor when necessary. No external components are required. The reset output is driven active within 20 sec of Vcc falling through the reset voltage threshold. Reset is maintained with 200 mS of delay time after Vcc rise above the reset threshold. The MAX707/708 have a low quiescent current of 12 at Vcc = 3.3 V, an active–high RESET and active–low RESET with a push–pull output. The output is guaranteed valid down to Vcc = 1.0 V. The MAX707/708 have a Manual Reset MR input and a +1.25 V threshold detector for power–fail input PFI. These devices are available in a Micro8 and SOIC–8 package. http://onsemi.com MARKING DIAGRAMS 8 Micro8 CUA SUFFIX CASE 846A 8 Features • Precision Supply–Voltage Monitor • • • • • • • MAX707: 4.63 V Reset Threshold Voltage MAX708: Standard Reset Threshold Voltages (Typical): 4.38 V, 3.08 V, 2.93 V, 2.63 V Reset Threshold Available from 1.6 V to 4.9 V with 100 mV Increments (Factory Option) 200 mS (Typ) Reset Timeout Delay 12 A (Vcc = 3.3 V) Quiescent Current Active_High and Active_Low Reset Output Guaranteed RESET_L and RESET Output Valid to Vcc = 1.0 V Voltage Monitor for Power–Fail or Low–Battery Warning 8 Pin SO or Micro8 Package xxx RYW 1 xxx R YW 1 = Specific Device Code (see page 9) = Factory Code = Date Code 8 SO–8 ESA SUFFIX CASE 751 8 1 xxxxx ALYW 1 xxxxx = Specific Date Code (see page 9) AL = Assembly Lot Code YW = Date Code Applications • • • • PIN CONFIGURATION Computers Embedded System Battery Powered Equipment Critical P Power Supply Monitor RESET 1 8 NC RESET 2 7 PFO MR 3 VCC 6 PFI VCC 4 5 GND RESET (Top View) MR Micro8 RESET GENERATOR VCC RESET + – VTH PFI 8 RESET VCC 2 7 RESET GND 3 6 NC PFI 4 + – 5 PFO PFO (Top View) SO–8 1.25 V ORDERING INFORMATION GND See detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. Figure 1. Representative Block Diagram Semiconductor Components Industries, LLC, 2001 November, 2001 – Rev. 1 MR 1 1 Publication Order Number: MAX707/D MAX707, MAX708 MAXIMUM RATINGS (Note 1) Symbol Value Unit Supply Voltage VCC 6.0 V Output Voltage Vout –0.3 to (VCC + 0.3) V Output Current (All Outputs) Iout 20 mA Input Current (VCC and GND) Iin 20 mA Rating Thermal Resistance Junction to Air °C/W RJA Micro8 SO–8 248 187 Operating Ambient Temperature TA –40 to +85 °C Storage Temperature Range Tstg –40 to +125 °C Latch–Up Performance ILATCH–UP Positive Negative 1. This device series contains ESD protection and exceeds the following tests: Human Body Model 2000 V per MIL–STD–883, Method 3015. Machine Model Method 200 V. 2. The maximum package power dissipation limit must not be exceeded. TJ(max) TA with TJ(max) = 150°C PD RJA http://onsemi.com 2 mA 300 280 MAX707, MAX708 ELECTRICAL CHARACTERISTICS (VCC = 1.0 V to 5.5 V, TA = –40°C to +85°C, unless otherwise noted. Typical values are at TA = 25°C, VCC = 3.3 V.) Characteristics Symbol Min Typ Max Unit Operating Voltage Range VCC 1.0 – 5.5 V Supply Current VCC = 3.3 V VCC = 5.5 V ICC – – 12 16 22 28 Reset Threshold MAX707 TA = +25°C TA = –40°C to +85°C MAX708 TA = +25°C TA = –40°C to +85°C MAX708T TA = +25°C TA = –40°C to +85°C MAX708S TA = +25°C TA = –40°C to +85°C MAX708R TA = +25°C TA = –40°C to +85°C VTH Reset Threshold Hysteresis VHYS A V 4.56 4.50 4.63 4.70 4.75 4.31 4.25 4.38 4.45 4.50 3.03 3.00 3.08 3.13 3.15 2.89 2.85 2.93 2.97 3.00 2.59 2.55 2.63 2.67 2.70 – 0.01 VTH – mV VCC Falling Reset Delay (VCC = VTH + 0.2 V to VTH –0.2 V) tPD – 20 – S Reset Active Timeout Period tRP 140 200 330 mS RESET_L, RESET_H Output Low Voltage VCC 1.0 V, Iol = 100 A VCC 2.7 V, Iol = 1.2 mA VCC 4.5 V, Iol = 3.2 mA Vol – – – – – – 0.3 0.3 0.3 RESET_L, RESET_H Output High Voltage VCC 1.0 V, Ioh = 50 A VCC 2.7 V, Ioh = 500 A VCC 4.5 V, Ioh = 800 A Voh 0.8 VCC 0.8 VCC 0.8 VCC – – – – – – RMRI 50 – – K tMR 1.0 – – S – – 0.1 – S MR_L High_level Input Threshold (VTH (max) VCC 5.5 V) VIH 0.7 VCC – – V MR_L Low_level Input Threshold (VTH (max) VCC 5.5 V) VIL – – 0.3 VCC V MR_L to RESET_L and RESET_H Output Delay (VTH (max) VCC 5.5 V) tMD – 0.2 – S PFI Input Threshold (VCC = 3.3 V, PFI Falling) – 1.20 1.25 1.3 V PFI Input Current – –250 0.01 250 nA PFI to PFO Delay (VCC = 3.3 V, VOVERDRIVE = 15 mV) – – 3.0 – S – – – – 0.3 0.3 0.8 VCC 0.8 VCC – – – – MR_L Pull–up Resistance MR_L Pulse Width (VTH (max) VCC 5.5 V) MR_L Glitch Rejection (VTH (max) VCC 5.5 V) PFO_L Output Low Voltage VCC = 2.7 V, Iol = 1.2 mA VCC = 4.5 V, Iol = 3.2 mA Vol PFO_L Output High Voltage VCC = 2.7 V, Ioh = 500 A VCC = 4.5 V, Ioh = 800 A Voh http://onsemi.com 3 V V V V MAX707, MAX708 PIN DESCRIPTION (Pin No. with parentheses is for Micro8 package.) ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Pin No. Symbol Description 1 (3) MR Manual Reset Input. MR can be driven from TTL/CMOS logic or from a manual Reset switch. This input, when floating, is internally pulled up to VCC with 50 K resistor. 2 (4) VCC Supply Voltage: C = 100nF is recommended as a bypass capacitor between VCC and GND. 3 (5) GND Ground Reference 4 (6) PFI Power Fail Voltage Monitor Input. When PFI is less than 1.25 V, PFO goes low. Connect PFI to GND or VCC when not used. 5 (7) PFO Power Fail Monitor Output. When PFI is less than 1.25 V, it goes low and sinks current. Otherwise, it remains high. 6 (8) NC 7 (1) RESET Active Low RESET can be triggered by VCC below the threshold level or by a low signal on MR. It remains low for 200 ms (typ.) after VCC rises above the reset threshold. 8 (2) RESET Active high RESET output the inverse of RESET one. Non–connective Pin http://onsemi.com 4 IOUT, OUTPUT SOURCE CURRENT (mA) IOUT, OUTPUT SINK CURRENT (mA) MAX707, MAX708 3.0 TA = 25°C Vin = 1.5 V 2.5 2.0 1.5 1.0 0.5 Vin = 1.0 V 0 0.5 1.0 12 10 8 Vin –1.0 V 6 4 Vin –0.5 V 2 0 0 1.0 2.0 3.0 4.0 5.0 Figure 2. MAX707/708 Series 1.60 V Reset Output Sink Current vs. Output Voltage Figure 3. MAX707/708 Series 1.60 V Reset Output Source Current vs. Input Voltage Vin = 2.5 V 10 8 Vin = 2.0 V 6 4 Vin = 1.5 V 2 0 0.5 1.0 1.5 2.0 2.5 3.0 18 TA = 25°C Vout = Vin –2.0 V 16 Vin –1.5 V 14 12 10 8 Vin –1.0 V 6 4 Vin –0.5 V 2 0 0.0 1.0 2.0 3.0 4.0 5.0 Vin, INPUT VOLTAGE (V) Figure 4. MAX707/708 Series 2.93 V Reset Output Sink Current vs. Output Voltage Figure 5. MAX707/708 Series 2.93 V Reset Output Source Current vs. Input Voltage Iout, OUTPUT SOURCE CURRENT (mA) Vin = 4.0 V TA = 25°C 25 20 Vin = 3.0 V 15 10 Vin = 2.0 V 5 1.0 2.0 3.0 4.0 5.0 6.0 20 18 TA = 25°C 16 Vout = Vin –2.0 V 14 Vin –1.5 V 12 10 Vin –1.0 V 8 6 4 Vin –0.5 V 2 0 0.0 1.0 2.0 3.0 4.0 5.0 Vout, OUTPUT VOLTAGE (V) Vin, INPUT VOLTAGE (V) Figure 6. MAX707/708 Series 4.90 V Reset Output Sink Current vs. Output Voltage Figure 7. MAX707/708 Series 4.90 V Reset Output Source Current vs. Input Voltage http://onsemi.com 5 6.0 20 Vout, OUTPUT VOLTAGE (V) 30 Iout, OUTPUT SINK CURRENT (mA) Vin –1.5 V 14 Vin, INPUT VOLTAGE (V) TA = 25°C 0 0.0 Vout = Vin –2.0 V 16 Vout, OUTPUT VOLTAGE (V) 12 0 TA = 25°C 18 2.0 1.5 Iout, OUTPUT SOURCE CURRENT (mA) IOUT, OUTPUT SINK CURRENT (mA) 0 20 6.0 VDET, DETECTOR THRESHOLD VOLTAGE (VOLTS) VDET, DETECTOR THRESHOLD VOLTAGE (VOLTS) MAX707, MAX708 1625 1620 VDET+ 1615 1610 1605 1600 VDET– 1595 1590 1585 –50 –25 0 25 50 75 100 TA, AMBIENT TEMPERATURE (°C) 3120 3110 3100 3090 3080 3060 –50 VDET, DETECTOR THRESHOLD VOLTAGE (VOLTS) TPD, VCC, FALLING RESET DELAY (µs) VDET+ 4980 4960 4940 4920 VDET– 4880 –50 –25 0 25 50 75 –25 0 25 50 100 75 TA, AMBIENT TEMPERATURE (°C) Figure 9. MAX707/708 Series 2.93 V Detector Threshold Voltage vs. Temperature 5020 4900 VDET– 3070 Figure 8. MAX707/708 Series 1.60 V Detector Threshold Voltage vs. Temperature 5000 VDET+ 100 45 40 Vth = 4.90 V 35 30 Vth = 2.93 V 25 20 Vth = 1.60 V 15 10 5 0 –40 –20 0 20 40 60 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 10. MAX707/708 Series 4.90 V Detector Threshold Voltage vs. Temperature Figure 11. MAX707/708 Series VCC Falling Reset Delay vs. Temperature http://onsemi.com 6 80 MAX707, MAX708 APPLICATIONS INFORMATION one of these. It is effectively debounced by the 1.0 s minimum reset pulse width. As MR is TTL/CMOS logic compatible, it can be driven by an external logic line. Microprocessor Reset To generate a processor reset, the manual Reset input allows different reset sources. A pushbutton switch can be VCC Vth Vth tRP RESET tRP MR tMD tMR Figure 12. RESET and MR Timing VCC Transient Rejection (overdrive) for glitch rejection. For a given overdrive, the point of the curve is the maximum width of the glitch allowed before the device generates a reset signal. Transient immunity can be improved by adding a capacitor (100 nF for example) in close proximity to the VCC pin of the MAX707/708. MAXIMUM TRANSIENT DURATION (µs) The MAX707/708 provides accurate VCC monitoring and reset timing during power–up, power–down, and brownout/sag conditions, and rejects negative glitches on the power supply line. Figure 13 shows the maximum transient duration vs. maximum negative excursion 300 250 VCC 200 Vth Vth = 4.90 V 150 Overdrive Vth = 3.08 V 100 Vth = 1.60 V 50 0 10 Duration 30 50 70 90 110 130 150 RESET COMPARATOR OVERDRIVE (mV) Figure 13. Maximum Transient Duration vs. Overdrive for Glitch Rejection at 25C http://onsemi.com 7 MAX707, MAX708 RESET Signal Integrity During Power–Down If the other components are required to follow the reset I/O of the P, the buffer should be connected as shown with the solid line. The MAX707/708 RESET output is valid until VCC falls below 1.0 V. Then, the output becomes an open circuit and no longer sinks current. This means CMOS logic inputs of the P will be floating at an undetermined voltage. Most digital systems are completely shutdown well above this voltage. However, in the case RESET must be maintained valid to VCC = 0 V, a pull down resistor must be connected from RESET to ground to discharge stray capacitances and hold the output low (Figure 14). This resistor value, though not critical, should be chosen large enough not to load RESET and small enough to pull it to ground. R = 100 k will be suitable for most applications. BUFFER VCC VCC P MAX707/708 4.7 K RESET VCC BUFFERED RESET TO OTHER SYSTEM COMPONENTS RESET GND GND MAX707/708 RESET Figure 15. Interfacing to Bidirectional Reset I/O R 100 K GND Monitoring Additional Supply Levels When connecting a voltage divider to PFI and adjusting it properly, you can monitor a voltage different than the unregulated DC one. As shown in Figure 16, to increase noise immunity, hysteresis may be added to the power–fail comparator just by a resistor between PFO and PFI. Not to unbalance the potential divider network, R3 should be 10 times the sum of the two resistors R1 and R2. If required, a capacitor between PFI and GND will reduce the sensitivity of the circuit to high–frequency noise on the line being monitored. The PFO output may be connected to MR input to generate a low level on the RESET when Vcc_1 drops out of tolerance. Thus a RESET is generated when one of the two voltages is below its threshold level. Figure 14. Ensuring RESET Valid to VCC = 0 V Interfacing with Ps with Bidirectional I/O Pins Some Ps (such as Motorola 68HC11) have bidirectional reset pins. If, for example, the RESET output is driven high and the P wants to put it low, indeterminate logic level may result. This can be avoided by adding a 4.7 k resistor in series with the output of the MAX707/708 (Figure 15). If there are other components in the system that require a reset signal, they should be buffered so as not to load the reset line. VCC_1 VCC_2 VCC_3 VCC VCC R1 RESET MAX707/708 VCC_2 PFO RESET P 0V 0V MR PFI VH VCC_1 PFO GND VL GND R2 1.25 Vcc_2 VL 1.25 R1 1.25 R3 R2 VH 1.25 (1 R1 R2 R3 ) R2 R3 R3 VHYS VH VL Figure 16. Monitoring Additional Supply Levels http://onsemi.com 8 R1 Vcc_2 R3 MAX707, MAX708 ORDERING INFORMATION Package Marking Shipping MAX707ESA–T Device SO–8 S707 2500 Tape & Reel MAX708ESA–T SO–8 S708 2500 Tape & Reel MAX708xESA–T (Note 3) SO–8 S708x 2500 Tape & Reel MAX707CUA–T Micro8 SAC 4000 Tape & Reel MAX708CUA–T Micro8 SAD 4000 Tape & Reel MAX708xCUA–T (Note 3) Micro8 SAy (Note 4) 4000 Tape & Reel 3. The “x” denotes a suffix for VCC threshold – see Table 1. 4. The “y” denotes a suffix for VCC threshold – see Table 2. Table 1. Suffix “x” Suffix Reset Vcc Threshold (V) T 3.08 S 2.93 R 2.63 Table 2. Suffix “y” Suffix Reset Vcc Threshold (V) E 3.08 F 2.93 G 2.63 http://onsemi.com 9 MAX707, MAX708 PACKAGE DIMENSIONS Micro8 CASE 846A–02 ISSUE E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. –A– –B– K PIN 1 ID G D 8 PL 0.08 (0.003) –T– M T B S A S SEATING PLANE 0.038 (0.0015) C H L J http://onsemi.com 10 DIM A B C D G H J K L MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 --1.10 0.25 0.40 0.65 BSC 0.05 0.15 0.13 0.23 4.75 5.05 0.40 0.70 INCHES MIN MAX 0.114 0.122 0.114 0.122 --0.043 0.010 0.016 0.026 BSC 0.002 0.006 0.005 0.009 0.187 0.199 0.016 0.028 MAX707, MAX708 PACKAGE DIMENSIONS SO–8 CASE 751–07 ISSUE W –X– NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. A 8 5 0.25 (0.010) S B 1 M Y M 4 K –Y– G C N X 45 SEATING PLANE –Z– 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X S http://onsemi.com 11 J DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 8 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 8 0.010 0.020 0.228 0.244 MAX707, MAX708 Micro8 is a trademark of International Rectifier. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: [email protected] JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone: 81–3–5740–2700 Email: [email protected] ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. N. American Technical Support: 800–282–9855 Toll Free USA/Canada http://onsemi.com 12 MAX707/D