SIGE D602

D602
3V, 6GHz Divide-by-2 Static Prescaler
Final
Applications
Product Description
The D602 is a SiGe divide-by-2 low noise static
prescaler capable of operation up to 6.0 GHz. The
D602 operates over a wide range of input frequencies
and levels, and provides differential outputs for low
noise operation with the common PLL style frequency
synthesizer ICs.
5GHz WLAN, IEEE 802.11a and HIPERLAN
VSAT at 3.6 to 4.2 GHz
Satellite Communications at 4.5 to 4.8 GHz
5 Gbps Clock Generator
The static nature of the prescaler prevents spurious
generation.
Features
The D602 prescaler can operate from either a single
positive or single negative supply with power down
mode for low standby power consumption.
Low Phase Noise, -141dBc/Hz at 1kHz offset
Single Supply Voltage, 2.7 - 4.0 V
Low Power Consumption, 42mW
Power Down Mode, 0.2µA
Compatible with common PLL synthesizer ICs
8-Pin Plastic SOIC Package
Ordering Information
Type
Package
Remark
D602
8-Pin SOIC
Plastic
Package
Functional Block Diagram
VCC
PWD
Out
In
fIn
÷2
fOut
In
Out
VEE
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Sept/01
VEE
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D602
3V, 6GHz Divide-by-2 Static Prescaler
Final
Pin Out Diagram
VCC
1
In
2
In
VEE
3
D602
4
8
PWD
7
Out
6
Out
5
VEE
Pin Out Description
Pin No.
Name
Description
1
VCC
2
In
Prescaler Input (internally-biased)
3
In
Prescaler Complementary Input (internally-biased)
4
VEE
Ground for Input (pins 4 and 5 must be connected to the same potential)
5
VEE
Ground for Output (pins 4 and 5 must be connected to the same potential)
6
Out
Complementary Output (open-collector)
7
Out
Output (open-collector)
8
PWD
Power Supply Voltage Input
Power Down high impedance CMOS input. When PWD is high, the part is powered
down.
Absolute Maximum Ratings
Operation in excess of any one of above Absolute Maximum Ratings may result in permanent damage. This device is
a high performance RF integrated and is ESD sensitive. The RF inputs on this device are Class 0 ESD rated;
therefore suitable precaution should be taken during handling, assembly and testing.
Symbol
20-DST-01
Parameter
Min.
Max.
Unit
Supply Voltage
-0.3
+4.3
V
Voltage on any pin with respect to VEE
-0.3
VCC + 0.3
V
Differential input voltage
-2.0
+2.0
V
Storage Temperature
-65
+150
°C
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D602
3V, 6GHz Divide-by-2 Static Prescaler
Final
Electrical Characteristics
Conditions: VCC = 3.0V, -40°C < TA < 85°C unless otherwise specified
Symbol
Parameter
Note
Min.
Typ.
Max.
Unit
2.7
3.0
4.0
V
-40
25
85
°C
VCC
Supply Voltage
TA
Operating Temperature
ICC
Supply Current
14
18
mA
Power-Down Supply Current
(VPWD = High)
0.2
1.0
µA
ICC – PWDN
1
fIn(U)
Upper Limit of Input Frequency
2
fIn(L)
Lower Limit of Input Frequency
2
0.6
fOsc
Self Oscillation Output Frequency
3
1.0
GHz
3
dBm
PIn(U)
Upper Limit of Input Power
PIn(L)
Lower Limit of Input Power
POut
Output Power
VIH
High-Level PWD Input Voltage
VIL
Low-Level PWD Input Voltage
IIH
High-Level PWD Input Current
IIL
Low-Level PWD Input Current
PN
Residual Phase Noise at 1kHz offset from
a 2.5GHz (fOut) carrier
5.8
6.4
0
-20
4
-15.0
GHz
1.0
GHz
-10
dBm
0
dBm
VCC - 0.2
V
0.2
V
-100.0
100.0
nA
-100.0
100.0
nA
-141
dBc/Hz
Notes: (1) Sample Tested
(2) For a sine-wave input
(3) Since the input signal is AC coupled, in the absence of an RF input, the prescaler may self oscillate and
provide an output at this frequency. Self oscillation can be eliminated by powering down the prescaler,
or applying a differential DC input voltage (a 47kΩ resistor placed between pin 3 and VCC).
(4) This power is delivered to a 50Ω load. It excludes the power dissipated in the external pull-up resistors.
Test Circuit
VCC
100p
100p
100n
100n
51
Signal
Generator
1n
1p
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Rev 5.0
Sept/01
1
8
2
7
D602
3
6
4
5
51
1n
1n
50 Ohm
Measurement
Equipment
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D602
3V, 6GHz Divide-by-2 Static Prescaler
Final
Typical Performance Characteristics
Upper Limit of Input Frequency vs Supply Voltage
PIn = – 10dBm
Supply Current vs Supply Voltage
17
6.9
16
6.7
Input Frequency [GHz]
Supply Current [mA]
15
14
13
12
11
10
6.3
6.1
5.9
5.7
9
8
2.2
6.5
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
5.5
2.2
4.0
2.4
2.6
Supply Voltage [V]
3.2
3.4
3.6
3.8
4.0
3.8
4.0
Output Power vs Supply Voltage
fIn = 5.0 GHz
-2
10
PIn(U)
-3
0
Output Power [dBm,]
Input Power [dBm]
3.0
Supply Voltage [V]
Input Power Limits vs Input Frequency
-10
-20
-30
PIn(L)
-40
0.0
2.8
1.0
2.0
3.0
4.0
5.0
6.0
-4
-5
-6
-7
-8
-9
-10
-11
7.0
-12
2.2
Input Frequency [GHz]
2.4
2.6
2.8
3.0
3.2
3.4
3.6
Supply Voltage [V]
Output Power vs Input Frequency
Upper Limit of Input Frequency vs Temperature
6.7
6.6
Input Frequency [GHz]
Output Power [dBm]
0
-5
-10
-15
0.0
3.0V
2.7V
6.3
6.2
6.1
6
5.9
5.8
1.0
2.0
3.0
4.0
5.0
Input Frequency [GHz]
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6.5
6.4
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Sept/01
6.0
7.0
5.7
-40
-20
0
20
40
60
80
Temperature [°C]
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D602
3V, 6GHz Divide-by-2 Static Prescaler
Final
Minimum Required Supply Voltage vs Temperature
(fIn = 5.0 GHz)
Output Power vs Temperature
(fIn = 5.0 GHz)
2.2
-3
-3.5
-4
Output Power [dBm]
Supply Voltage [V]
2.15
2.1
2.05
-4.5
-5
-5.5
-6
-6.5
2
-40
-20
0
20
40
60
80
Temperature [°C]
-7
-40
-20
0
20
40
60
80
Temperature [°C]
Supply Current vs Temperature
Residual Phase Noise
14
Supply Current [mA]
13.9
13.8
13.7
13.6
13.5
13.4
13.3
-40
-20
0
20
40
60
80
Temperature [°C]
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D602
3V, 6GHz Divide-by-2 Static Prescaler
Final
Typical Application Information
+3V
RF
VCO
50
50
1n
*
10p
47k
10p
1
8
2
7
D602
3
6
4
5
10p
PLL
Frequency
Synthesizer
Ref.
10p
* The 47kΩ resistor provides a DC offset that disables self oscillation in the absence of an RF input.
Cascading D602 Prescalers
D602 prescalers can be cascaded to achieve division ratios other than 2. For example two D602 prescalers can be
used as shown in the following diagram to perform frequency division by 4.
+3V
PWD
50
50
50
1
In
1n
10p
10p
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Rev 5.0
2
8
D602
7
3
6
4
5
Sept/01
50
1n
1
8
2
7
10p
10p
D602
3
6
4
5
10p
Out
10p
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D602
3V, 6GHz Divide-by-2 Static Prescaler
Final
Package Information
Package dimensions in millimeters (inches)
8-Lead Plastic SOIC
SiGe
D602
XXXXXXX
Packing Details
Note : Refer to JEDEC MS-012 for additional information
20-DST-01
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Sept/01
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D602
3V, 6GHz Divide-by-2 Static Prescaler
Final
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Product Preview
The datasheet contains information from the product concept specification. SiGe Semiconductor Inc. reserves the right to change
information at any time without notification.
Preliminary Information
The datasheet contains information from the design target specification. SiGe Semiconductor Inc. reserves the right to change
information at any time without notification.
Final
The datasheet contains information from the final product specification. SiGe Semiconductor Inc. reserves the right to change
information at any time without notification. Production testing may not include testing of all parameters.
Information furnished is believed to be accurate and reliable and is provided on an “as is” basis. SiGe Semiconductor Inc. assumes
no responsibility or liability for the direct or indirect consequences of use of such information nor for any infringement of patents or
other rights of third parties, which may result from its use. No license or indemnity is granted by implication or otherwise under any
patent or other intellectual property rights of SiGe Semiconductor Inc. or third parties. Specifications mentioned in this publication
are subject to change without notice. This publication supersedes and replaces all information previously supplied. SiGe
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