DATA BULLETIN MX809 1200bps MSK Modem PRELIMINARY INFORMATION Features Half-Duplex 1200bps MSK Modem operating under C-BUS control Software Selectable Checksum Generation and Error Checking in accordance with MPT1327 RECOVERED CLOCK Low Power Operation Member of DBS800 Family (C-BUS Compatible) CHECKSUM GEN/CHECK VDD BYTE COUNTER RX IN MSK RECEIVER DATA REGISTER 1 SYNC/SYNC DETECT ä ä RX SYNC DETECT CLOCK GENERATOR VBIAS RX SYNC DETECT AMP IN ä RX FREEFORMAT TX OUT ä XTAL/ CLOCK XTAL MSK TRANSMITTER DATA REGISTER 2 RECOVERED CLOCK RX DATA BUFFER TX DATA BUFFER _ ä CS RX DATA READY REPLY DATA SYNC PROGRAM LOW - HIGH 8-BIT PARALLEL BUS VBIAS AMP OUT V SS ä WAKE RX SYNC DETECT RX SYNC DETECT ä CONTROL LOGIC ä COMMAND DATA ä AND + UNCOMMITTED AMPLIFIER ä SERIAL CLOCK INTERRUPT ENABLE TX IDLE ä C-BUS INTERFACE TX DATA READY ADDRESS DECODER CONTROL REGISTER STATUS REGISTER INTERRUPT GENERATOR IRQ ADDRESS SELECT The MX809 is an intelligent, half-duplex 1200-baud MSK Modem, which operates under C-BUS control. This modem provides software selectable checksum generation and error checking in accordance with MPT1327. In TX Mode the MX809 will: 1. a) Accept from the host and transmit 8-bit bytes of data as instructed (preamble, sync, address, and data), or b) Internally calculate and inset a 2 byte checksum based on the preceding 6 bytes f data, or c) Disable the internal checksum generator and continuously transmit the data supplied. 2. Transmit 1 hang-bit and go to TX idle when all loaded data bytes have been transmitted. In RX Mode the MX809 will: 1. 2. Detect and carry out bit synchronization within 16 bits. a) Search and detect the user-programmed Sync (or its opposite logic sense) Word and carry out frame synchronization. Data will then be output in 8-bit bytes via the RX Data Buffer. b) Use the received checksum to calculate the presence of any errors, setting the Status Register accordingly. 3. Make the incoming data directly available via the RX Data Buffer (RX Freeformat), overriding the synchronization requirements. RX input timing is achieved by recovering an RX clock from the incoming data stream. Output tones are timed to the internally generated TX clock. Filter, register clocks, and transmit MSK tone frequencies are derived internally from the external Xtal or clock pulse input. A 4.032MHz Xtal or clock input is required for compliance with the MPT1327 Signaling Specification. Note: All information contained in this data bulletin is specified using a 4.032MHz Xtal, 1200bps baud rate, with Mark and Space frequencies of 1200Hz and 1800Hz. The MX809 has a non-committed amplifier on-chip for general applications in the DBS 800 series. The MX809 may be used with a 5.0V power supply and is available in the following packages: 24-pin PLCC (MX809LH), and 24-pin CERDIP (MX809J). 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 2 MX809 Contents Section Page 1 Block Diagram................................................................................................................ 3 2 Signal List....................................................................................................................... 4 3 External Components.................................................................................................... 6 4 General Description....................................................................................................... 7 5 Controlling Protocol ...................................................................................................... 7 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 5.9 Address/Commands ............................................................................................................ 7 Address Select .................................................................................................................... 8 Write to Control Register ..................................................................................................... 9 RX Data buffer -- “Read RX Data Buffer” ............................................................................ 9 TX Data Buffer -- “Write to TX Data Buffer” ....................................................................... 10 SYNC Program -- “Write to SYNC Program” ..................................................................... 10 Read Status Register ........................................................................................................ 10 Interrupt Request............................................................................................................... 11 General Reset ................................................................................................................... 11 6 Application ................................................................................................................... 12 6.1 6.2 6.3 6.4 6.5 Checksum Generation and Checking ................................................................................ 12 6.1.1 Generation .............................................................................................................................. 12 6.1.2 Checking ................................................................................................................................. 12 Modem Performance ......................................................................................................... 12 Modem Timing Information................................................................................................ 13 TX Timing .......................................................................................................................... 14 6.4.1 TX More Than One Message, SYNC Before Every Message, TX Checksum Enabled ......... 14 6.4.2 TX More Than One Message, TX Checksum Not Enabled. ................................................... 14 6.4.3 TX One Message, TX Checksum Enabled ............................................................................. 15 6.4.4 TX One Message, TX Checksum Not Enabled....................................................................... 15 RX Timing.......................................................................................................................... 16 6.5.1 RX SYNC / SYNC Required Before Every Message, Rx Checksum Not Enabled ................. 16 6.5.2 RX Additional Data Follows Initial Address (6 Data & 2 Checksum Bytes) Data, RX checksum Enabled................................................................................................................................... 16 7 Performance Specifications........................................................................................ 17 7.1 7.2 Electrical Specifications..................................................................................................... 17 7.1.1 Absolute Maximum Limits ....................................................................................................... 17 7.1.2 Operating Limits...................................................................................................................... 17 7.1.3 Operating Characteristics ....................................................................................................... 18 7.1.4 Timing ..................................................................................................................................... 20 Packages........................................................................................................................... 21 MXCOM, Inc. reserves the right to change specifications at any time without notice. 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 3 MX809 1 Block Diagram RECOVERED CLOCK CHECKSUM GEN/CHECK VDD BYTE COUNTER RX IN MSK RECEIVER DATA REGISTER 1 XTAL/ CLOCK SYNC/SYNC DETECT ä CLOCK GENERATOR ä RX SYNC DETECT VBIAS RX SYNC DETECT AMP IN ä RX FREEFORMAT TX OUT ä RECOVERED CLOCK XTAL MSK TRANSMITTER DATA REGISTER 2 RX DATA BUFFER TX DATA BUFFER _ ä CS REPLY DATA INTERRUPT ENABLE VBIAS ä AMP OUT V SS ä WAKE RX SYNC DETECT RX SYNC DETECT ä CONTROL LOGIC + UNCOMMITTED AMPLIFIER ä 8-BIT PARALLEL BUS AND TX IDLE SYNC PROGRAM LOW - HIGH ä COMMAND DATA C-BUS INTERFACE TX DATA READY ä SERIAL CLOCK RX DATA READY ADDRESS DECODER CONTROL REGISTER STATUS REGISTER INTERRUPT GENERATOR IRQ ADDRESS SELECT Figure 1: Block Diagram 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 4 MX809 2 Signal List Pin 1 Signal Xtal Description This is the output of the on-chip clock oscillator. External components are required at this output when a Xtal is used. See Figure 2. Inset 2 Xtal/Clock 3 IRQ 4 5 N/C N/C 6 RX Freeformat When this input is logic “0” in the RX Mode, it allows received data to be read from the RX Data Buffer via the Reply Data line without having to achieve byte synchronization (SYNC/ SYNC ) first. Data will continue to be available after this input goes to a logic “1” until either a SYNC or SYNC Prime Bit is set or the modem is set to TX Mode. When held at a logic “1” the modem operates normally. This pin has an internal 1M pull-up resistor. Note: If this input is held at a logic “0” in the TX Mode, the RX Data Ready bit in the Status Register may occasionally be set, but not cause an interrupt. If this input is a logic “0” when going into the RX Mode, and RX Data Ready interrupt may be generated immediately (in this case the first byte of RX data should be ignored). 7 VBIAS The internal circuitry bias line, this is held at VDD/2. This pin must be decoupled to VSS by capacitor C3. See Figure 2. 8 9 10 Amp In Amp Out RX In The inverting input to the on-chip uncommitted amplifier. The output of the on-chip uncommitted amplifier. This is the 1200 baud, 1200Hz/1800Hz received MSK signal input. The input signal to this pin must be AC coupled via capacitor C4. See Figure 2. 11 12 N/C VSS 13 TX Out 14 15 16 17 N/C N/C N/C Reply Data 18 19 N/C CS Chip Select . This is the ‘C-BUS’ data loading control function. This input is provided by the microcontroller. Data transfer sequences are initiated, completed or aborted by the CS signal. See Section 6 and Section 7.1.4. 20 Command Data This is the ‘C-BUS’ serial data input from the microcontroller. Data is loaded to this device in 8-bit bytes, MSB (bit 7) first and LSB (bit 0) last, synchronized to the Serial Clock. See Section 6 and Section 7.1.4. 1998 MX-COM, Inc. This is the input to the on-chip clock oscillator inverter. A Xtal or externally derived clock should be connected here. See Figure 2. Inset The output of this pin indicates an interrupt condition to the microcontroller by going to a logic “0”. This is a “wire-or-able” output that enables the connection of up to 8 peripherals to 1 interrupt port on the microcontroller. This pin is an opendrain output, and therefore has a low impedance pulldown to logic “0” when active and a high impedance when inactive. The conditions that cause interrupts are indicted in the Status Register and are shown in Table 2. The system IRQ line requires a pull-up resistor to VDD. Negative Supply (GND) This is the 1200 baud, 1200Hz/1800Hz MSK TX output. When not transmitting data the output impedance of this pin is high. On power-up this output can be any level. A General Reset command is required to ensure that this output attains VBIAS initially. This is the C-BUS serial data output to the microcontroller. The transmission of Reply Data bytes is synchronized to the Serial Clock under the CS input. This 3state output is held high impedance when not sending data to the microcontroller. See Section 6 and Section 7.1.4. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 5 MX809 Pin 21 Signal Serial Clock Description This is the ‘C-BUS’ serial Clock input. This clock, produced by the microcontroller, is used for transfer timing of commands and data to and from the MSK Modem. See Section 6 and Section 7.1.4. This pin enables two MX809s to be used on the same C-BUS, providing fullduplex operation. When at a logic “1” Address/Command bytes (with the exception of a General Reset) must have bit 3 set to a logic “1” to address this device. See Table 5 and Table 6. 22 Address Select 23 Wake This input can be used to reactivate the MX809 from Powersave. The device will be in Powersave when both this pin and bit 2 of the Control Register are set to logic “1”. Recovery from Powersave is achieved by putting either the Wake pin or the Powersave bit in the Control Register to logic “0”. This allows MX809 activation by the microcontroller or an external signal, such as R.S.S.I. or Carrier Detect. See Table 3. 24 VDD Positive supply. A single +5.0V power supply is required. Levels and voltages within the MSK Modem are dependent upon this supply. Table 1: Signal List TX Idle RX Data Ready RX SYNC Detect TX Data Ready RX Sync Detect Interrupt outputs can be disabled by bit 3 of the Control Register Table 2: IRQ Conditions Powersave (CR bit 2) Wake MX809 Condition 1 0 1 0 1 1 0 0 Powersave Enabled Enabled Enabled Table 3: 1998 MX-COM, Inc. Wake and Powersave Conditions www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 6 MX809 3 External Components XTAL ➤ R2 SEE INSET XTAL/CLOCK ➤ IRQ ➤ RX FREEFORMAT ➤ VBIAS AMP IN ➤ C3 AMP OUT ➤ RX IN ➤ C4 VSS ➤ 1 2 3 4 5 6 7 8 9 10 11 12 V MX809J 24 ➤ DD WAKE 23 ➤ ➤ 22 ADDRESS SELECT 21 ➤SERIAL CLOCK COMMAND DATA 20 ➤ CS 19 ➤ 18 ➤ 17 REPLY DATA 16 15 14 TX OUT ➤ 13 C5 INSET XTAL 1 X1 MX809J R1 2 XTAL/CLOCK C2 C1 Figure 2: Recommended External Components Component R1 Notes 1.0M Tolerance ±10% 22.0K ±10% 33pF 33pF ±20% ±20% C3 1.0F ±20% C4 0.1F ±20% C5 1.0F ±20% R2 C1 C2 X1 1 1 1 Value 4.032MHz Table 4: Recommended External Components Recommended External Component Notes: 1. Xtal circuit capacitors C1 (CD) and C2 (CG) shown in Inset 2 are recommended in accordance with MXCOM’s Crystal Oscillator Application Note. 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 7 MX809 4 General Description The MX809 is an intelligent, half-duplex 1200-baud MSK Modem, which operates under C-BUS control. This modem provides software selectable checksum generation and error checking in accordance with MPT1327. In TX Mode the MX809 will: 1. a) Accept from the host and transmit 8-bit bytes of data as instructed (preamble, sync, address, and data), or b) Internally calculate and inset a 2 byte checksum based on the preceding 6 bytes of data, or c) Disable the internal checksum generator and continuously transmit the data supplied. 2. Transmit 1 hang-bit and go to TX idle when all loaded data bytes have been transmitted. In RX Mode the MX809 will: 1. Detect and carry out bit synchronization within 16 bits. 2. a) Search and detect the user-programmed Sync (or its opposite logic sense) Word and carry out frame synchronization. Data will then be output in 8-bit bytes via the RX Data Buffer. b) Use the received checksum to calculate the presence of any errors, setting the Status Register accordingly. 3. Make the incoming data directly available via the RX Data Buffer (RX Freeformat), overriding the synchronization requirements. RX input timing is achieved by recovering an RX clock from the incoming data stream. Output tones are timed to the internally generated TX clock. Filter, register clocks, and transmit MSK tone frequencies are derived internally from the external Xtal or clock pulse input. A 4.032MHz Xtal or clock input is required for compliance with the MPT1327 Signaling Specification. Note: All information contained in this data bulletin is specified using a 4.032MHz Xtal, 1200bps baud rate, with Mark and Space frequencies of 1200Hz and 1800Hz. The MX809 has a non-committed amplifier on-chip for general applications in the DBS 800 series. 5 Controlling Protocol Control of the functions within the MX809 MSK Modem is by a group of Address/Commands and appended data instructions from the system microcontroller. Two separate MSK Modems can be addressed. The use of these A/Cs is detailed in the following paragraphs and tables. Command Assignment Address/Command Binary HEX MSB Command Data LSB General Reset 01 00000001 Control Register bits set to logic “0” Write to Control Register 40 01000000 + 1 byte instruction to Control Register Read Status Register 41 01000001 + 1 byte reply from Status Register Read RX Data Buffer 42 01000010 + 1 byte of data from RX Data Buffer Write to TX Data Buffer 43 01000011 + 1 byte of data to TX Data Buffer Write to SYNC Program 44 01000100 + 2 bytes of SYNC Word to SYNC Program. Register Table 5: Modem No. 1 C-BUS Address/Commands – (Address Select input at a logic “0”) 5.1 Address/Commands Instructions and data transactions to and from the MX809 consist of an Address/Command (A/C) byte followed by either further instructions or data, or a Status or RX Data Reply. Control and configuration is by writing instructions from the microcontroller to the Control Register [40H (48H)]. Reporting of the MX809 configuration is by reading the Status Register [41H (49H)]. Instructions and data are transferred via C-BUS in accordance with the timing information given in Figure 11. Data to be transmitted as MSK is sent to the TX Data Buffer via the Command Data line. Received data is read from the RX Data buffer via the Reply Data line. Instructions and data transactions to and from this device are preceded by the relevant A/C. 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 8 MX809 C-BUS allocations for the MX809 are shown in Table 5 and Table 6. Command Assignment Address/Command Binary HEX MSB Command Data LSB General Reset 01 00000001 Control Register bits set to logic “0” Write to Control Register 48 01001000 + 1 byte instruction to Control Register Read Status Register 49 01001001 + 1 byte reply from Status Register Read RX Data Buffer 4A 01001010 + 1 byte of data from RX Data Buffer Write to TX Data Buffer 4B 01001011 + 1 byte of data to TX Data Buffer Write to SYNC Program 4C 01001100 + 2 bytes of SYNC Word to SYNC Program Register Table 6: Modem No. 2 C-BUS Address/Commands – (Address Select input at a logic “1”) 5.2 Address Select This input allows 2 MSK Modems on the same BUS, using the correct addressing. When operating in a system using 2 MSK Modems, one MSK Modem is designated No. 1 and requires its Address Select input to be held at a logic “0”. The second Modem (No. 2) requires its Address select input to be held at logic “1”. All C-BUS transactions with Modem 1 will use Address/Command allocations 40H to 44H (Table 5) and transactions with Modem 2 will use 48H to 4CH (Table 6). For explanation purposes, further descriptions of MX809 MSK Modem internal register functions will deal primarily with MSK Modem No. 1 (Address Select at logic “0”). 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 5.3 9 MX809 Write to Control Register This “Write Only” register directs the Modem’s operation. SYNC : When set, this bit enables SYNC Word detection. It is cleared on a successful SYNC Word detection. SYNC Prime: When set, this bit enables SYNC Word detection. It is cleared on a successful SYNC Word detection. Interrupt Enable: When set, this bit allows interrupts to be output by the MX809 on the IRQ line. Powersave: Used in conjunction with the Wake input (see Section 2) to control the Powersave state of the MX809. Checksum Enable: When set: In TX: A 2-byte checksum is generated and transmitted after every 6 bytes transmitted. In RX: After every 8 received bytes (6 information + 2 checksum) the checksum word is checked. If the checksum is correct, the RX Checksum True bit in the Status Register is set to a logic “1”. When this bit is a logic “0” no checksum are generated or checked. Note: Checksum operation is inhibited during the SYNC / SYNC search period. Setting MSB Bit 7 6 5 Control bits Transmitter first Not Used Set to “0” Not Used Set to “0” SYNC Prime 0 1 4 0 1 3 0 1 2 0 1 1 0 1 0 0 1 Primed SYNC Prime Primed Interrupt Enable Disable Enable Powersave Normal Operation Powersave Checksum Enable Disable Enable RX/TX Mode RX TX Table 7: Control Register 5.4 RX Data buffer -- “Read RX Data Buffer” This “Read Only” register contains the last byte of data received from the Data Register. Data is received Bit 7 (MSB) first. MSB 7 1998 MX-COM, Inc. LSB 6 5 4 3 2 RX Data Buffer 1 0 www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 5.5 10 MX809 TX Data Buffer -- “Write to TX Data Buffer” This “Write Only” register contains the next byte of data to be transmitted. Bit 7 (MSB) is transmitted first. MSB 7 5.6 LSB 6 5 4 3 2 TX Data Buffer 1 0 SYNC Program -- “Write to SYNC Program” This “Write Only” register is loaded with the required SYNC word. This word (or its opposite logic sense, SYNC ) is compared with the received synchronization word. If the required SYNC Word is less that 16bits, the remaining bits must be programmed as preamble (10101010…etc). Bit 15 (MSB) is loaded first. MSB 15 5.7 14 13 Byte 1 12 11 10 SYNC High 9 8 7 6 5 Byte 2 4 3 SYNC Low LSB 2 1 0 Read Status Register This “Read Only” register indicated the source of MX809 interrupts ( IRQs ). RX SYNC Detect: This is set and an Interrupt is generated when the correct SYNC Word is detected (if SYNC Prime is set). It is cleared by (1) reading the Status Register, and (2) setting RX / TX to logic “1”. RX SYNC Detect: This is set and an Interrupt is generated when the correct SYNC Word is detected (if SYNC Prime is set). It is cleared by (1) reading the Status Register, and (2) setting RX / TX to logic “1”. TX Idle: This is set and an Interrupt is generated when all loaded TX data and 1 “hang-bit” have been transmitted. It is cleared by (1) writing to the TX Data Buffer, and (2) setting RX / TX to logic “0”. TX Data Ready: This is set and an Interrupt generated indicating that a byte of data should be written to the TX Data Buffer. It is cleared by (1) reading the Status Register and writing a byte of data to the TX Data Buffer, and (2) setting RX / TX to logic “0”. RX Data Ready: When this is set and an Interrupt generated, it indicates that the RX Data Buffer is full, and that a byte of data is to be read from the RX Data buffer. This must be read within 8 bit periods. It is cleared by (1) reading the Status Register and the RX Data buffer, and (2) setting the RX / TX to logic “1”/ RX Checksum True: This is set and an Interrupt is generated by a successful comparison of the received and self-generated checksums. It is cleared by (1) reading the Status Register and the RX Data Buffer, and (2) RX / TX being taken to logic “1” 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 11 MX809 Reading MSB Bit 7 0 1 6 0 1 5 RX SYNC Detect 0 1 SYNC 4 0 1 3 0 1 2 0 1 1 0 1 0 0 1 Status Bits Received First Undefined “0” or “1” Undefined “0” or “1” RX SYNC Detect SYNC TX Idle Idle TX Data Ready TX Date Ready RX Checksum True True RX Data Ready RX Data Ready Table 8: Status Register 5.8 Interrupt Request The conditions that cause interrupts to be output (if enabled by the Control Register) from the MX809 are: TX Idle TX Data Ready RX SYNC Detect RX Data Ready RX SYNC Detect The Status Register should be read to find the cause of the interrupt. Interrupts are cleared by (1) reading the Status Register, or (2) changing the state of the RX / TX bit. 5.9 General Reset Upon power-up, the bits in the MX809 Mode register and buffer will be random (either “0” or “1”). The General Reset command (01H) will “reset” all microcircuits in the C-BUS and had the following effect on the MX809. All bits in the Control Register will be set to logic “0”. The Tx Out output will be set to VBIAS. Note: The Status register, RX Data Buffer, TX Data Buffer, and SYNC Program register are not affected by the General Reset Command. 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 12 MX809 6 Application 6.1 6.1.1 Checksum Generation and Checking Generation The checksum generator takes the 48 bits from the 6 bytes loaded into the TX Data Buffer and divides them into modulo-2 by the generating polynomial: x15 + x14 + x13 + x11 + x4 + x2 + x1 It then takes the 15-bit remainder from the polynomial divider, inverts the last bit and appends an EVEN parity bit generated from the initial 48 bits and the 15 bit remainder (with the last bit inverted). This 16 bit word is used as the “Checksum”. 6.1.2 Checking The checksum checker does two things: 1. It takes the first 63 bits of a received message, inverts bit 63, and divides them modulo-2 by the generating polynomial: x15 + x14 + x13 + x11 + x4 + x2 + x1 2. The 15 bits remaining in the polynomial divider are checked to make sure that they are all zero. 3. It generates an even parity bit from the first 63 bits of a received message and compares this bit with the received parity (bit 64). If the 15 bits in the polynomial divider are all zero and the two parity bits are equal, then the RX Checksum True (Status Register bit 1) is set. 6.2 Modem Performance Figure 3: Bit Error Rate vs. Signal-to-Noise Ratio 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 6.3 13 MX809 Modem Timing Information Figure 4: Modem Timing Notes: 1. The SYNC and SYNC detector searches the incoming bit stream starting at the end of the byte in which SYNC / SYNC Prime was set. 2. After detection of a SYNC / SYNC word, the SYNC / SYNC Prime bits automatically go low (control bits 5 and 6: detector off. 3. The checksum checker is inhibited during the time SYNC / SYNC search is operating. 4. The Status Register will indicate whether SYNC or SYNC was detected here. 5. Any number of preamble bits can occur here. 6. Any number of bits can occur here. 7. RX Freeformat set high. 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 6.4 14 MX809 TX Timing A – Address bytes C – Checksum bytes D – Data bytes H – Hang bit P – Preamble bytes 6.4.1 - Don’t care state TX only – In TX, Preamble, and SYNC are loaded as data from the microcontroller. TX More Than One Message, SYNC Before Every Message, TX Checksum Enabled RX/TX TX OUTPUT P1 P2 P S1 S2 A1 A2 A3 A4 A5 S2 A1 A2 A3 A4 A5 A6 C1 A6 C2 S1 S2 D1 D2 D3 D4 D5 S1 D1 D2 D3 D4 D5 D6 D6 NOTE 6 IRQ READ STATUS REGISTER TX DATA READY WRITE TO TX DATA BUFFER P1 P2 S1 P S2 CHECKSUM ON/OFF Figure 5: TX More Than One Message, SYNC Before Every Message, TX Checksum Enabled Notes: 1. Preamble and SYNC bytes are loaded as data from the microcontroller. 2. The TX output will be held at bias level when no data is being transmitted. 3. TX byte synchronization is established by loading of the first preamble byte from the microcontroller. 4. Checksum must be turned off during preamble and SYNC words. 5. When RX / TX is low, TX output is at bias. 6. Any number of preamble bytes can occur here. 6.4.2 TX More Than One Message, TX Checksum Not Enabled. RX/TX TX OUTPUT P1 P2 P S1 S2 A1 A2 A3 NOTE 2 A4 A S1 S2 D1 D2 D3 D4 NOTE 3 D S1 S2 D1 S2 D1 D2 NOTE 3 IRQ READ STATUS REGISTER TX DATA READY WRITE TO TX DATA BUFFER P1 P2 P S1 S2 A1 A2 A3 A4 A S1 S2 D1 D2 D3 D4 D S1 CHECKSUM ON/OFF Figure 6: TX More Than One Message, TX Checksum Not Enabled. Notes: 1. Preamble, SYNC words and checksums are supplied by the microcontroller in this format as data bytes. 2. Any number of preamble bytes can occur here. 3. Any number of address/data bytes can occur here. 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 6.4.3 15 MX809 TX One Message, TX Checksum Enabled RX/TX TX OUTPUT P1 P2 P S1 S2 A1 S2 A1 A2 A2 A3 A4 A5 A4 A5 A6 A6 C1 C2 H NOTE 2 IRQ READ STATUS REGISTER TX DATA READY WRITE TO TX DATA BUFFER P1 P2 P S1 A3 CHECKSUM ON/OFF TX IDLE Figure 7: TX One Message, TX Checksum Enabled Notes: 1. H is the “Hangover bit” (Logic1) appended to the transmitted message before transmission is terminated. 2. Any number of preamble bytes can occur here. 3. Transmission terminates after C1, C2, and H. Termination occurs when no further data bytes are written to the TX Data Buffer. 6.4.4 TX One Message, TX Checksum Not Enabled. RX/TX TX OUTPUT P1 P2 P S1 S2 A1 A2 A3 A4 NOTE 2 A5 A H NOTE 3 IRQ READ STATUS REGISTER TX DATA READY WRITE TO TX DATA BUFFER P1 P2 P S1 S2 A1 A2 A3 A4 A5 A CHECKSUM ON/OFF TX IDLE Figure 8: TX One Message, TX Checksum Not Enabled Notes: 1. H is the “Hangover bit” (Logic1) appended to the transmitted message before transmission is terminated. 2. Any number of preamble bytes can occur here. 3. Any number of address/data bytes can occur here. 4. Transmission terminates when no further data bytes are loaded into the TX Data Buffer. 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 6.5 16 MX809 RX Timing A – Address bytes C – Checksum bytes D – Data bytes H – Hang bit P – Preamble bytes 6.5.1 - Don’t care state TX only – In TX, Preamble, and SYNC are loaded as data from the microcontroller. RX SYNC / SYNC Required Before Every Message, Rx Checksum Not Enabled RX/TX P1 RX INPUT P2 P SYNC A1 A2 NOTE 1 A3 A NOTE 2 SYNC A1 A2 A3 NOTE 3 IRQ READ STATUS REGISTER SYNC DETECT (OR SYNC DETECT) RX DATA READY READ RX DATA BUFFER A1 A2 A3 A SYNC/SYNC PRIME CHECKSUM ON/OFF Figure 9: RX SYNC / SYNC Required Before Every Message, RX Checksum not Enabled Notes: 1. Any number of preamble bits can occur here. 2. Any number of address/data bytes can occur here. 3. Any number of bits can occur here 4. RX Freeformat set high. 6.5.2 RX Additional Data Follows Initial Address (6 Data & 2 Checksum Bytes) Data, RX checksum Enabled RX/TX P1 P2 RX INPUT P SYNC A1 A2 A3 A4 A5 A6 C1 C2 D1 D2 D3 D4 D5 D6 C1 C2 D1 NOTE 1 IRQ READ STATUS REGISTER SYNC DETECT (OR SYNC DETECT) RX DATA READY READ RX DATA BUFFER RX CHECKSUM TRUE SYNC/SYNC PRIME CHECKSUM ON/OFF Figure 10: RX Additional Data Follows Initial Address (6 Data & 2 Checksum Bytes) Data , RX Checksum Enabled Notes: 1. Any number of preamble bits can occur here. 2. RX Freeformat set high. 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 17 MX809 7 Performance Specifications 7.1 Electrical Specifications 7.1.1 Absolute Maximum Limits Exceeding these maximum ratings can result in damage to the device. General Supply (VDD-VSS) Voltage on any pin to VSS Current VDD VSS Any other pin J / LH Packages Total allowable Power dissipation at TAMB = 25C Notes Min. -0.3 -0.3 Typ. Max. 7.0 VDD + 0.3 Units V V 30 30 20 mA mA mA 800 mW -30 -30 -20 10 Derating above 25C mW/C above 25C Operating Temperature -40 85 C Storage Temperature -55 125 C Table 9: Absolute Maximum Ratings 7.1.2 Operating Limits Correct Operation of the device outside these limits is not implied. Notes Supply (VDD-VSS) Operating Temperature Xtal Frequency Min. 4.5 -40 Typ. 5.0 Max. 5.5 85 4.032 Units V C MHz Table 10: Operating Limits 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 7.1.3 18 MX809 Operating Characteristics For the following conditions unless otherwise specified. VDD = 5.0V @ TAMB = 25C Xtal/Clock Frequency = 4.032MHz, Audio Level 0dB ref. = 308mVRMS @ 1kHz Bit Rate = 1200bps Notes Static Values Supply Current Enabled Powersave Dynamic Values Digital Interface Input Logic “1” Input Logic “0” Min. Max. 5.0 2.0 Output Logic “1” (IOH = -120A) Output Logic “0” (IOH = 360A) Digital Input Current VIN = Logic “1” or “0” Digital Input Capacitance Tri-State “OFF” Leakage Current 1 1 2 mA mA 3.5 1.5 2, 3 0.4 V 1 1.0 1 8 7.5 4.0 A pF 4.6 -4.0 100 Output Impedance Transmitting Data Not Transmitting Data ROUT k M 5.0 k dB MHz 15.0 4.032 4 5 k 10.0 -9.0 -2.0 10.5 dB 7.0 1.0 10-4 10-8 99.0 99.5 % % 6 www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA 10.0 1.0 On-Chip Xtal Oscillator RIN A k 6.0 Gain Frequency Receiver Signal Input Levels Bit Error Rate At 12dB SNR At 20dB SNR Synchronization at 12dB SNR Probability of Bit 8 being correct Probability of Bit 16 being correct Units V V V Analog Impedance Input Impedance 1998 MX-COM, Inc. Typ. Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 19 MX809 Notes Transmitter Output Level Output Level Variation Output Distortion Third Harmonic Distortion Logic “1” Frequency Logic “0” Frequency Isochronous Distortion 1200Hz – 1800Hz Min. Typ. Max. 0 -1.0 3.0 2.0 1200 1800 7 7 1800Hz – 1200Hz Uncommitted Amplifier Bandwidth Gain Input Impedance Output Impedance 1.0 5.0 3.0 Units dB dB % % Hz Hz 25.0 40.0 s 20.0 40.0 s 200 50.0 kHz dB 1.0 10.0 k Table 11: Operating Characteristics Operating Characteristics Notes: 1. Device control pins: Serial Clock, Command Data, Wake , and CS . 2. Reply Data output. 3. IRQ output 4. For baud rate specified (1200 baud) 5. Signal-to-Noise Ratio = 50dB 6. The response time is measured using 10101010…101 signal input pattern at 230mVRMS (-2.5dB) with noise. 7. Dependant upon Xtal tolerance. 8. IRQ and Reply Data outputs for VSS < VOUT < VDD. 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 7.1.4 20 MX809 Timing C-BUS Timing tCSE Chip Select Low to First Serial Clock Rising Edge Min. 2.0 Typ. Max. Units tCHS Last Serial Clock Rising Edge to Chip Select High 4.0 tHIZ Chip Select High to Reply Data High -Z tCSOFF Chip Select High time between transactions 2.0 s tNXT Inter-Byte Time 4.0 s tCK Serial Clock Period 2.0 s s s 2.0 Table 12: Timing Information Notes: 1. Depending on the command, 1 or 2 bytes of Command Data is transmitted to the peripheral MSB (bit 7) first, LSB (bit 0) last. Reply Data is read from the peripheral MXB (bit 7) first, LSB (bit 0) last. 2. Data is clocked into and out of the peripheral on the rising Serial Clock edge. 3. Loaded commands are acted upon at the end of each command. 4. To allow for differing microcontroller serial interface formats, C-BUS compatible ICs are able to work with either polarity Serial Clock pulses. t CSOFF CHIP SELECT t CSE t NXT SERIAL CLOCK t CSH t NXT t CK COMMAND DATA 7 6 5 4 3 2 1 MSB 0 7 LSB MSB 6 5 4 3 2 1 0 LSB 7 6 4 3 2 1 0 LSB FIRST DATA BYTE ADDRESS/COMMAND BYTE 5 MSB LAST DATA BYTE ä REPLY DATA 7 Logic level is not important 6 5 4 3 2 1 0 MSB LSB FIRST REPLY DATA BYTE 7 MSB 6 5 4 3 2 1 ä t HIZ 0 LSB LAST REPLY DATA BYTE Figure 11: C-BUS Timing Information 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. MSK Modem 7.2 21 MX809 Packages A Package Tolerances B E E1 Y T PIN1 K H L C J1 J P DIM. A B C E E1 H J J1 K L P T Y MIN. TYP. MAX. 1.270 (32.26) 1.200 (30.48) 0.555 (14.04) 0.500 (12.70) 0.151 (3.84) 0.220 (5.59) 0.600 (15.24) 0.670 (17.02) 0.590 (14.99) 0.625 (15.88) 0.015 (0.38) 0.045 (1.14) 0.015 (0.38) 0.023 (0.58) 0.040 (1.02) 0.065 (1.65) 0.066 (1.67) 0.074 (1.88) 0.121 (3.07) 0.160 (4.05) 0.100 (2.54) 0.008 (0.20) 0.015 (0.38) 7° NOTE : All dimensions in inches (mm.) Angles are in degrees Figure 12: 24-pin CERDIP Mechanical Outline: Order as part no. MX809J E B C Package Tolerances K Y DA W J W T PIN 1 H P G DIM. A B C D E F G H J K P T W Y MIN. TYP. MAX. 0.409 (10.40) 0.380 (9.61) 0.409 (10.40) 0.380 (9.61) 0.146 (3.70) 0.128 (3.25) 0.435 (11.05) 0.417 (10.60) 0.435 (11.05) 0.417 (10.60) 0.250 (6.35) 0.250 (6.35) 0.023 (0.58) 0.018 (0.45) 0.022 (0.55) 0.047 (1.19) 0.048 (1.22) 0.051 (1.30) 0.049 (1.24) 0.009 (0.22) 0.006 (0.152) 30° 45° 6° NOTE : All dimensions in inches (mm.) Angles are in degrees F Figure 13: 24-pin PLCC Mechanical Outline: Order as part no. MX809LH 1998 MX-COM, Inc. www.mxcom.com Tel: 800 638 5577 336 744 5050 Fax: 336 744 5054 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA Doc. # 20480036.004 All trademarks and service marks are held by their respective companies. CML Microcircuits COMMUNICATION SEMICONDUCTORS CML Product Data In the process of creating a more global image, the three standard product semiconductor companies of CML Microsystems Plc (Consumer Microcircuits Limited (UK), MX-COM, Inc (USA) and CML Microcircuits (Singapore) Pte Ltd) have undergone name changes and, whilst maintaining their separate new names (CML Microcircuits (UK) Ltd, CML Microcircuits (USA) Inc and CML Microcircuits (Singapore) Pte Ltd), now operate under the single title CML Microcircuits. These companies are all 100% owned operating companies of the CML Microsystems Plc Group and these changes are purely changes of name and do not change any underlying legal entities and hence will have no effect on any agreements or contacts currently in force. CML Microcircuits Product Prefix Codes Until the latter part of 1996, the differentiator between products manufactured and sold from MXCOM, Inc. and Consumer Microcircuits Limited were denoted by the prefixes MX and FX respectively. These products use the same silicon etc. and today still carry the same prefixes. In the latter part of 1996, both companies adopted the common prefix: CMX. This notification is relevant product information to which it is attached. CML Microcircuits (USA) [formerly MX-COM, Inc.] Product Textual Marking On CML Microcircuits (USA) products, the ‘MX-COM’ textual logo is being replaced by a ‘CML’ textual logo. Company contact information is as below: CML Microcircuits (UK)Ltd CML Microcircuits (USA) Inc. CML Microcircuits (Singapore)PteLtd COMMUNICATION SEMICONDUCTORS COMMUNICATION SEMICONDUCTORS COMMUNICATION SEMICONDUCTORS Oval Park, Langford, Maldon, Essex, CM9 6WG, England Tel: +44 (0)1621 875500 Fax: +44 (0)1621 875600 [email protected] www.cmlmicro.com 4800 Bethania Station Road, Winston-Salem, NC 27105, USA Tel: +1 336 744 5050, 0800 638 5577 Fax: +1 336 744 5054 [email protected] www.cmlmicro.com No 2 Kallang Pudding Road, 09-05/ 06 Mactech Industrial Building, Singapore 349307 Tel: +65 7450426 Fax: +65 7452917 [email protected] www.cmlmicro.com D/CML (D)/2 May 2002