BR93L56-W/F-W/RF-W/FJ-W/RFJ-W/FV-W /RFV-W/RFVM-W BR93L66-W/F-W/RF-W/FJ-W/RFJ-W/FV-W /RFV-W/RFVM-W Features Pin Configurations BR93L56-W BR93L66-W • 2k bit serial EEPROM organized as 128 × 16bit (BR93L56) 4k bit serial EEPROM organized as 256 × 16bit (BR93L66) • Low voltage operation Read : 1.8~5.5V Write : 1.8~5.5V • Low current consumption Active : 1.5mA MAX (Vcc=1.8~2.5V) 3mA MAX (Vcc=2.5~5.5V) Standby : 2µA MAX • Clock frequency : 500kHz MAX (Vcc=1.8~2.5V) 2MHz MAX (Vcc=2.5~5.5V) BR93L56F-W/ FJ-W/FV-W BR93L66F-W/ FJ-W/FV-W CS 1 8 Vcc NC 1 8 NC SK 2 7 NC Vcc 2 7 GND DI 3 6 NC CS 3 6 DO 5 GND SK 4 5 DI DO 4 DIP8 SOP8/SOP-J8/SSOP-B8 BR93L56RF-W/RFJ-W/ RFV-W/RFVM-W BR93L66RF-W/RFJ-W/ RFV-W/RFVM-W • Write cycle time : 5ms MAX CS 1 8 Vcc SK 2 7 NC • Address auto-increment function during read operation DI 3 6 NC • Automatic erase-before-write function during write operation DO 4 5 GND • Inadvertent write protection function SOP8/SOP-J8/SSOP-B8/MSOP8 Defaults to power up with write-disabled state Pin Functions Software instructions for write-enable/disable Inadvertent write protection at low voltage (Vcc Lock-out function) Functions Pin Names • READY/BUSY Status indicator function (DO pin) Chip Select CS • Schmitt trigger circuit & noise filter are built into SK, DI pin. SK Serial Data Clock • TTL compatible input/output DI Serial Data Input • 1,000,000 write cycle typical DO • 40 years data retention • Operating temperature range : -40~85˚C Serial Data Output GND Ground Vcc Power Supply Block Diagram CS Voltage Detection Instruction Decode Control Clock Generation Write Disable SK DI DO Instruction Register Address 7bit: BR93L56 Buffer 8bit: BR93L66 Data Register 13 16bit High Voltage Generation Address 7bit: BR93L56 Decoder 8bit: BR93L66 R/W Amps 16bit 2~4k bit EEPROM Array 1.8V L opeow vo ratin ltag e g 1 Wri,000,00 te c 0 ycle Serial 3 Wire Interface Timing chart Read cycle 1 SK 2 4 11 12 27 28 CS *1 1 DI DO 1 0 A7 A6 A5 A1 A0 0 Hi-Z D15 D14 D1 D0 D15 D14 Read Data (n) Read Data (n+1) Write cycle SK 1 2 4 11 12 27 STATUS CS *1 1 DI DO 0 1 A7 A6 A5 A1 A0 D15 D14 D1 D0 BUSY READY Hi-Z tE/w Write all registers cycle 1 SK 2 5 12 27 STATUS CS 1 DI DO 0 0 0 1 D15 D14 D1 D0 BUSY READY Hi-Z tE/w Write enable / disable cycle SK CS ENABLE = 1 1 DISABLE = 0 0 1 DI DO 0 0 Hi-Z *1: A7=0 (BR93L56) Note : BR93LC56/F/RF/FJ/RFJ/FV, BR93LC66/F/RF/FJ/RFJ/FV are single-cell types. Please be careful not to confuse w-cell type and single-cell type. ("-W" means double-cell type.) 14