INTERSIL CA3228

CT
T
ODU CEMEN 7
R
P
E
A
74
T
L
OLE
REP 00-442-7
OBS ENDED
8
M
ns 1
.com
COM pplicatio @harris
E
R
NO ntral A entapp
Ce
: c
Speed
Call or email
June 1999
CA3228
Control System with Memory
Features
Description
• Low Power Dissipation
The CA3228 is a monolithic integrated circuit designed as an
automotive speed-control system.
2
• I L Control Logic
The system monitors vehicle speed and compares it to a
stored reference speed. Any deviation in vehicle speed
causes a servo mechanism to open or close the engine
throttle as required to eliminate the speed error. The reference speed, set by the driver, is stored in a 9-bit counter.
• Power-On Reset
• On-Chip Oscillator for System Time Reference
• Single Input Line for Operator Commands
• Amplitude Encoded Control Signals
The reference speed can be altered by the ACCEL and
COAST driver commands. The ACCEL command causes
the vehicle to accelerate at a controlled rate; the COAST
command disables the servo, thereby forcing the vehicle to
slowdown. Application of the brake disables the servo and
places the system in the standby mode while the RESUME
command returns the vehicle to the last stored speed.
• Transient Compensated Input Commands
• Controlled Acceleration Mode
• Internal Redundant Brake and Low-Speed Disable
• Braking Disable
Applications
• Automotive Speed Control
• Residential and Industrial Heating and Cooling
Controls
• Industrial AC and DC Motor Speed Control
Vehicle speed and driver commands are inputs to the
integrated circuit via external sensors. Actuators are needed
to convert the output signals into the mechanical action
necessary to control vehicle speed.
The CA3228 is supplied in a 24 lead dual-in-line plastic
package (E suffix). Refer to AN7326 for application
information.
• Applications Requiring Acceleration and Deceleration
Control
Ordering Information
Pinout
CA3228 (PDIP)
TOP VIEW
GND
1
24 GND
NC
2
23 OUTPUT GATE
DRIVER COMMAND
3
22 VACUUM CONTROL
COMMAND DELAY
4
21 VENT CONTROL
OSCILLATOR
5
20 CONTROL AMP+
V MEMORY
6
19 CONTROL AMP OUTPUT
CURRENT SENSE SPEED
7
18 CONTROL AMP-
SENSOR INPUT
8
17 ALIGN
F/V OUT
9
16 V ERROR
F/V FILTER 10
VS
11
BRAKE INPUT 12
PART
NUMBER
TEMPERATURE
PACKAGE
CA3228E
-40oC to +85oC
24 Lead Plastic DIP
15 ACCELERATE CAPACITOR
14 ACCELERATE RESISTOR
13 VCC
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.
Copyright
© Harris Corporation 1999
10-31
File Number
1436.3
Specifications CA3228
Absolute Maximum Ratings
Thermal Information
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +9.0V
Supply Current, ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Driver Command Input (ICMD), Pin 3 . . . . . . . . . . . . . . . . . . . . 2mA
Brake Input (IBRAKE), Pin 12 . . . . . . . . . . . . . . . . . . . . . . . . . . . 2mA
Storage Temperature Range . . . . . . . . . . . . . . . . -65oC to +150oC
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . +150oC
Thermal Resistance
θJA
Plastic DIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65oC/W
Power Dissipation Per Package
For TA = -40oC to +70oC . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2mW
For TA Above +70oC . . . . . . . . . . . Derate Linearly at 15.4mW/oC
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . +265oC
Operating Temperature Range . . . . . . . . . . . . . . . . -40oC to +85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Typical Switching Characteristics
Driver Command Input Hold Times (Based on 0.68µF on Pin 4):
ACCEL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ms
COAST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ms
RESUME. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330ms
ON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ms
OFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50ms
Internal Oscillator Frequency, FOSC . . . . . . . . . . . . . . . . . . . 10kHz
(Based on 0.001µF at Pin 5)
System Performance FOSC = 50kHz, fS/Speed Ratio = 2.22Hz/mph
Speed Sensor Input Frequency Range, fS at Pin 8 . .62Hz to 222Hz
Speed Resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.45 mph
Minimum Operating Speed. . . . . . . . . . . . . . . . . . . . . . . . . . 25 mph
Electrical Specifications
Maximum Stored Speed . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mph
Redundant Brake Speed . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 mph
TA = +25oC, VCC = 8.20V, Unless Otherwise Specified (Refer to Figures 2 and 3)
PARAMETERS
Operating Voltage
SYMBOLS
TEST PIN
VCC
13
Speed Sensor Input Voltage Amplitude
T.P.B.
TEST CONDITIONS
62Hz ≤ fS ≤ 222Hz
MIN
MAX
UNITS
7.40
9.00
V
3.50
15.0
Vpp
7.50
30.0
mA
VCC Supply Current
ICC
13
Current Sense Voltage
V7
7
43kΩ to Ground
4.85
5.95
V
Align Voltage
V17
17
41kΩ to Ground
4.00
4.20
V
Command Idle Voltage
V3IDLE
3
S1, S2, S3, S4, S5
Open
7.6
7.9
V
RESUME Command Voltage
V3RES
3
S2 Closed
5.95
6.56
V
ACCEL Command Voltage
V3ACCEL
3
S3 Closed
3.95
4.91
V
COAST Command Voltage
V3COAST
3
S4 Closed
1.22
2.23
V
OFF Voltage
V3OFF
3
S5 Closed
0
0.77
V
ON Voltage
V3ON
T.P.A.
S1 Closed
9.2
28
V
VBRAKE
12
S6 Closed
5.4
28
V
VOL
23
4.7kΩ to VCC
-
300
mV
8
-
V
-
400
mV
8
-
V
-
400
mV
8
-
V
Brake Input Voltage
OUTPUT VOTLAGE
Gate
VOH
VAC
VOL
22
1.2kΩ to VCC
VOH
VENT
VOL
21
VOH
10-32
1.2kΩ to VCC
Specifications CA3228
Electrical Specifications
TA = +25oC, VCC = 8.20V, Unless Otherwise Specified (Refer to Figures 2 and 3) (Continued)
PARAMETERS
SYMBOLS
TEST PIN
V6 - V10
6, 10
VDB
21, 22
ACNTL
16, 19
VM
6
Memory Set Error
Deadband Range (VAC and VENT Outputs
Off)
Control Amplifier Gain
D/A Voltage Range
TEST CONDITIONS
MIN
MAX
UNITS
-77
67
mV
0.96
1.43
V
ACNTL = V19/V16
74
-
Ratio
Set Mode
6
7.50
V
Sweep Pin 19,
Voltage at 1V/sec
Functional Block Diagram
1 GROUND 24
VCC
VCC
3
RESUME
DRIVER COMMAND
COMMAND DELAY
OSCILLATOR
3
4
COMMAND
DECODER
AND
DELAY
ACCEL
I2 L
CONTROL
LOGIC
COAST
ON
OFF TOGL
GATE
OUTPUT
23 GATE
VENT
21 VENT
CONTROL
VAC
VACUUM
22 CONTROL
OSC.
5
19
RESUME
DETECTOR
OVER SPEED
DETECTOR
+
20 CONTROL AMP. (+)
CONTROL AMP.
BRAKE
SENSOR
BRAKE INPUT 12
CONTROL AMP.
OUTPUT
18 CONTROL AMP. (-)
_
ERROR AMP.
SPEED
SENSOR INPUT
F/V OUT
VS
8
9
F/V
CONVERTER
REDUNDANT
BRAKE
MINIMUM
SPEED
SENSOR
16
0.45V
14 ACCELERATE
RESISTOR
ACCEL.
RATE AMP
F/V FILTER 10
VS 11
V MEMORY
6
ANALOG TO
DIGITAL TO
ANALOG
CONVERTER
VS
VM
“C”
“B” MODE
SW
“D”
“A”
7
15 ACCELERATE
CAPACITOR
VM
ALIGN
CURRENT
SENSE
V ERROR
“E”
CURRENT
SENSE
10-33
17 ALIGN
CA3228
START
NO
ERASE
MEMORY
YES
NO
NO
YES
YES
NO
OFF
> 40 ms?
BRAKE?
ON
> 40 ms?
IGNITION
OFF?
STANDBY
NO
NO
NO
ACCEL?
COAST?
YES
RESUME?
YES
YES
NO
> 25MPH?
ACCEL
> 4 ms?
> 25MPH?
YES
YES
YES
INPUT
> 40ms?
NO
COAST
> 40ms?
INPUT
> 40ms?
NO
YES
YES
NO
ACCEL AT
CONTROLLED
RATE
RELAX
SERVO
> 2 MPH?
YES
> 25MPH?
RELAX
SERVO
YES
> 25MPH
STORED?
STILL
COAST?
YES
NO
NO
YES
STILL
ACCEL?
2
INPUT
> 245ms?
NO
ENABLE
SERVO
NO
YES
ENABLE
SERVO
STORE
PRESENT
SPEED
DISABLE
RESUME MODE
YES
SPEED
= STORE?
NO
NO
SPEED
< STORE?
CRUISE
YES
YES
ACCEL AT
CONTROLLED
RATE
RELAX
SERVO
COAST
>40ms?
NO
1
ACCEL
> 40ms?
YES
DISABLE
RESUME MODE
YES
ACCEL
> 40ms?
NO
NO
NO
YES
YES
IGNITION
OFF?
1
> 25MPH?
DISABLE
RESUME MODE
YES
COAST
> 40ms?
2
NO
YES
NO
DISABLE
RESUME MODE
Redundant
BRAKE?
YES
BRAKE?
NO
NO
NO
YES
YES
YES
OFF
> 40ms?
BRAKE
NO
NO
CLUTCH
DISABLE?
YES
10-34
CLUTCH
DISABLE?
NO
CA3228
VCC
V3ON
T.P.A.
R3, 2.2K
R2
10K
S2
RESUME
10K
0.68µF
S1
ON
0.1µF
RI
560
R4,680
S3
6
10
15
11
14
2.2µF
12
13
10K
51K
BRAKE LIGHT
BRAKE SWITCH
S6
ALL RESISTANCE VALUES ARE IN OHMS
SEE FIGURE 3
VAC
VENT
VCC
19
16
SPEED INPUT
FREQUENCY, fS
2.22 Hz/MPH
GATE
20
17
150K
S
21
9
OFF
T.P.B.
22
4
8
43K
0.047µF
0.05µF
N
3
18
S4
S5
23
7
8.2K
R5, 120
COAST
24
2
5
0.001µF
SET/ACCEL
1
CA3228E
MOMENTARY
CONTACT
DRIVER
COMMAND
SWITCHES
VBRAKE
1M
10K
10K
CEXT
2.2µF
10K
2.4M
+
REXT
VCC
SWITCH
FUNCTION
VOLTAGE AT TERM. 3
RATIO TO VCC
MIN
MAX
S1 - ON
1.12
-
S2 - RESUME
0.725
0.8
S3 - ACCEL
0.482
0.599
S4 - COAST
0.148
0.272
0
0.094
0.93
0.96
S5 - OFF
IDLE (Note 1)
NOTE: 1. All Switches Open
FIGURE 2. TYPICAL AUTOMOTIVE SPEED CONTROL APPLICATION
0.22µF
+8.2V
1.2K
VOLT.
REG
+14.4V
1.2K
VCC VAC
VENT
SOLENOID
VENT
VACUUM
SOLENOID
CA3228E
(SEE FIGURE 2)
TO
620
0.5W
4.7K
GATE
TO VACUUM
AIR
SOURCE
N.O.
N.C.
VENT
VALVE
VAC
VALVE
DIAPHRAGM
SYSTEM MODE
VALVE
POSITON
FEED BACK
(OPTIONAL
TO PIN 20)
ACCEL
CRUISE
VAC
Open
NC (Note 1)
COAST
NC
VENT
Close
Close (Note 1)
NC
NOTE:
1. Open or Closed as Required to Maintain Set Speed Error
TO THROTTLE
ACCEL
CRUISE
COAST
BRAKE
REDUNDANT BRAKE
HI-SPEED DROPOUT
LO-SPEED DROPOUT
VAC (Pin 22)
H
L
L
L
L
L
L
VENT (Pin 21)
H
H
L
L
L
L
L
GATE (pin 23)
L
L
L
H
H
H
H
FIGURE 3. SOLENOID DRIVERS AND SERVO VACUUM CONTROL MECHANISM TYPICAL APPLICATION
10-35
CA3228
Device Description and Operation
FREQUENCY
Command Decoder and Delay Logics (Pins 3,4)
Driver commands are input to pin 3 through the Driver
Command Line. These signals are encoded on a single line
as voltage levels selected by switches which adjust a resistor
divider network.
The voltage level established is compared to a reference
level which decodes the command. A command level greater
than VCC + 0.8V turns the system On, enabling dynamic
control. Once the system is enabled, a voltage level of
0.88VCC, 0.66VCC, and 0.38VCC decodes the RESUME,
ACCEL, and COAST command, respectively. A driver
command of 0.12VCC or less turns the system Off.
The Driver Command Delay established by the current
sources and a capacitor at pin 4 assures that ON, OFF,
ACCEL, and COAST commands are considered valid only if
longer than 50ms. The time for RESUME is 330ms.
Memory Voltage, VM (Pin 6)
Upon release of the ACCEL or COAST switches the voltage,
representing vehicle speed VS determined by the output
from the frequency-to-voltage converter, is stored as a
binary number in a 9 bit counter. A memory update comparator allows clocking of the counter until memory voltage VM
equals VS. The output of the counter controls a ladder
network which provides memory voltage VM at pin 6.
Analog Accelerate and Resume Generator (Pins 14,15)
Numerous functions are combined in what is called the
Analog Accelerate and Resume Generator. The circuit
switches the signal output at pin 15 depending on the mode
of operation. In the Accelerate and Resume mode the
capacitor at pin 15 is charged at a fixed rate [450mV/(REXT)
(CEXT)]. In the Cruise mode pin 15 follows the memory
voltage (VM) and in the On, Off, Brake, Redundant Brake,
Minimum Speed Lockout, and Coast modes, pin 15 follows
the voltage representing vehicle speed (VS).
MEMORY VOLTAGE, VM (V)
The functional block diagram and Figures 1, 2 show the
speed- control flow chart, and a typical automotive speedcontrol application, respectively.
Control Logic
The Control Logic accepts signals from the command
decoder and other sensors. It causes the memory to be
updated when operating in ACCEL and COAST modes. It
will put the system in Standby mode if brakes are applied, if
the speed error exceeds 11mph, or if the vehicle speed
drops below the minimum Speed Lockout (25mph). It will
return the vehicle to the previous set memory speed when a
RESUME command is given.
6
+25oC
5
+85oC
4
3
2
1
0
Frequency to Voltage Converter (Pins 8-11)
The speed sensor input fS at pin 8 is an AC signal whose
frequency is directly proportional to the vehicle speed at
approximately 2.22Hz/mph The current sources, capacitor
and comparators at pin 9 cause equal rise and fall times to
occur at pin 9 on the positive- and negative-going slopes of
the sensor input. Pulse currents of time duration equal to the
rise and fall times are used to charge the parallel resistor
capacitor combination at pin 10 to give a voltage (VS) at pin
10 proportional to frequency at approximately 27mV/Hz. The
fS frequency range may be altered by changing the values of
the filter capacitors at pins 8 and 9. However, the maximumto-minimum frequency ratio will remain fixed.
-40oC
-40oC
0
50
100
150
FREQUENCY, fS (Hz)
200
250
FIGURE 5. TYPICAL CHARACTERISTIC F/V CONVERTER
OUTPUT, VS vs FREQUENCY
Error Amplifier (Pin 16)
In the Cruise mode the Error Amplifier determines the
difference between the set memory speed (VM) and the
actual speed (VS). This error signal is fed to the control
amplifier where it defines whether VAC or VENT is required.
The error signal represents deviation in vehicle speed from
the memory or set speed condition. The Error signal is also
used to control the Redundant Brake feature.
MEMORY VOLTAGE, VM (V)
Redundant Brake Comparator
-40oC
6
When the error output drops below approximately 0.42VCC,
the Redundant Brake output is activated. Redundant Brake
causes the chip to go into the Standby mode.
+25oC
5
+85oC
4
3
2
1
0
0
50
100
150
200
FREQUENCY, fS (Hz)
FIGURE 4. TYPICAL D/A MEMORY VOLTAGE, VM vs
Control Amplifier (Pins 18, 20)
The Control Amplifier is an op amp using external
components to set the gain. Inputs to the Control Amplifier
are from the Error Amplifier output, servo position sensor
and align output. The output of the Control Amplifier controls
the VAC and VENT outputs.
VAC, VENT and Gate-Driver Outputs (Pins 21, 22, 23)
The VAC, VENT and Gate Outputs are open collector
devices used to control the throttle position. For the system
10-36
CA3228
to be able to supply vacuum, the gate output must be low. If
the output from the Control Amplifier exceeds 0.573VCC,
vacuum is supplied to the servo unit. If the output of the
Control Amplifier is between 0.573VCC and 0.427VCC the
vacuum is held in the servo unit and vehicle speed is
maintained. If the output from the Control Amplifier drops
below 0.427VCC or if the gate output is high, the servo unit
vacuum is vented.
Overspeed Detector Comparator
The Overspeed Detector circuit is used when the following
sequence of events occur: A speed is set in memory, the
vehicle is manually accelerated (foot pedal) to a higher
speed and then the ACCEL switch is activated.
During vehicle acceleration VS voltage is greater than the VM
voltage into the memory update comparator. When the
ACCEL command is given, the capacitor at pin 15 rapidly
charges to within 60mV of VS before switching the comparator output low and starting the fixed acceleration rate from
the present vehicle speed. The 60mV of offset is required to
insure that the output of the overspeed detector is low under
normal operating conditions. Hysteresis is also designed into
the comparator to eliminate noise problems which may
prevent the chip from going into the Acceleration mode.
End of Resume Comparator
The Resume Comparator is used when the following
sequence of events occurs: A speed is set in memory, the
brake applied, causing the vehicle to go to a lower speed,
and the RESUME switch is activated.
Activation of the RESUME switch causes a fixed acceleration rate from the lower speed until the capacitor voltage at
pin 15 is equal to the VM voltage. A filter circuit contained in
the output of the resume comparator insures that noise
doesn’t reset the comparator until VPIN actually equals VM.
Align Voltage Source (Pin 17)
The Align Voltage Source is a X1 buffer with an output of
0.5VCC.
Brake Input Comparator (Pin 12)
When the Brake Input exceeds 0.55VCC, the chip will go into
the Standby mode from Cruise.
Minimum Speed Lockout
Assures that the system remains in a Standby mode if
vehicle speed VS is below 0.183VCC. It causes the system to
revert to the Standby mode if VS drops below 0.183VCC in
the Cruise mode.
Digital Filter for Redundant Brake and Minimum Speed
Lockout
A 4 bit shift register with an all ‘1’s output decode is used to
filter transients and electromagnetic interference. The filter
prevents false signals from putting the system into Standby
from Cruise.
Ramp Oscillator (Pin 5)
The Ramp Oscillator at pin 5 nominally varies between
amplitudes of 4.1V and 6.1V. The discharge rate is
approximately 4X the charge rate. With a capacitor of
0.001µF on pin 5, the nominal oscillator frequency is 50kHz.
10-37
CA3228
DVR
CMD
Q38
Q38 +-
VCC
A
RESUME
ON/OFF
147
I17
13
ON ACTIVE HIGH
Q4
12
16
V’S
Q188
V
CC
2
Q8 +
V
BE
-
Q284
79
15
RESUME
Q36
Q35 +
I17
0.879
VCC
62
Q185 +
ACT HI
0.183
VCC
MIN SP
LOCKOUT
Q1
---------- +
MSLT
I113
-
ER
18
0.43
VCC
10
ACT
Q203 LO
-
Q207 +
ACT
HI
REDUNDANT
BRAKE
ENABLE
Q26
Q32 +
I25
0.661
VCC ACCEL
Q31 COAST
Q30 +
I23
0.376
VCC
ENABLE
5
9
66
67 C
QSC
63 (5)
69
I135
I136
I58
4 BIT SR
D
92
11
COMMAND
DELAY
TIME GEN.
I146
ALL
1’S
DECODE
8
4
Q8
CMD 4
DELAY
Q26
Q27 +
I21
0.121
OFF
VCC
B
80
I42
I35
I50
I51
3
V
CC
-------2
-
Q7 +
I3
ACCEL
2
E
65
COAST
1
F
89
ON/OFF
G
90
BRK
INPUT 12
0.55 VCC
Q141
Q136
+
-
91
ACT
HI
81
I142
FIGURE 6. FUNCTIONAL BLOCK DIAGRAM FOR SPEED CONTROL (Continued On Next Page)
10-38
H
10-39
FIGURE 6. FUNCTIONAL BLOCK DIAGRAM FOR SPEED CONTROL (Continued)
SENSOR
INPUT
H
G
E
F
D
C
B
A
8
I128
AMPL
AND
LIMITER
Q98
97
103
93
94
68
AC + MSLT
OSC
(4)
84
I125
2I
F/V
96
101
102
95
Q
D Q
OSC
(3)
117
118
123
122
119
OSC
(2)
120
9
98
Q225
Q228
Q105
0.012 Q110
VCC
Q125
0.482 Q114
VCC
Q113
I
+
Q156
Q166
0.427 Q167
VCC
+
VCC
0.573 Q168
VCC
Q171
Q161
RESUME
COMP
Q216
+
-
-
COMP
“A”
Q232
85
21
I/2
Q242
Q212
10
Q117
Q118
Q112
+
15
BUF
+
60MV
-
Q122
11 VS
Q270
Q258
Q271
-
450MV
113
VS S
2
CC
---------
V
+
16
V
ERROR
Q200
ER
+
X1
ACTIVE ACCEL CLAMP
Q196
ERROR
AMP
Q201
112
111
72
BUFFER AND
LEVEL SHIFT
Q269
AC + MSLT
71
OSC
(3)
Q276
ACCEL
14 RESISTOR
70
VBE
VCC /2
+
I141
ACTIVE LOW
MEM
UPDATE
+
-
BUFFER
AND LEVEL
SHIFT
Q277
V’S
BUF
Q279
Q278
Q268
110
XI
20 CONTROL
AMP (+)
Q277
Q119
15
+
ACCEL
CAP.
“D”
Q251
Q257
109
CONTROL
18 AMP (-)
Q121
X1
Q178
+
87
88
CONTROL
AMP
Q177
+
19 CONTROL
AMP
OUTPUT
Q179
I138
+
OVER
SPEED DET.
Q213
ACTIVE HIGH
Q276
75, 76, 77
108
OPEN DURING
ACC, RES RAMP
+
XI
104
ON/OFF
VM
107
F/V FILTER
Q111
ACT LO
23
ACT LO
GATE
86
AC + MSLT
106
105
ACT HI
VENT
22
VAC
Q231“B”
COMP AND
CLAMP
+
+
Q157
+
-
+
ACTIVE LOW
+ TO B IN ON, OFF,
BRAKE, COAST
VSS
A/D
Q174
100
OPEN POSITION
DURING SET
ACCEL AND
RESUME
99
+ TO A IN CRUISE ACTIVE LOW
OSC
(3)
I145
I121
Q174
BUF
17 ALIGN
115
114
1
7
6
24 GND
CURRENT
SENSE
13 VCC
A/D
Q9
D/A
CLOCK
OSC
OSC
D/A
CLOCK
9 BIT D/A
73
DC
BIAS
VM
Q1
5
OSC
D/A
CLEAR
OSC
(1)
A/D
CA3228