CY62256V 256K (32K x 8) Static RAM Functional Description[1] Features • Temperature Ranges — Commercial: 0°C to 70°C The CY62256V family is composed of two high-performance CMOS static RAM’s organized as 32K words by 8 bits. Easy memory expansion is provided by an active LOW chip enable (CE) and active LOW output enable (OE) and three-state drivers. These devices have an automatic power-down feature, reducing the power consumption by over 99% when deselected. — Industrial: –40°C to 85°C — Automotive: –40°C to 125°C • Speed: 70 ns and 100 ns • Low voltage range: — CY62256V (2.7V–3.6V) • • • • • • — CY62256V25 (2.3V–2.7V) Low active power and standby power Easy memory expansion with CE and OE features TTL-compatible inputs and outputs Automatic power-down when deselected CMOS for optimum speed/power Package available in a standard 450-mil-wide (300-mil body width) 28-lead narrow SOIC, 28-lead TSOP-1, and reverse 28-lead TSOP-1 package An active LOW write enable signal (WE) controls the writing/reading operation of the memory. When CE and WE inputs are both LOW, data on the eight data input/output pins (I/O0 through I/O7) is written into the memory location addressed by the address present on the address pins (A0 through A14). Reading the device is accomplished by selecting the device and enabling the outputs, CE and OE active LOW, while WE remains inactive or HIGH. Under these conditions, the contents of the location addressed by the information on address pins are present on the eight data input/output pins. The input/output pins remain in a high-impedance state unless the chip is selected, outputs are enabled, and write enable (WE) is HIGH. Logic Block Diagram I/O0 INPUTBUFFER I/O1 512 × 512 ARRAY I/O2 SENSE AMPS ROW DECODER A10 A9 A8 A7 A6 A5 A4 A3 A2 I/O3 I/O4 I/O5 CE WE COLUMN DECODER I/O6 POWER DOWN I/O7 A12 A11 A1 A0 A13 A14 OE Note: 1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05057 Rev. *D • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised June 28, 2004 CY62256V Product Portfolio Power Dissipation Operating, ICC (mA) Standby, ISB2 (µA) Range Min. VCC Range (V) Typ.[2] Max. (ns) Typ.[2] Max. Typ.[2] CY62256VLL Com’l / Ind’l 2.7 3.0 3.6 70 11 30 0.1 5 CY62256VLL Automotive 2.7 3.0 3.6 70 11 30 0.1 130 CY62256V25LL Com’l 2.3 2.5 2.7 100 9 15 0.1 4 Product Speed Max. Pin Configurations Narrow SOIC Top View A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 I/O0 I/O1 I/O2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC WE A4 A3 A2 A1 OE A0 CE I/O7 I/O6 I/O5 I/O4 I/O3 A11 A10 A9 A8 A7 A6 A5 VCC WE A4 A3 A2 A1 OE 7 6 8 9 5 4 3 2 10 11 12 13 14 15 16 17 18 1 28 27 26 25 24 23 22 TSOP I Reverse Pinout Top View (not to scale) 19 20 21 A12 A13 A14 I/O0 I/O1 I/O2 GND I/O3 I/O4 I/O5 I/O6 I/O7 CE A0 OE A1 A2 A3 A4 WE VCC A5 A6 A7 A8 A9 A10 A11 21 22 23 24 25 26 27 28 1 2 3 4 5 6 7 TSOP I Top View (not to scale) 20 19 18 17 16 15 14 13 12 11 10 9 8 A0 CE I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A14 A13 A12 Pin Definitions Pin Number Type Description 1-10, 21, 23-26 Input A0-A14. Address Inputs 11-13, 15-19 Input/Output I/O0-I/O7. Data lines. Used as input or output lines depending on operation 27 Input/Control WE. When selected LOW, a WRITE is conducted. When selected HIGH, a READ is conducted 20 Input/Control CE. When LOW, selects the chip. When HIGH, deselects the chip 22 Input/Control OE. Output Enable. Controls the direction of the I/O pins. When LOW, the I/O pins behave as outputs. When deasserted HIGH, I/O pins are three-stated, and act as input data pins 14 Ground GND. Ground for the device 28 Power Supply Vcc. Power supply for the device Notes: 2. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC Typ., TA = 25°C, and tAA = 70 ns. Document #: 38-05057 Rev. *D Page 2 of 13 CY62256V Maximum Ratings Static Discharge Voltage.......................................... > 2001V (per MIL-STD-883, Method 3015) (Above which the useful life may be impaired. For user guidelines, not tested.) Latch-up Current.................................................... > 200 mA Operating Range Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied............................................. –55°C to +125°C Range Ambient Temperature (TA) [4] Commercial 0°C to +70°C Device Supply Voltage to Ground Potential (Pin 28 to Pin 14) ........................................... –0.5V to +4.6V CY62256V DC Voltage Applied to Outputs in High-Z State[3] ....................................–0.5V to VCC + 0.5V DC Input Voltage[3] .................................–0.5V to VCC + 0.5V Output Current into Outputs (LOW) .............................20 mA CY62256V25 Industrial −40°C to +85°C Automotive −40°C to +125°C Commercial 0°C to +70°C VCC 2.7V to 3.6V 2.3V to 2.7V Electrical Characteristics Over the Operating Range CY62256V-70 Parameter Description Test Conditions Min. Typ.[2] Max. Unit VOH Output HIGH Voltage IOH = −1.0 mA VCC = 2.7V VOL Output LOW Voltage IOL = 2.1 mA VCC = 2.7V 0.4 V VIH Input HIGH Voltage 2.2 VCC +0.3V V VIL Input Leakage Voltage –0.5 0.8 V IIX Input Leakage Current IOZ Output Leakage Current GND < VIN < VCC 2.4 V Com’l, Ind’l –1 +1 µA Automotive -10 +10 µA GND < VIN < VCC, Output Disabled Com’l, Ind’l –1 +1 µA Automotive -10 +10 µA ICC VCC Operating Supply Current VCC = 3.6V, IOUT = 0 mA, f = fMAX = 1/tRC All ranges 11 30 mA ISB1 Automatic CE Power-down Current— TTL Inputs VCC = 3.6V, CE > VIH, VIN > VIH or VIN < VIL, f = fMAX All ranges 100 300 µA ISB2 Automatic CE Power-down Current— CMOS Inputs VCC = 3.6V, CE > VCC – 0.3V Com’l VIN > VCC – 0.3V or VIN < 0.3V, f = 0 Ind’l 0.1 5 10 Automotive 130 Electrical Characteristics Over the Operating Range CY62256V25-100 Parameter Description Test Conditions Min. VOH Output HIGH Voltage IOH = −0.1 mA Vcc=2.3V IOL = 0.1 mA Vcc= 2.3V Typ.[2] Max. 2 Unit V VOL Output LOW Voltage 0.4 V VIH Input HIGH Voltage 1.7 Vcc + 0.3V V VIL Input LOW Voltage –0.3 0.7 V IIX Input Leakage Current GND < VIN < VCC –1 +1 µA IOZ Output Leakage Current GND < VIN < VCC, Output Disabled –1 +1 µA Notes: 3. VIL (min.) = –2.0V for pulse durations of less than 20 ns. 4. TA is the “Instant-On” case temperature Document #: 38-05057 Rev. *D Page 3 of 13 CY62256V Electrical Characteristics Over the Operating Range (continued) CY62256V25-100 Parameter Description Test Conditions Min. Typ.[2] Max. Unit ICC VCC Operating Supply Current VCC = 2.7V, IOUT = 0 mA, f = fMAX = 1/tRC Com’l, Ind’l 9 15 mA ISB1 Automatic CE Power-down Current— TTL Inputs VCC = 2.7V, CE > VIH, VIN > VIH or VIN < VIL, f = fMAX Com’l, Ind’l 75 225 µA ISB2 Automatic CE Power-down Current — CMOS Inputs Com’l VCC = 2.7V, CE > VCC − 0.3V VIN > VCC – 0.3V or VIN < 0.3V, f = 0 Ind’l 0.1 4 8 Capacitance[5] Parameter Description CIN Input Capacitance COUT Output Capacitance Test Conditions Max. Unit 6 pF 8 pF TA = 25°C, f = 1 MHz, VCC = 3.0V AC Test Loads and Waveforms R1 VCC ALL INPUT PULSES OUTPUT VCC 50 pF INCLUDING JIG AND SCOPE R2 90% 10% GND < 5 ns < 5 ns Equivalent to: 90% 10% THÉVENIN EQUIVALENT OUTPUT Rth Vth Parameter 3.3V 2.5V Units R1 1100 16600 Ohms R2 1500 15400 Ohms RTH 645 8000 Ohms VTH 1.750 1.20 Volts Notes: 5. Tested initially and after any design or process changes that may affect these parameters. Document #: 38-05057 Rev. *D Page 4 of 13 CY62256V Data Retention Characteristics (Over the Operating Range) Parameter Conditions[6] Description VDR VCC for Data Retention ICCDR Data Retention Current Typ.[2] Min. Max. 1.4 VCC = 1.6V, CE > VCC – 0.3V, VIN > VCC – 0.3V or VIN < 0.3V V Com’l 0.1 Ind’l Chip Deselect to Data Retention Time tR[6] Operation Recovery Time µA 3 6 Auto tCDR[6] Unit 50 0 ns tRC ns Data Retention Waveform DATA RETENTION MODE 1.8V VCC VDR > 1.4V 1.8V tR tCDR CE Thermal Resistance Parameter Description Test Conditions SOIC TSOPI RTSOPI Unit ΘJA Thermal Resistance Still Air, soldered on a 3 × 4.5 inch, (Junction to Ambient)[6] four-layer printed circuit board 68.45 87.62 87.62 °C/W ΘJC Thermal Resistance (Junction to Case)[5] 26.94 23.73 23.73 °C/W Notes: 6. No input may exceed VCC + 0.3V. Document #: 38-05057 Rev. *D Page 5 of 13 CY62256V Switching Characteristics Over the Operating Range[7] CY62256V-70 Parameter Description Min. Max. CY62256V25-100 Min. Max. Unit Read Cycle tRC Read Cycle Time tAA Address to Data Valid tOHA Data Hold from Address Change tACE CE LOW to Data Valid 70 100 ns tDOE OE LOW to Data Valid 35 75 ns 50 ns 70 [8] tLZOE OE LOW to Low-Z tHZOE OE HIGH to High-Z[8, 9] tLZCE CE LOW to Low-Z[8] tHZCE CE HIGH to High-Z[8, 9] tPU CE LOW to Power-up tPD CE HIGH to Power-down 100 70 10 ns 100 10 5 ns 5 25 10 ns 10 25 0 ns 50 ns 100 ns 0 70 ns ns Write Cycle[10, 11] tWC Write Cycle Time 70 100 ns tSCE CE LOW to Write End 60 90 ns tAW Address Set-up to Write End 60 90 ns tHA Address Hold from Write End 0 0 ns tSA Address Set-up to Write Start 0 0 ns tPWE WE Pulse Width 50 80 ns tSD Data Set-up to Write End 30 60 ns tHD Data Hold from Write End 0 tHZWE WE LOW to High-Z[8, 9] tLZWE WE HIGH to Low-Z[8] 0 25 10 ns 50 10 ns ns Notes: 7. Test conditions assume signal transition time of 5 ns or less timing reference levels of VCC/2, input pulse levels of 0 to VCC, and output loading of the specified IOL/IOH and 100-pF load capacitance. 8. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 9. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in (b) of AC Test Loads. Transition is measured ± 200 mV from steady-state voltage. 10. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 11. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of tHZWE and tSD. Document #: 38-05057 Rev. *D Page 6 of 13 CY62256V Switching Waveforms Read Cycle No. 1[12, 13] tRC ADDRESS tOHA DATA OUT tAA PREVIOUS DATA VALID DATA VALID Read Cycle No. 2 [13, 14] t RC CE tACE OE DATA OUT t HZOE tHZCE tDOE t LZOE HIGH IMPEDANCE DATA VALID tLZCE VCC SUPPLY CURRENT HIGH IMPEDANCE t PD t PU ICC 50% 50% Write Cycle No. 1 (WE Controlled) ISB [10, 15, 16] tWC ADDRESS CE tAW tSA WE tHA t PWE OE tSD DATA I/O NOTE 17 tHD DATAINVALID t HZOE Notes: 12. Device is continuously selected. OE, CE = VIL. 13. WE is HIGH for read cycle. Document #: 38-05057 Rev. *D Page 7 of 13 CY62256V Switching Waveforms (continued) Write Cycle No. 2 (CE Controlled) [10, 15, 16] tWC ADDRESS tSCE CE tSA tAW tHA WE tSD DATA I/O t HD DATAINVALID Write Cycle No. 3 (WE Controlled, OE LOW)[11, 16] tWC ADDRESS CE tAW t HA tSA WE tSD DATA I/O NOTE 17 t HZWE t HD DATA INVALID tLZWE Notes: 14. Address valid prior to or coincident with CE transition LOW. 15. Data I/O is high impedance if OE = VIH. 16. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. 17. During this period, the I/Os are in output state and input signals should not be applied. Document #: 38-05057 Rev. *D Page 8 of 13 CY62256V Typical DC and AC Characteristics 0.4 0.5 0.2 0.0 25 1.6 AA 2.0 NORMALIZED t NORMALIZED t AA NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE 1.5 TA = 25°C 1.0 VCC = 2.5V 1.2 1.0 0.8 0.5 0.0 1.65 VCC = 3.0V 1.4 2.1 2.6 3.1 3.6 0.6 −55 25 125 OUTPUT SOURCE CURRENT (mA) 105 OUTPUT SINK CURRENT 14 vs. OUTPUT VOLTAGE 12 10 8 6 VCC = 2.5 V 4 TA = 25°C 2 0 0.0 1.0 2.0 3.0 OUTPUT VOLTAGE (V) AMBIENT TEMPERATURE (°C) SUPPLY VOLTAGE (V) 25 AMBIENT TEMPERATURE (°C) AMBIENT TEMPERATURE (°C) NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE ISB -0.5 −55 125 = 0.4 SUPPLY VOLTAGE (V) 2.5 1.0 cc 0.6 1.5 3. 3V VCC = 2.5V = 0.8 0.0 −55 3.6 3.2 2.8 2.4 2.0 1.8 1.6 0.2 2.0 cc TA= 25°C 0.6 1.0 V 0.8 2.5 V 1.0 1.2 ISB2 µA NORMALIZED I CC NORMALIZED ICC 1.2 3.0 VCC = 3.0V 2. 5V 1.4 1.6 1.4 OUTPUT SINK CURRENT (mA) 1.8 STANDBY CURRENT vs. AMBIENT TEMPERATURE NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE -14 -12 -10 -8 -6 VCC = 2.5V TA = 25°C -4 0 0.0 0.5 1.0 1.5 2 2.5 OUTPUT VOLTAGE (V) Document #: 38-05057 Rev. *D Page 9 of 13 CY62256V Typical DC and AC Characteristics (continued) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING NORMALIZED I CC vs.CYCLE TIME 1.25 25.0 T = 25°C A VCC = 3V 20.0 NORMALIZED ICC DELTA tAA (ns) 30.0 15.0 10.0 VCC = 3.0V 1.00 TA = 25°C VIN = 0.5V 0.75 5.0 0.0 0 200 400 600 0.50 1 800 1000 10 20 30 CYCLE FREQUENCY (MHz) CAPACITANCE (pF) Truth Table Inputs/Outputs CE WE OE H X X High-Z Mode Deselect/Power-down Power Standby (ISB) L H L Data Out Read Active (ICC) L L X Data In Write Active (ICC) L H H High-Z Deselect, Output Disabled Active (ICC) Ordering Information Speed (ns) 70 Ordering Code CY62256VLL-70SNC CY62256VLL-70ZC Package Name SN28 Z28 Package Type 28-lead (300-mil Narrow Body) Narrow SOIC Industrial CY62256VLL -70SNI SN28 28-lead (300-mil Narrow Body) Narrow SOIC CY62256VLL-70ZRI ZR28 28-lead Reverse Thin Small Outline Package CY62256VLL-70SNE SN28 CY62256VLL-70ZRE 100 CY62256V25LL-100ZC Document #: 38-05057 Rev. *D Commercial 28-lead Thin Small Outline Package CY62256VLL-70ZI CY62256VLL-70ZE Operating Range Z28 ZR28 Z28 28-lead (300-mil Narrow Body) Narrow SOIC Automotive 28-lead Thin Small Outline Package 28-lead Reverse Thin Small Outline Package 28-lead Thin Small Outline Package Commercial Page 10 of 13 CY62256V Package Diagrams 28-lead (300-mil) SNC (Narrow Body) SN28 51-85092-*B 28-lead Thin Small Outline Package Type 1 (8 × 13.4 mm) Z28 51-85071-*G Document #: 38-05057 Rev. *D Page 11 of 13 CY62256V Package Diagrams (continued) 28-lead Reverse Type 1 Thin Small Outline Package (8 × 13.4 mm) ZR28 51-85074-*F All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-05057 Rev. *D Page 12 of 13 © Cypress Semiconductor Corporation, 2004. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY62256V Document Title: CY62256V 256K (32K x 8) Static RAM Document Number: 38-05057 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 107248 09/10/01 SZV Changed from spec number: 38-00519 to 38-05057 *A 111445 11/01/01 MGN Removed obsolete parts. Change to standard format *B 115229 05/23/02 GBI Changed SN package diagram *C 116507 09/04/02 GBI Added footnote 1 Clarified ICC spec for VCC(typ) = 2.5V *D 239134 See ECN AJU Added Automotive product information Document #: 38-05057 Rev. *D Page 13 of 13