69A CY7C168A 4Kx4 RAM Features Functional Description • Automatic power-down when deselected • CMOS for optimum speed/power • High speed — tAA = 15 ns • Low active power — 633 mW • Low standby power — 110 mW • TTL-compatible inputs and outputs • VIH of 2.2V • Capable of withstanding greater than 2001V electrostatic discharge The CY7C168A is a high-performance CMOS static RAM organized as 4096 by 4 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE) and three-state drivers. The CY7C168A has an automatic power-down feature, reducing the power consumption by 77% when deselected. Writing to the device is accomplished when the Chip Select (CE) and Write Enable (WE) inputs are both LOW. Data on the four data input/output pins (I/O0 through I/O3) is written into the memory location specified on the address pins (A0 through A11). Reading the device is accomplished by taking the Chip Enable (CE) LOW, while Write Enable (WE) remains HIGH. Under these conditions, the contents of the location specified on the address pins will appear on the four data input/output pins (I/O0 through I/O3). The input/output pins remain in a high-impedance state when Chip Enable (CE) is HIGH or Write Enable (WE) is LOW. A die coat is used to insure alpha immunity. Logic Block Diagram Pin Configurations DIP/SOJ Top View A4 A5 A6 A7 A8 A9 A10 A11 INPUTBUFFER SENSE AMP I/O0 ROW DECODER A0 A1 A2 A3 A4 A5 A6 128 x 128 ARRAY CE GND I/O1 1 20 2 19 3 18 4 17 5 6 7C168A 16 \ 15 7 14 8 13 9 12 10 11 VCC A3 A2 A1 A0 I/O 0 I/O 1 I/O 2 I/O 3 WE C168A-2 I/O2 I/O3 COLUMN DECODER CE POWER DOWN (7C168A) WE A7 A8 A9 A10 A11 C168A-1 Selection Guide 7C168A-15 7C168A-20 7C168A-25 7C168A-35 7C168A-45 Maximum Access Time (ns) 15 20 25 35 45 Maximum Operating Current (mA) 115 90 90 90 90 - 100 100 100 100 Commercial Military Cypress Semiconductor Corporation Document #: 38-05029 Rev. ** • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 Revised August 24, 2001 CY7C168A Maximum Ratings Output Current into Outputs (Low) .............................. 20 mA (Above which the useful life may be impaired. For user guidelines, not tested.) Static Discharge Voltage ........................................... >2001V (per MIL-STD-883, Method 3015) Storage Temperature .....................................−65°C to +150°C Latch-Up Current..................................................... >200 mA Ambient Temperature with Power Applied..................................................−55°C to +125°C Operating Range Supply Voltage to Ground Potential (Pin 20 to Pin 10)................................................ −0.5V to +7.0V DC Voltage Applied to Outputs in High Z State .................................................... −0.5V to +7.0V Range Ambient Temperature VCC Commercial 0°C to +70°C 5V ± 10% −55°C to +125°C 5V ± 10% [1] Military DC Input Voltage .................................................−3.0V to +7.0V Electrical Characteristics Over the Operating Range[2] 7C168A-15 Parameter Description Test Conditions Min. VOH Output HIGH Voltage VCC = Min., IOH = −4.0 mA VOL Output LOW Voltage VCC = Min., IOL = 8.0 mA VIH Input HIGH Voltage Max. 2.4 7C168A-20 Min. 2.4 0.4 [3] Max. Unit V 0.4 V 2.2 VCC 2.2 VCC V −0.5 0.8 −0.5 0.8 V VIL Input LOW Voltage IIX Input Load Current GND < VI < VCC −10 +10 −10 +10 µA IOZ Output Leakage Current GND < VO < VCC, Output Disabled −10 +10 −10 +10 µA IOS Output Short Circuit Current[4] VCC = Max., VOUT = GND −350 −350 mA ICC VCC Operating Supply Current VCC = Max., IOUT = 0 mA Com’l 115 90 mA ISB1 Automatic CE Power-Down Current Max. VCC, CE > VIH Com’l Automatic CE Power-Down Current Max. VCC, CE > VCC − 0.3V Com’l ISB2 Mil Mil Mil - 100 40 40 - 40 20 20 - 20 mA mA Notes: 1. TA is the “instant on” case temperature. 2. See the last page of this specification for Group A subgroup testing information. 3. VIL min. = −3.0V for pulse durations less than 30 ns. 4. Not more than 1 output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds. Document #: 38-05029 Rev. ** Page 2 of 10 CY7C168A Electrical Characteristics Over the Operating Range[2] (continued) Parameter Description Test Conditions VOH Output HIGH Voltage VCC = Min., IOH = −4.0 mA VOL Output LOW Voltage VCC = Min., IOL = 8.0 mA VIH Input HIGH Voltage 7C168A-25 7C168A-35 7C168A-45 Min. Min. Min. Max. 2.4 Max. 2.4 0.4 2.2 Max. Unit 2.4 0.4 V 0.4 V V VCC 2.2 VCC 2.2 VCC VIL Input LOW Voltage −0.5 0.8 −0.5 0.8 −0.5 0.8 V IIX Input Load Current GND < VI < VCC −10 +10 −10 10 −10 10 µA IOZ Output Leakage Current GND < VO < VCC Output Disabled −10 +10 −50 50 −50 50 µA IOS Output Short Circuit Current[4] VCC = Max., VOUT = GND −350 −350 mA ICC VCC Operating Supply Current VCC = Max., IOUT = 0 mA Com’l 90 90 90 mA Mil 100 100 100 Automatic CE Power-Down Current Max. VCC, CE > VIH Com’l 20 20 20 Mil 20 20 20 Automatic CE Power-Down Current Max. VCC, CE > VCC − 0.3 V Com’l 20 20 20 Mil 20 20 20 ISB1 ISB2 [3] −350 mA mA Capacitance[5] Parameter Description CIN Input Capacitance COUT Output Capacitance Test Conditions Max. Unit 10 pF 10 pF TA = 25°C, f = 1 MHz, VCC = 5.0V Note: 5. Tested initially and after any design or process changes that may affect these parameters. AC Test Loads and Waveforms R1 481 Ω 5V OUTPUT R1 481 Ω 5V ALL INPUT PULSES OUTPUT R2 255Ω 30 pF INCLUDING JIG AND SCOPE Equivalent to: 3.0V R2 255Ω 5 pF INCLUDING JIG AND SCOPE (a) (b) C168A-3 GND < 5 ns 90% 10% 90% 10% < 5 ns C168A-4 THÉVENIN EQUIVALENT 167Ω OUTPUT Document #: 38-05029 Rev. ** 1.73V Page 3 of 10 CY7C168A Switching Characteristics Over the Operating Range[2,6] Parameter Description 7C168A-15 7C168A-20 7C168A-25 7C168A-35 7C168A-45 Min. Min. Min. Min. Min. Max. Max. Max. Max. Max. Unit READ CYCLE tRC Read Cycle Time 15 tAA Address to Data Valid tOHA Output Hold from Address Change tACE Power Supply Current tLZCE CE LOW to Low Z[7] 20 15 20 5 5 15 5 5 8 35 25 20 5 [7, 8] 25 35 5 25 5 8 45 45 5 35 5 ns 45 5 ns ns CE HIGH to High Z tPU CE LOW to Power Up tPD CE HIGH to Power-Down tRCS Read Command Set-Up 0 0 0 0 0 ns tRCH Read Command Hold 0 0 0 0 0 ns 0 15 0 20 15 ns tHZCE 0 10 ns 0 20 15 0 20 ns ns 25 ns [9] WRITE CYCLE tWC Write Cycle Time 15 20 20 25 40 ns tSCE CE LOW to Write End 12 15 20 25 30 ns tAW Address Set-Up to Write End 12 15 20 25 30 ns tHA Address Hold from Write End 0 0 0 0 0 ns tSA Address Set-Up to Write Start 0 0 0 0 0 ns tPWE WE Pulse Width 12 15 15 20 20 ns tSD Data Set-Up to Write End 10 10 10 15 15 ns tHD Data Hold from Write End 0 0 0 0 0 ns [7] tLZWE WE HIGH to Low Z 7 7 7 5 5 ns tHZWE WE LOW to High Z[7, 8] 5 5 5 5 10 ns Switching Waveforms Read Cycle No. 1 [10, 11] tRC ADDRESS tOHA DATA OUT PREVIOUS DATA VALID tAA DATA VALID C168A-5 Notes: 6. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 30-pF load capacitance. 7. At any given temperature and voltage condition, tHZ is less than tLZ for all devices. Transition is measured ±500 mV from steady state voltage with specified loading in part (b) of AC Test Loads and Waveforms. 8. tHZCE and tHZWE are tested with CL = 5 pF as in part (a) of Test Loads and Waveforms. Transition is measured ±500 mV from steady state voltage. 9. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signal must be LOW to initiate a write and either signal can terminate a write by going high. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 10. WE is HIGH for read cycle. 11. Device is continuously selected, CE = VIL. Document #: 38-05029 Rev. ** Page 4 of 10 CY7C168A Switching Waveforms (continued) Read Cycle [10, 12] tRC CE tACE tLZCE DATA OUT tHZCE HIGH IMPEDANCE HIGH IMPEDANCE DATA VALID tPD tPU ICC VCC SUPPLY CURRENT 50% 50% WE ISB tRCH tRCS C168A-6 [9] Write Cycle No. 1 (WE Controlled) tWC ADDRESS tSCE CE tAW tSA tHA tPWE WE tSD DATA IN tHD DATAIN VALID tHZWE DATA I/O tLZWE HIGH IMPEDANCE DATA UNDEFINED C168A-7 Write Cycle No. 2 (CS Controlled) [9, 13] tWC ADDRESS tSA tSCE CE tHA tAW tPWE WE tSD DATA IN tHD DATA IN VALID tHZWE HIGH IMPEDANCE DATA I/O DATA UNDEFINED C168A-8 Notes: 12. Address valid prior to or coincident with CE transition LOW. 13. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. Document #: 38-05029 Rev. ** Page 5 of 10 CY7C168A NORMALIZED SUPPLY CURRENT vs. AMBIENT TEMPERATURE NORMALIZED SUPPLY CURRENT vs. SUPPLY VOLTAGE 1.2 NORMALIZED I CC , I SB 1.2 ICC 0.8 VIN = 5.0V TA = 25°C 0.6 0.4 0.8 0.6 0.4 VCC = 5.0V VIN = 5.0V 0.2 0.2 0.0 4.0 ISB ISB 4.5 5.0 5.5 0.0 −55 6.0 NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE 1.4 1.6 1.3 1.4 NORMALIZED t AA NORMALIZED t AA NORMALIZED ACCESS TIME vs. SUPPLY VOLTAGE 1.2 1.1 TA = 25°C 1.0 1.2 1.0 VCC = 5.0V 0.8 0.9 4.5 5.0 5.5 0.6 −55 6.0 25 2.5 25.0 DELTA tAA (ns) TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 2.0 1.5 1.0 0.5 20.0 15.0 10.0 VCC = 4.5V TA = 25°C 5.0 1.0 2.0 3.0 4.0 SUPPLY VOLTAGE (V) Document #: 38-05029 Rev. ** 100 80 VCC = 5.0V TA = 25°C 60 40 20 0 0.0 5.0 0.0 0 200 400 600 800 1000 CAPACITANCE (pF) 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 140 120 100 80 60 VCC = 5.0V TA = 25°C 40 20 0 0.0 125 TYPICAL POWER-ON CURRENT vs. SUPPLY VOLTAGE 3.0 0.0 0.0 120 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) AMBIENT TEMPERATURE (°C) SUPPLY VOLTAGE (V) NORMALIZED I PO 125 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE AMBIENT TEMPERATURE (°C) SUPPLY VOLTAGE (V) 0.8 4.0 25 OUTPUT SINK CURRENT (mA) 1.0 ICC 1.0 NORMALIZED I CC vs.CYCLE TIME 1.1 NORMALIZED I CC NORMALIZED I CC, I SB 1.4 OUTPUT SOURCE CURRENT (mA) Typical DC and AC Characteristics 1.0 0.9 0.8 10 20 30 40 CYCLE FREQUENCY (MHz) Page 6 of 10 CY7C168A Ordering Information Speed (ns) ICC (mA) 15 115 20 90 25 35 45 Ordering Code Package Name Package Type Operating Range CY7C168A-15PC P5 20-Lead (300-Mil) Molded DIP CY7C168A-15VC V5 20-Lead Molded SOJ CY7C168A-20PC P5 20-Lead (300-Mil) Molded DIP CY7C168A-20VC V5 20-Lead Molded SOJ CY7C168A-20DMB D6 20-Lead (300-Mil) CerDIP Military CY7C168A-25PC P5 20-Lead (300-Mil) Molded DIP Commercial CY7C168A-25VC V5 20-Lead Molded SOJ 80 CY7C168A-25DMB D6 20-Lead (300-Mil) CerDIP Military 70 CY7C168A-35PC P5 20-Lead (300-Mil) Molded DIP Commercial CY7C168A-35VC V5 20-Lead Molded SOJ CY7C168A-35DMB D6 20-Lead (300-Mil) CerDIP Military CY7C168A-45PC P5 20-Lead (300-Mil) Molded DIP Commercial CY7C168A-45VC V5 20-Lead Molded SOJ CY7C168A-45DMB D6 20-Lead (300-Mil) CerDIP 70 70 Commercial Commercial Military MILITARY SPECIFICATIONS Group A Subgroup Testing Switching Characteristics DC Characteristics Parameter Parameter Subgroups Subgroups READ CYCLE VOH 1, 2, 3 VOL 1, 2, 3 VIH 1, 2, 3 VIL Max. 1, 2, 3 IIX 1, 2, 3 IOZ 1, 2, 3 ICC 1, 2, 3 WRITE CYCLE ISB1 1, 2, 3 tWC 7, 8, 9, 10, 11 ISB2 1, 2, 3 tSCE 7, 8, 9, 10, 11 tAW 7, 8, 9, 10, 11 tHA 7, 8, 9, 10, 11 tSA 7, 8, 9, 10, 11 tPWE 7, 8, 9, 10, 11 tSD 7, 8, 9, 10, 11 tHD 7, 8, 9, 10, 11 Document #: 38-05029 Rev. ** tRC 7, 8, 9, 10, 11 tAA 7, 8, 9, 10, 11 tOHA 7, 8, 9, 10, 11 tACE 7, 8, 9, 10, 11 tRCS 7, 8, 9, 10, 11 tRCH 7, 8, 9, 10, 11 Page 7 of 10 CY7C168A Package Diagrams 20-Lead (300-Mil) CerDIP D6 MIL-STD-1835 D-8 Config. A 51-80029 20-Lead (300-Mil) Molded DIP P5 51-85011-A Document #: 38-05029 Rev. ** Page 8 of 10 CY7C168A Package Diagrams (continued) 20-Lead (300-Mil) Molded SOJ V5 51-85029-A Document #: 38-05029 Rev. ** Page 9 of 10 © Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C168A Document Title: CY7C168A 4K x 4 RAM Document Number: 38-05029 REV. ECN NO. Issue Date Orig. of Change Description of Change ** 106815 09/10/01 SZV Change from Spec number: 38-00095 to 38-05029 Document #: 38-05029 Rev. ** Page 10 of 10