CYM1841A CYM1841B CYM1841C 256K x 32 Static RAM Module Features Reading or writing can be executed on individual bytes or any combination of multiple bytes through proper use of selects. • High-density 8-megabit SRAM module Writing to each byte is accomplished when the appropriate Chip Select (CS) and Write Enable (WE) inputs are both LOW. Data on the Input/Output pins (I/O) is written into the memory location specified on the address pins (A0 through A17). • 32-bit standard footprint supports densities from 16K x 32 through 1M x 32 • High-speed CMOS SRAMs Reading the device is accomplished by taking the Chip Select (CS) LOW while Write Enable (WE) remains HIGH. Under these conditions, the contents of the memory location specified on the address pins will appear on the data Input/Output pins (I/O). — Access time of 12 ns • Low active power — 5.3W (max.) at 25 ns • SMD technology The data input/output pins stay at the high-impedance state when write enable is LOW or the appropriate chip selects are HIGH. • TTL-compatible inputs and outputs • Low profile Two pins (PD0 and PD1) are used to identify module memory density in applications where alternate versions of the JEDEC-standard modules can be interchanged. — Max. height of 0.58 in. • Available in ZIP, SIMM, and angled SIMM footprint • 72-pin SIMM version compatible with 1M x 32 (CYM1851) Functional Description The CYM1841A/B/C are high-performance 8-megabit static RAM modules organized as 256K words by 32 bits. This module is constructed from eight 256K x 4 SRAMs (1841A/C) or 256K x 16 SRAMs (1841B) in SOJ packages mounted on an epoxy laminate board with pins. Four chip selects (CS1, CS2, CS3, CS4) are used to independently enable the four bytes. The CYM1841A, CYM1841B, and CYM1841C are 100% pin, package, and electrically identical. The CYM1841A utilizes corner power and ground SRAMs, the CYM1841B utilizes 256K x 16 SRAMs, the CYM1841C utilizes center power and ground SRAMs. A 72-pin SIMM is offered for compatibility with the 1M x 32 CYM1851. This version is socket upgradable to the CYM1851. Both the 64-pin and 72-pin SIMM modules are available with either tin-lead or 10 micro-inches of gold flash on the edge contacts. Logic Block Diagram A0 – A17 OE PD0 – PD1 – PD2 – PD3 – 18 GND GND OPEN (72-pin only) OPEN (72-pin only) WE 256K x 4 SRAM 4 256K x 4 SRAM 4 256K x 4 SRAM 4 256K x 4 SRAM 4 I/O0 – I/O3 256K x 4 SRAM 4 I/O8 – I/O11 256K x 4 SRAM 4 I/O16 – I/O19 256K x 4 SRAM 4 I/O24 – I/O27 256K x 4 SRAM 4 I/O4– I/O7 CS1 I/O12 – I/O15 CS2 I/O20 –I/O23 CS3 I/O28 –I/O31 CS4 1841A–1 Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 June 13, 2000 CYM1841A CYM1841B CYM1841C Logic Block Diagram (1841B) A0 –A17 OE PD0 – PD1 – PD2 – PD3 – 18 GND GND OPEN (72-pin only) OPEN (72-pin only) WE CS1 CS2 CS3 CS4 256K x 16 SRAM I/O16–I/O23 8 I/O24 –I/O31 8 256K x 16 SRAM I/O0 –I/O7 8 I/O8 –I/O15 8 1841A–1 Selection Guide 1841C-12 1841B/C-15 1841A/B/C-20 1841A/B/C-25 12 15 20 25 35 45 Maximum Operating Current (mA) 1600 1600 1120 960 960 960 Maximum Standby Current (mA) 480 480 480 480 480 480 Maximum Access Time (ns) Shaded areas contain preliminary information. 2 1841A/B/C-35 1841A/B/C-45 CYM1841A CYM1841B CYM1841C Pin Configurations 72-Pin SIMM Top View 64-Pin ZIP/SIMM Top View PD0 I/O0 I/O1 I/O2 I/O3 VCC A7 A8 A9 I/O4 I/O5 I/O6 I/O7 WE A14 CS1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 CS3 A16 GND I/O16 I/O17 I/O18 I/O19 A10 A11 A12 A13 I/O20 I/O21 I/O22 I/O23 GND 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 GND PD1 I/O8 I/O9 I/O10 I/O11 A0 A1 A2 I/O12 I/O13 I/O14 I/O15 GND A 15 CS2 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 CS4 A17 OE I/O24 I/O25 I/O26 I/O27 A3 A4 A5 VCC A6 I/O28 I/O29 I/O30 I/O31 1841A–3 3 NC PD3 PD0 I/O0 I/O1 I/O2 I/O3 VCC A7 A8 A9 I/O4 I/O5 I/O6 I/O7 WE A14 CS1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 CS3 A16 GND I/O16 I/O17 I/O18 I/O19 A10 A11 A12 A13 I/O20 I/O21 I/O22 I/O23 GND A19 NC 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 NC PD2 GND PD1 I/O8 I/O9 I/O10 I/O11 A0 A1 A2 I/O12 I/O13 I/O14 I/O15 GND A15 CS2 CS4 A17 OE I/O24 I/O25 I/O26 I/O27 A3 A4 A5 VCC A6 I/O28 I/O29 I/O30 I/O31 A18 NC 1841A–2 CYM1841A CYM1841B CYM1841C Maximum Ratings DC Voltage Applied to Outputs in High Z State ..................................................... – 0.5V to +7.0V (Above which the useful life may be impaired. For user guidelines, not tested.) DC Input Voltage ................................................. – 0.5V to +7.0V Storage Temperature ..................................... – 55°C to +125°C Operating Range Ambient Temperature with Power Applied .................................................... – 10°C to +85°C Range Ambient Temperature VCC Supply Voltage to Ground Potential..................– 0.5V to +7.0V Commercial 0°C to +70°C 5V ± 10% Electrical Characteristics Over the Operating Range Parameter 1841C -12 1841B/C-15 Max. 1841A/B/C -20 Description Test Conditions Min. VOH Output HIGH Voltage VCC = Min., IOH = –4.0 mA 2.4 Min. Max. VOL Output LOW Voltage VCC = Min., IOL = 8.0 mA VIH Input HIGH Voltage 2.2 VCC 2.2 VCC VIL Input LOW Voltage –0.5 0.8 –0.5 IIX Input Leakage Current GND < V I < V CC –16 +16 IOZ Output Leakage Current GND < VO < VCC, Output Disabled –10 +10 ICC VCC Operating Supply Current VCC = Max., IOUT = 0 mA, CS < VIL 1600 ISB1 Automatic CS Power-Down Current[1] Max. VCC, CS > VIH, Min. Duty Cycle = 100% ISB2 Automatic CS Power-Down Current[1] Max. VCC, CS > VCC 0.2V, VIN > VCC – 0.2V, or VIN < 0.2V 2.4 0.4 1841A/B/C -25, 35, 45 Min. Max. 2.4 0.4 V 0.4 V 2.2 VCC V 0.8 –0.5 0.8 V –16 +16 –16 +16 mA –10 +10 –10 +10 mA 1120 960 mA 480 480 480 mA 240 200 200 mA Capacitance[2] Parameter Description CIN Input Capacitance[3] COUT Output Capacitance Test Conditions TA = 25°C, f = 1 MHz, VCC = 5.0V Max. Unit 70/20 pF 20 pF Notes: 1. A pull-up resistor to VCC on the CS input is required to keep the device deselected during VCC power-up, otherwise ISB will exceed values given. 2. Tested on a sample basis. 3. 20 pF on CS, 70 pF all others. 4 Unit CYM1841A CYM1841B CYM1841C AC Test Loads and Waveforms R1481 Ω R1481 Ω 5V ALL INPUT PULSES 3.0V 5V OUTPUT R2 255Ω 30 pF INCLUDING JIG AND SCOPE OUTPUT R2 255Ω 5 pF INCLUDING JIG AND SCOPE (a) Equivalent to: 90% OUTPUT GND < 5ns 10% 90% 10% < 5ns 1841A–4 (b) 1841A–5 THÉVENIN EQUIVALENT 167Ω 1.73V 5 CYM1841A CYM1841B CYM1841C Switching Characteristics Over the Operating Range[4] 1841C-12 Parameter Description Min. Max. 1841B/C-15 Min. Max. 1841A/B/C-20 1841A/B/C-25 Min. Max. Min. Max. Unit READ CYCLE tRC Read Cycle Time 12 tAA Address to Data Valid 15 12 20 15 25 20 ns 25 ns tOHA Output Hold from Address Change tACS CS LOW to Data Valid 12 15 20 25 ns tDOE OE LOW to Data Valid 7 8 13 15 ns tLZOE OE LOW to Low Z tHZOE OE HIGH to High Z tLZCS CS LOW to Low Z [5] 3 0 CS HIGH to High Z tPD CS HIGH to Power-Down 3 0 7 3 [5, 6] tHZCS WRITE CYCLE 3 3 0 8 3 ns 0 15 10 ns 15 10 ns ns 7 8 20 20 12 15 20 25 ns [7] tWC Write Cycle Time 12 15 20 25 ns tSCS CS LOW to Write End 9 10 15 20 ns tAW Address Set-Up to Write End 9 10 18 20 ns tHA Address Hold from Write End 0 0 0 0 ns tSA Address Set-Up to Write Start 2 2 2 2 ns tPWE WE Pulse Width 10 13 15 20 ns tSD Data Set-Up to Write End 7 8 13 15 ns tHD Data Hold from Write End 1 1 2 2 ns tLZWE WE HIGH to Low Z 0 0 0 0 ns tHZWE WE LOW to High Z [6] 0 5 0 7 0 15 0 15 ns Shaded areas contain preliminary information. Notes: 4. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 30-pF load capacitance. 5. At any given temperature and voltage condition, tHZCS is less than tLZCS for any given device. These parameters are guaranteed by design and not 100% tested. 6. tHZCS and tHZWE are specified with C L = 5 pF as in part (b) of AC Test Loads and Waveforms. Transition is measured ±500 mV from steady-state voltage. 7. The internal write time of the memory is defined by the overlap of CS LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 6 CYM1841A CYM1841B CYM1841C Switching Characteristics Over the Operating Range[4 1841A/B/C-35 Parameter Description Min. Max. 1841A/B/C-45 Min. Max. Unit READ CYCLE tRC Read Cycle Time 35 tAA Address to Data Valid tOHA Data Hold from Address Change tACS CS LOW to Data Valid tDOE OE LOW to Data Valid tLZOE OE LOW to Low Z tHZOE OE LOW to High Z tLZCS CS LOW to Low Z[5] 45 35 45 ns 35 45 ns 25 30 ns 3 3 0 ns 0 15 10 [5, 6] ns ns 15 10 ns ns tHZCS CS HIGH to High Z 20 20 ns tPD CS HIGH to Power-Down 35 45 ns WRITE CYCLE[7] tWC Write Cycle Time 35 45 ns tSCS CS LOW to Write End 30 40 ns tAW Address Set-Up to Write End 30 40 ns tHA Address Hold from Write End 2 2 ns tSA Address Set-Up to Write Start 2 2 ns tPWE WE Pulse Width 30 35 ns tSD Data Set-Up to Write End 20 25 ns tHD Data Hold from Write End 2 2 ns tLZWE WE HIGH to Low Z 0 tHZWE WE LOW to High Z[6] 0 7 0 15 0 ns 15 ns CYM1841A CYM1841B CYM1841C Switching Waveforms Read Cycle No. 1[8, 9] tRC ADDRESS tAA tOHA DATA OUT PREVIOUS DATA VALID DATA VALID 1841A–6 Read Cycle No. 2[8, 10] tRC CS tACS OE tHZOE tDOE tHZCS tLZOE HIGH IMPEDANCE HIGH IMPEDANCE DATA VALID DATA OUT tLZCS 1841A–7 Write Cycle No. 1 (WE Controlled)[7] tWC ADDRESS tSCS CS tAW tHA tSA tPWE WE tSD DATA IN DATA VALID tHZWE DATA OUT tHD tLZWE HIGH IMPEDANCE DATA UNDEFINED 1841A–8 Notes: 8. WE is HIGH for read cycle. 9. Device is continuously selected, CS = VIL and OE= VIL. 10. Address valid prior to or coincident with CS transition LOW. 8 CYM1841A CYM1841B CYM1841C Switching Waveforms (continued) Write Cycle No. 2 (CS Controlled)[7, 11] tWC ADDRESS tSA tSCS CS tAW tHA tPWE WE tSD DATA IN tHD DATA VALID tHZWE HIGH IMPEDANCE DATA OUT DATA UNDEFINED 1841A–9 Note: 11. If CS goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. Truth Table CS WE OE Input/Output Mode H X X High Z Deselect/Power-Down L H L Data Out Read L L X Data In Write L H H High Z Deselect 9 CYM1841A CYM1841B CYM1841C Ordering Information Speed (ns) 12 15 20 25 Ordering Code Package Name Package Type CYM1841CPM-12C PM02 64-Pin Plastic SIMM Module CYM1841CP7-12C PM04 72-Pin Plastic SIMM Module CYM1841CPZ-12C PZ03 64-Pin Plastic ZIP Module CYM1841APM15C PM02 64-Pin Plastic SIMM Module CYM1841APY-15C PM01 64-Pin Plastic SIMM Module (gold contacts) CYM1841APT-15C PM01 64-Pin Plastic SIMM Module CYM1841AP5-15C PN04 72-Pin Plastic Angled SIMM Module CYM1841AP6-15C PM01 72-Pin Plastic Angled SIMM Module (gold contacts) CYM1841AP7-15C PM04 72-Pin Plastic SIMM Module CYM1841AP8-15C PM04 72-Pin Plastic SIMM Module (gold contacts) CYM1841APN-15C PN02 64-Pin Plastic Angled SIMM Module CYM1841APR-15C PZ01 64-Pin Plastic ZIP Module CYM1841APZ-15C PZ03 64-Pin Plastic ZIP Module CYM1841BPZ-15C PZ03 64-Pin Plastic ZIP Module CYM1841BP7-15C PM04 72-Pin Plastic SIMM Module CYM1841APM-20C PM02 64-Pin Plastic SIMM Module CYM1841APY-20C PM01 64-Pin Plastic SIMM Module (gold contacts) CYM1841APT-20C PM01 64-Pin Plastic SIMM Module CYM1841AP5-20C PN04 72-Pin Plastic Angled SIMM Module CYM1841AP6-20C PM01 72-Pin Plastic Angled SIMM Module (gold contacts) CYM1841AP7-20C PM04 72-Pin Plastic SIMM Module CYM1841AP8-20C PM04 72-Pin Plastic SIMM Module (gold contacts) CYM1841APN-20C PN02 64-Pin Plastic Angled SIMM Module CYM1841APR-20C PZ01 64-Pin Plastic ZIP Module CYM1841APZ-20C PZ03 64-Pin Plastic ZIP Module CYM1841BPZ-20C PZ03 64-Pin Plastic ZIP Module CYM1841BP7-20C PM04 72-Pin Plastic SIMM Module CYM1841APM-25C PM02 64-Pin Plastic SIMM Module CYM1841APY-25C PM01 64-Pin Plastic SIMM Module (gold contacts) CYM1841APT-25C PM01 64-Pin Plastic SIMM Module CYM1841AP5-25C PN04 72-Pin Plastic Angled SIMM Module CYM1841AP6-25C PM01 72-Pin Plastic Angled SIMM Module (gold contacts) CYM1841AP7-25C PM04 72-Pin Plastic SIMM Module CYM1841AP8-25C PM04 72-Pin Plastic SIMM Module (gold contacts) CYM1841APN-25C PN02 64-Pin Plastic Angled SIMM Module CYM1841APR-25C PZ01 64-Pin Plastic ZIP Module CYM1841APZ-25C PZ03 64-Pin Plastic ZIP Module CYM1841BPZ-25C PZ03 64-Pin Plastic ZIP Module CYM1841BP7-25C PM04 72-Pin Plastic SIMM Module Shaded areas contain preliminary information. 10 Operating Range Commercial Commercial Commercial Commercial CYM1841A CYM1841B CYM1841C Ordering Information (continued) Speed (ns) 35 45 Ordering Code Package Name Package Type CYM1841APM-35C PM02 64-Pin Plastic SIMM Module CYM1841APY-35C PM01 64-Pin Plastic SIMM Module (gold contacts) CYM1841APT-35C PM01 64-Pin Plastic SIMM Module CYM1841AP5-35C PN04 72-Pin Plastic Angled SIMM Module CYM1841AP6-35C PM01 72-Pin Plastic Angled SIMM Module (gold contacts) CYM1841AP7-35C PM04 72-Pin Plastic SIMM Module CYM1841AP8-35C PM04 72-Pin Plastic SIMM Module (gold contacts) CYM1841APN-35C PN02 64-Pin Plastic Angled SIMM Module CYM1841APR-35C PZ01 64-Pin Plastic ZIP Module CYM1841APZ-35C PZ03 64-Pin Plastic ZIP Module CYM1841BPZ-35C PZ03 64-Pin Plastic ZIP Module CYM1841BP7-35C PM04 72-Pin Plastic SIMM Module CYM1841APM-45C PM02 64-Pin Plastic SIMM Module CYM1841APY-45C PM01 64-Pin Plastic SIMM Module (gold contacts) CYM1841APT-45C PM01 64-Pin Plastic SIMM Module CYM1841AP5-45C PN04 72-Pin Plastic Angled SIMM Module CYM1841AP6-45C PM01 72-Pin Plastic Angled SIMM Module (gold contacts) CYM1841AP7-45C PM04 72-Pin Plastic SIMM Module CYM1841AP8-45C PM04 72-Pin Plastic SIMM Module (gold contacts) CYM1841APN-45C PN02 64-Pin Plastic Angled SIMM Module CYM1841APR-45C PZ01 64-Pin Plastic ZIP Module CYM1841APZ-45C PZ03 64-Pin Plastic ZIP Module CYM1841BPZ-45C PZ03 64-Pin Plastic ZIP Module CYM1841BP7-45C PM04 72-Pin Plastic SIMM Module Document #: 38-M-00031-G 11 Operating Range Commercial Commercial CYM1841A CYM1841B CYM1841C Package Diagrams 64-Pin Plastic SIMM Module PM01 0.125 DIA. + .001 2 PLCS 3.845 3.855 3.580 3.588 0.330 MAX 0.525 MAX 0.400 0.250 PIN 1 0.080 0.050 TYP 0.62 R + .001 0.250 PIN 64 3.35 (64 PINS) 0.250 0.145 REF V 64-Pin Plastic SIMM Module PM02 0.125 DIA. + .001 2 PLCS 3.845 3.855 0.350 MAX 3.580 3.588 0.585 0.595 0.400 0.250 0.080 0.250 PIN 1 0.050 TYP 0.62 R + .001 0.250 3.348 (64 PINS) 3.352 72-Pin Plastic SIMM Module PM04 12 0.135 REF PIN 64 CYM1841A CYM1841B CYM1841C Package Diagrams (continued) 64-Pin Plastic Angled SIMM Module PN02 3.845/3.855 3.580/3.588 .350MAX .670/.680 .397/.403 .245/.255 PIN1 .075/.085 .220REF .061/.063R .050TYP .249/.251 3.348/3.352 .245/.255 72-Pin Plastic Angled SIMM Module PN04 64-Pin Plastic ZIP Module PZ01 Bottom View 0.330 MAX 3.640 3.660 0.050 0.050 0.500 MAX 0.120 0.150 0.008 0.014 0.135 0.165 0.015 0.025 0.100 TYP 0.250 TYP 0.050 TYP 0.100 TYP Pin 1 DIMENSIONS IN INCHES MIN. MAX. 13 CYM1841A CYM1841B CYM1841C Package Diagrams (continued) 64-Pin Plastic ZIP Module PZ03 Bottom View 0.350 MAX 3.640 3.660 0.050 0.050 0.575 MAX 0.120 0.150 0.135 0.165 0.015 0.025 0.250 TYP 0.100 TYP 0.050 TYP 0.100 TYP Pin 1 DIMENSIONSININCHES MIN. MAX. © Cypress Semiconductor Corporation, 2000. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.