DDU66C data 3 delay devices, inc. 5-TAP, HCMOS-INTERFACED FIXED DELAY LINE (SERIES DDU66C) FEATURES • • • • • • PACKAGES Five equally spaced outputs Fits standard 14-pin DIP socket Low profile Auto-insertable Input & outputs fully CMOS interfaced & buffered IN 1 T2 4 T4 6 GND 7 14 VDD 12 T1 10 T3 8 T5 IN N/C N/C T2 N/C T4 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD N/C T1 N/C T3 N/C T5 2 10 T L fan-out capability DDU66C-xx DIP DDU66C-xxA2 Gull-Wing DDU66C-xxB2 J-Lead DDU66C-xxME7 Military DIP FUNCTIONAL DESCRIPTION DDU66C-xxD1 DDU66C-xxD4 DDU66C-xxMD1 DDU66C-xxMD4 Com. SMD Com. SMD Mil. SMD Mil. SMD PIN DESCRIPTIONS The DDU66C-series device is a 5-tap digitally buffered delay line. The IN Signal Input signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an T1-T5 Tap Outputs amount given by the device dash number. For dash numbers less than 40, VDD +5 Volts the total delay of the line is measured from T1 to T5, with the nominal value GND Ground given by the dash number. The nominal tap-to-tap delay increment is given by 1/4 of this number. The inherent delay from IN to T1 is nominally 8.0ns. For dash numbers greater than or equal to 40, the total delay of the line is measured from IN to T5, with the nominal value given by the dash number. The nominal tap-to-tap delay increment is given by 1/5 of this number. SERIES SPECIFICATIONS • • • • • • DASH NUMBER SPECIFICATIONS Minimum input pulse width: 40% of total delay Output rise time: 8ns typical Supply voltage: 5VDC ± 5% Supply current: ICCL = 40µa typical ICCH = 10ma typical Operating temperature: 0° to 70° C Temp. coefficient of total delay: 300 PPM/°C 8.0ns VCC IN 25% T1 25% T2 25% T3 25% T4 T5 GND Functional diagram for dash numbers < 40 20% VCC IN 20% T1 20% T2 20% T3 Part Number DDU222C-10 DDU222C-20 DDU222C-50 DDU222C-60 DDU222C-75 DDU222C-100 DDU222C-125 DDU222C-150 DDU222C-175 DDU222C-200 DDU222C-250 2/5/97 Powered by ICminer.com Electronic-Library Service CopyRight 2003 Delay Per Tap (ns) 2.5 ± 1.0 5.0 ± 2.0 10.0 ± 3.0 12.0 ± 3.0 15.0 ± 3.0 20.0 ± 3.0 25.0 ± 3.0 30.0 ± 3.0 35.0 ± 4.0 40.0 ± 4.0 50.0 ± 5.0 * Total delay is referenced to first tap output Input to first tap = 8.0ns ± 2ns NOTE: Any dash number between 10 and 250 not shown is also available. 20% T4 T5 GND Functional diagram for dash numbers >= 40 Doc #97021 Total Delay (ns) 10 ± 2.0 * 20 ± 2.0 * 50 ± 3.0 60 ± 3.0 75 ± 4.0 100 ± 5.0 125 ± 6.5 150 ± 7.5 175 ± 8.0 200 ± 10.0 250 ± 12.5 DATA DELAY DEVICES, INC. 3 Mt. Prospect Ave. Clifton, NJ 07013 1997 Data Delay Devices 1 DDU66C APPLICATION NOTES Delay Devices if your application requires device testing at a specific input condition. HIGH FREQUENCY RESPONSE The DDU66C tolerances are guaranteed for input pulse widths and periods greater than those specified in the test conditions. Although the device will function properly for pulse widths as small as 40% of the total delay and periods as small as 80% of the total delay (for a symmetric input), the delays may deviate from their values at low frequency. However, for a given input condition, the deviation will be repeatable from pulse to pulse. Contact technical support at Data POWER SUPPLY BYPASSING The DDU66C relies on a stable power supply to produce repeatable delays within the stated tolerances. A 0.1uf capacitor from VDD to GND, located as close as possible to the VDD pin, is recommended. A wide VDD trace and a clean ground plane should be used. DEVICE SPECIFICATIONS TABLE 1: ABSOLUTE MAXIMUM RATINGS PARAMETER DC Supply Voltage Input Pin Voltage Storage Temperature Lead Temperature SYMBOL VDD VIN TSTRG TLEAD MIN -0.3 -0.3 -55 MAX 7.0 VDD+0.3 150 300 UNITS V V C C NOTES 10 sec TABLE 2: DC ELECTRICAL CHARACTERISTICS (0C to 70C, 4.75V to 5.25V) PARAMETER High Level Output Voltage SYMBOL VOH Low Level Output Voltage VOL High Level Output Current Low Level Output Current High Level Input Voltage Low Level Input Voltage Input Current IOH IOL VIH VIL IIH Doc #97021 Powered 2/5/97 by ICminer.com MIN 3.98 TYP 4.4 MAX UNITS V 0.15 0.26 V -4.0 4.0 mA mA V V µA 3.15 1.35 0.10 NOTES VDD = 5.0, IOH = MAX VIH = MIN, VIL = MAX VDD = 5.0, IOL = MAX VIH = MIN, VIL = MAX VDD = 5.0 DATA DELAY DEVICES, INC. Tel: 973-773-2299 Fax: 973-773-9672 Electronic-Library Service CopyRight 2003 http://www.datadelay.com 2 DDU66C PACKAGE DIMENSIONS 14 12 10 8 Lead Material: Nickel-Iron alloy 42 TIN PLATE 14 12 10 .410 TYP. 1 1 4 6 8 4 6 7 7 .280 MAX. .780 MAX. .820 MAX. .290 MAX. .020 .320 TYP. MAX. .130 ±.030 .015 TYP. .010±.002 .018 TYP. .070 MAX. .350 MAX. .600±.010 .018 TYP. .600 TYP. 14 .040 TYP. 12 10 .010 TYP. 4 8 .090 6 .040 TYP. .020 TYP. 14 .270 TYP. 1 12 7 .050 TYP. DDU66C-xxA2 (Commercial Gull-Wing) .320 TYP. .270 TYP. 1 .300 MAX. .050 TYP. 8 10 .430 TYP. .100 .600 .790 MAX. .300 TYP. DDU66C-xxME7 (Military) DDU66C-xx (Commercial) .020 TYP. .020 TYP. .100 TYP. 4 .110 6 7 .100 .600 .790 MAX. .350 MAX. .110 TYP. DDU66C-xxB2 (Commercial J-Lead) .650 .100 .100 1 .017 14 1 .510 MAX. .300 TYP. 14 .510 MAX. .300 TYP. 7 7 8 .100 .300 .510 MAX. .050 .510 MAX. .080 .300 .200 MAX. (Com) .025 8 .100 .050 .008 .017 .200 MAX. (Com) .225 MAX. (Mil) .080 .008 .225 MAX. (Mil) .065 TYP. .360 TYP. .065 TYP. .045 DDU66C-xxD1 (Commercial SMD) DDU66C-xxMD1 (Military SMD) Doc #97021 2/5/97 Powered by ICminer.com Electronic-Library Service CopyRight 2003 .005 .360 TYP. .065 TYP. .065 TYP. DDU66C-xxD4 (Commercial SMD) DDU66C-xxMD4 (Military SMD) DATA DELAY DEVICES, INC. 3 Mt. Prospect Ave. Clifton, NJ 07013 3 DDU66C DELAY LINE AUTOMATED TESTING TEST CONDITIONS INPUT: o o Ambient Temperature: 25 C ± 3 C Supply Voltage (VDD): 5.0V ± 0.1V Input Pulse: High = 5.0V ± 0.1V Low = 0.0V ± 0.1V Source Impedance: 50Ω Max. Rise/Fall Time: 5.0 ns Max. (measured between 0.5V and 4.5V ) Pulse Width: PWIN = 1.5 x Total Delay Period: PERIN = 10 x Total Delay OUTPUT: Load: Cload: Threshold: 1 FAST-TTL Gate 5pf ± 10% 2.5V (Rising & Falling) NOTE: The above conditions are for test only and do not in any way restrict the operation of the device. PRINTER COMPUTER SYSTEM REF PULSE GENERATOR OUT IN TRIG DEVICE UNDER TEST (DUT) T1 IN T2 TRIG TIME INTERVAL COUNTER T3 T4 T5 Test Setup PERIN PWIN TRISE INPUT SIGNAL TFALL VIH 4.5V 2.5V 0.5V 4.5V 2.5V 0.5V TRISE OUTPUT SIGNAL VIL TFALL VOH 2.5V 2.5V VOL Timing Diagram For Testing Doc #97021 Powered 2/5/97 by ICminer.com DATA DELAY DEVICES, INC. Tel: 973-773-2299 Fax: 973-773-9672 Electronic-Library Service CopyRight 2003 http://www.datadelay.com 4