FAIRCHILD DM74S240

Revised May 2000
DM74S240 • DM74S241 • DM74S244
Octal 3-STATE Buffer/Line Driver/Line Receiver
General Description
Features
These buffers/line drivers are designed to improve both the
performance and PC board density of 3-STATE buffers/
drivers employed as memory-address drivers, clock drivers, and bus-oriented transmitters/receivers. Featuring 400
mV of hysteresis at each low current PNP data line input,
they provide improved noise rejection and high fanout outputs, and can be used to drive terminated lines down to
133Ω.
■ 3-STATE outputs drive bus lines directly
■ PNP inputs reduce DC loading on bus lines
■ Hysteresis at data inputs improves noise margins
■ Typical IOL (sink current)
■ Typical IOH (source current)
64 mA
−15 mA
■ Typical propagation delay times
Inverting
4.5 ns
Noninverting
6 ns
■ Typical enable/disable times 9 ns
■ Typical power dissipation (enabled)
Inverting
450 mW
Noninverting
538 mW
Ordering Code:
Order Number
Package Number
Package Description
DM74S240N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DM74S241N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DM74S244N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Connection Diagrams
DM74S241N
DM74S240N
DM74S244N
© 2000 Fairchild Semiconductor Corporation
DS006478
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DM74S240 • DM74S241 • DM74S244 Octal 3-STATE Buffer/Line Driver/Line Receiver
August 1986
DM74S240 • DM74S241 • DM74S244
Absolute Maximum Ratings(Note 1)
Supply Voltage
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
7V
Input Voltage
5.5V
0°C to +70°C
Operating Free Air Temperature Range
−65°C to +150°C
Storage Temperature Range
Recommended Operating Conditions
Symbol
Parameter
Min
Typ
Max
Units
4.75
5
5.25
V
LOW Level Input Voltage
0.8
V
VCC
Supply Voltage
VIH
HIGH Level Input Voltage
VIL
2
V
IOH
HIGH Level Output Current
−15
mA
IOL
LOW Level Output Current
64
mA
TA
Free Air Operating Temperature
70
°C
0
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
Symbol
Parameter
Conditions
VI
Input Clamp Voltage
VCC = Min, II = −18 mA
Hys
Hysteresis (VT+ − VT−)
VCC = Min
Min
Typ
(Note 2)
Max
−1.2
0.2
Units
V
0.4
V
3.4
V
(Data Inputs Only)
VOH
HIGH Level
VCC = 4.75V, VIH = 2V
Output Voltage
VIL = 0.8V, IOH = −1 mA
2.7
VCC = Min, VIH = 2V
2.4
VIL = 0.8V, IOH = −3 mA
VCC = Min, VIH = 2V
2
VIL = 0.5V, IOH = Max
VOL
IOZH
IOZL
LOW Level
VCC = Min
IOL = Max
Output Voltage
VIL = 0.8V, VIH = 2V
Off-State Output Current,
VCC = Max VO = 2.4V
HIGH Level Voltage Applied
VIL = 0.8V
Off-State Output Current,
VIH = 2V
VO = 0.5V
LOW Level Voltage Applied
II
Input Current at Maximum
VCC = Max VI = 5.5V
0.55
V
50
µA
−50
µA
1
mA
50
µA
Input Voltage
IIH
HIGH Level Input Current
VCC = Max VI = 2.7V
IIL
LOW Level Input Current
VCC = Max VI = 0.5V
IOS
Short Circuit Output Current
VCC = Max (Note 3)
ICC
Supply
Outputs HIGH
Current
Outputs LOW
Outputs Disabled
Any A
−400
µA
Any G
−2
mA
−225
mA
−50
DM74S240
135
DM74S241, DM74244
95
160
DM74S240
100
150
DM74S241, DM74244
120
180
DM74S240
100
150
DM74S241, DM74S244
120
180
Note 2: All typical values are at VCC = 5V, TA = 25°C.
Note 3: Not more than one output should be shorted at a time and duration should not exceed one second.
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80
2
mA
VCC = 5V, TA = 25°C
Symbol
tPLH
tPHL
tPZL
tPZH
tPLZ
tPHZ
tPLH
tPHL
tPZL
tPZH
Min
Max
Propagation Delay Time
Parameter
CL = 45 pF
Conditions
DM74S240
2
7
LOW-to-HIGH Level Output
RL = 90Ω
DM74S241, DM74244
2
9
Propagation Delay Time
CL = 45 pF
DM74S240
2
7
HIGH-to-LOW Level Output
RL = 90Ω
DM74S241, DM74244
2
9
Output Enable Time to
CL = 45 pF
DM74S240
3
15
LOW Level
RL = 90Ω
DM74S241, DM74244
3
15
Output Enable Time to
CL = 45 pF
DM74S240
2
10
HIGH Level
RL= 90Ω
DM74S241, DM74244
3
12
Output Disable Time
CL = 5 pF
DM74S240
4
15
from Low Level
RL = 90Ω
DM74S241, DM74244
2
15
Output Disable Time
CL = 5 pF
DM74S240
2
9
from High Level
RL = 90Ω
DM74S241, DM74244
2
9
Propagation Delay Time
CL = 150 pF
DM74S240
3
10
LOW-to-HIGH Level Output
RL = 90Ω
DM74S241, DM74244
4
12
Propagation Delay Time
CL = 150 pF
DM74S240
3
10
HIGH-to-LOW Level Output
RL = 90Ω
DM74S241, DM74244
4
12
Output Enable Time to
CL = 150 pF
DM74S240
6
21
LOW Level
RL = 90Ω
DM74S241, DM74244
6
21
Output Enable Time to
CL = 150 pF
DM74S240
4
12
HIGH Level
RL = 90Ω
DM74S241, DM74244
4
15
3
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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DM74S240 • DM74S241 • DM74S244
Switching Characteristics
DM74S240 • DM74S241 • DM74S244 Octal 3-STATE Buffer/Line Driver/Line Receiver
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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