e1467D 32-kHz Clock CMOS IC with Digital Trimming and Alarm Features 32-kHz voltage regulated oscillator Output pulse formers 1.1 V to 2.2 V operating-voltage range Mask options for motor period and pulse width Integrated capacitors for digital trimming Low resistance output for bipolar stepping motor Suitable for up to 12.5 pF quartz Alarm function Trimming inputs insensitive to stray capacitance Motor-fast-test function Pad Configuration General Description ÏÏ Ï ÏÏ ÏÏ ÏÏ Ï ÏÏÏÏÏÏÏÏÏ Ï ÏÏ Ï Ï ÏÏ Ï ÏÏ Ï ÏÏ Ï SC4 SC3 SC2 SC1 VDD* 1 VSS 2 13 12 11 10 e 1467D 9 OSCIN 8 * OSCOUT 7 ALOUT **ALIN / MTEST 3 6 MOT2 **MOT1L 4 5 MOT1R The e1467D is an integrated circuit in CMOS Silicon Gate Technology for analog clocks. It consists of a 32-kHz oscillator, frequency divider, output pulse formers, push-pull motor drivers and alarm output. Integrated capacitors are mask-selectable to accomodate the external quartz crystal. Additional capacitance can be selected through pad bonding for trimming the oscillator frequency. 9611897 *) The pads for VDD and OSCOUT are interchangeable per mask option **) The pads for ALIN/-MTEST and MOT1L are interchangeable per mask-option Figure 4. Pad configuration Absolute Maximum Ratings Parameters Supply voltage Input voltage range, all inputs Output short circuit duration Power dissipation (DIL package) Operating ambient temperature range Storage temperature range Lead temperature during soldering at 2 mm distance, 10 seconds Symbol VSS VIN Ptot Tamb Tstg Tsld Value –0.3 to 5 V (VSS – 0.3 V) VIN (VDD + 0.3 V) indefinite 125 mW –20 to +70 –40 to + 125 260 Unit V V mW °C °C °C Absolute maximum ratings define parameter limits which, if exceeded, may permanently change or damage the device. electrostatic discharges. However, precautions to minimize the build-up of electrostatic charges during handling are recommended. All inputs and Microcontrollers’ This circuit is protected against supply voltage reversal for typically 5 minutes. Rev. A2, 15-Jan-01 outputs in Atmel Wireless & circuits are protected against 1 (6) e1467D Functional Description Oscillator An oscillator inverter with feedback resistor is provided for generation of the 32768 Hz clock frequency. Values for the fixed capacitors at OSCIN and OSCOUT are mask-selectable (see note 3 of operating characteristics). Four control inputs SC1 to SC4 enable the addition of integrated trimming capacitors to OSCIN and OSCOUT, providing 15 tuning steps. Trimming Capacitors A frequency variation of typ. 4 ppm for each tuning step is obtained by bonding the capacitor switch pads to VDD. As none of these pads are bonded, the IC is in an untrimmed state. Figure 5 shows the trimming curve characteristic. Note: For applications which utilize this integrated trimming feature, Atmel Wireless & Microcontrollers will determine optimum values for the integrated capacitors COSCIN and COSCOUT. The output is configured for npn and pnp bipolar capability. The output is an alarm tone modulated by a low frequency. Tone frequencies, modulation frequencies, and on/off times are selectable via the metal mask option. Alarm Input A debounced alarm input is provided. Alarm activation is either to VDD or VSS by a mask option. Test Functions For test purposes the ALIN/MTEST pad is open. With a high resistance probe (R 10 MC 20 pF), a test frequency fTEST of 128 Hz can be measured at the ALIN/ MTEST pad. Connecting ALIN/MTEST (for at least 32 ms) to the opposite polarity for alarm activation changes the motor period from the selected value to TMT (mask-selectable) while the pulse width remains unaffected. This feature can be used for testing the mechanical parts of the clock. Motor Drive Output Available motor periods (TM): 125, 250, 500 ms and 2, 16 s Available max. pulse widths (tM): 15, 6, 23.4, 31.25, 46.9 ms Available motor periods for motor test (TMT): 250, 500 ms and 1 s Note: The following constraints for combination of motor period and pulse widths have to be considered: TM 4 * tM, TMT 4 * tM or alternatively TM = 2 * tM, TMT = 2 * tM Alarm Outputs The alarm output driver consists of push-pull stage for driving a speaker via an external bipolar transistor. 2 (6) VDD VSS ALIN/ –MT VSS SC1 SC2 SC3 VDD SC4 The e1467D contains two push-pull output buffers for driving bipolar stepping motors. During a motor pulse, the n-channel device of one buffer and the p-channel device of the other buffer will be activated. Both n-channel transistor are on and conducting, between output pulses. The outputs are protected against inductive voltage spikes with diodes to both supply pins. The motor output period and pulse width are mask programmable, as listed below: Ï ÏÏÏÏÏÏÏ Ï Ï Ï Ï Ï Ï 1 13 12 11 10 9 2 8 e1467D 7 3 6 4 5 OSCIN R3 OSCOUT ALOUT MOT2 R1 MOT1R R2 MOT1L 9611896 Figure 5. Functional test Test Crystal Specification Oscillation frequency Series resistance Static capacitance Dynamic capacitance Load capacitance fOSC = 32768 Hz RS = 30 k CO = 1.5 pF C1 = 3.0 fF CL optionally 10 or 12.5 pF Rev. A2, 15-Jan-01 e1467D Operating Characteristics VSS = 0, VDD = 1.5 V, Tamb = +25°C, unless otherwise specified All voltage levels are measured with reference to VSS. Test crystal as specified below. Parameters Operating voltage Operating temperature Operating current Motor drive output Motor output current Motor period Motor period during motor test Motor pulse width Oscillator Startup voltage Frequency stability Integrated input capacitance Integrated output capacitance Input current SC1 to SC4 Alarm/output Output current for driving npn-transistor n-channel p-channel Output current for driving pnp-transistor n-channel p-channel Alarm options Tone frequency Modulation frequency On/Off time Alarm input/motor test Input current Input current Input debounce delay Note 1: Note 2: Note 3: Note 4: Note 5: Test Conditions / Pins R1 = ∞, note 2 VDD = 1.2 V, R1 = 200 Symbol VDD Tamb IDD Min. 1.1 –20 IM TM TMT 4.3 1 tM Within 2 s VDD = 100 mV VDD = 1.1 to 2.2 V Note 3 VIN = 0.2 V VIN = VDD, note 5 VSTART f/f COSCIN COSCOUT ISCINL ISCINH Typ. 1.5 Max. 2.2 +70 3 Unit V °C A See option list See option list mA s ms See option list ms 1.2 2.2 0.2 V ppm See option list See option list 1 5 25 0.05 0.15 0.5 pF pF A A A mA 0.1 VDD = 1.2 V R3 = 100 k R2 = 1 k, note 2, note 4 VDD = 1.2 V IANn IANp 1 –0.5 3 –1 R3 = 1 k R2 = 100 k, note 2, note 4 IAPn IAPp 0.5 –1 1 –2 fA fMOD tON/tOFF ALIN = VDD, peak current ALIN = VSS, peak current IAINH IAINL tAIN 10 –10 See option list See option list See option list 0.6 –0.6 23.4 3 –3 mA A Hz Hz s 10 –10 31.2 A A ms Typical parameters represent the statistical mean values See test circuit Values can be selected in 1 pF steps. A total capacitance (COSCIN + COSCOUT) of 38 pF is available npn or pnp driving transistors defined by mask options ISCINH is the peak current of a pulsed current with duty cycle 1:63. Average current is always smaller than 10 nA Rev. A2, 15-Jan-01 3 (6) e1467D a VDD ALIN/ MT VSS VDD MOT1 VSS tM TMT TM VDD MOT2 VSS Motor output signal during normal mode and motortest Detail a: 1/fTEST 9611898 Figure 6. Motor output signal during normal operation and during motor test T < tAIN T > tAIN T < tV4 T > tV4 VDD ALIN / MTEST VSS b VDD ALOUT VSS tON tOFF Signal on alarm input and alarm output during alarm activation Detail b: VDD VSS 1/fA 1/fMOD Alarm output signal 9611899 Figure 7. Alarm operation 4 (6) Rev. A2, 15-Jan-01 e1467D 2.00006 COX = 2.00005 1.05 2.00004 1.00 2.00003 0.95 2.00002 Motorperiod (s) 2.00001 2.00000 1.99999 1.99998 1.99997 1.99996 1.99995 1.99994 1.99993 1.99992 1.99991 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Trimming steps 15 9611900 Figure 8. Typical trimming curve characteristic for TM of 2 s COX means frequency deviation due to production process variations. Trimming inputs SC1 ... SC4 are binary weighted, i.e., SC1 ... SC4 = 0 corresponds to trimming step 0 SC1 ... SC4 = 1 corresponds to trimming step 15 LSB = SC1 Rev. A2, 15-Jan-01 5 (6) e1467D Ordering Information Table 4. Option list e1267D– Option –B Motor Alarm Cycle (TM) s Pulse (tM) ms Test (TMT) ms Frequency 2 23.4 250 Load Cap. On/ Off Time s Driver Type Activation Polarity Hz Modulation Frequency Hz 2048 8 0.5/ 0.5 NPN VSS Integrated Capacitance pF COSCIN *) pF COSCOUT *) pF 10 17 12 –D 2 31.25 250 2048 8 0.5/ 0.5 NPN VDD 10 17 12 –V2 0.5 23.4 250 2048 8 0.5/ 0.5 NPN VSS 12.5 20 16 E2 2 46.9 250 2048 8 1/ 3 NPN VSS 12.5 20 16 *) on-chip stray capacitance included Option Pad Designation Pad 1 Pad 2 Pad 3 Pad 4 Pad 5 Pad 6 Pad 7 Pad 8 Pad 9 Pad 10 Pad 11 Pad 12 Pad 13 –B OSCIN VDD ALOUT MOT2 MOT1 MOT1 ALIN/ MTEST VSS OSCOUT SC4 SC3 SC2 SC1 –D OSCIN OSCOUT ALOUT MOT2 MOT1 MOT1 ALIN/ MTEST VSS VDD SC4 SC3 SC2 SC1 –V2 OSCIN VDD ALOUT MOT2 MOT1 MOT1 ALIN/ MTEST VSS OSCOUT SC4 SC3 SC2 SC1 –D OSCIN OSCOUT ALOUT MOT2 MOT1 ALIN/ TEST MOT1 VSS VDD SC4 SC3 SC2 SC1 We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Atmel Wireless & Microcontrollers products for any unintended or unauthorized application, the buyer shall indemnify Atmel Wireless & Microcontrollers against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Data sheets can also be retrieved from the Internet: http://www.atmel–wm.com Atmel Germany GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2594, Fax number: 49 (0)7131 67 2423 6 (6) Rev. A2, 15-Jan-01