EL2126 ® Data Sheet April 16, 2007 Ultra-Low Noise, Low Power, Wideband Amplifier The EL2126 is an ultra-low noise, wideband amplifier that runs on half the supply current of competitive parts. It is intended for use in systems such as ultrasound imaging where a very small signal needs to be amplified by a large amount without adding significant noise. Its low power dissipation enables it to be packaged in the tiny SOT-23 package, which further helps systems where many input channels create both space and power dissipation problems. The EL2126 is stable for gains of 10 and greater and uses traditional voltage feedback. This allows the use of reactive elements in the feedback loop, a common requirement for many filter topologies. It operates from ±2.5V to ±15V supplies and is available in the 5 Ld SOT-23 and 8 Ld SO packages. The EL2126 is fabricated in Elantec’s proprietary complementary bipolar process, and is specified for operation over the full -40°C to +85°C temperature range. FN7046.3 Features • Voltage noise of only 1.3nV/÷Hz • Current noise of only 1.2pA/÷Hz • 200µV offset voltage • 100MHz -3dB BW for AV = 10 • Very low supply current - 4.7mA • SOT-23 package • ±2.5V to ±15V operation • Pb-free plus anneal available (RoHS compliant) Applications • Ultrasound input amplifiers • Wideband instrumentation • Communication equipment • AGC & PLL active filters • Wideband sensors Pinouts EL2126 (5 LD SOT-23) TOP VIEW OUT 1 5 VS+ VS- 2 + - IN+ 3 4 IN- EL2126 (8 LD SO) TOP VIEW 8 NC NC 1 IN- 2 IN+ 3 7 VS+ + 6 OUT 5 NC VS- 4 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2002, 2005, 2007. All Rights Reserved All other trademarks mentioned are the property of their respective owners. EL2126 Ordering Information Part Number PART MARKING TEMP RANGE (°c) Tape & Reel Package pkg. dWG. # EL2126CW-T7 G -40 to +85 7” (3K pcs) 5 Ld SOT-23 MDP0038 EL2126CW-T7A G -40 to +85 7” (250 pcs) 5 Ld SOT-23 MDP0038 EL2126CS 2126CS -40 to +85 - 8 Ld SOIC MDP0027 EL2126CS-T7 2126CS -40 to +85 7” 8 Ld SOIC MDP0027 EL2126CS-T13 2126CS -40 to +85 13” 8 Ld SOIC MDP0027 EL2126CSZ ( Note) 2126CSZ -40 to +85 - 8 Ld SOIC (Pb-free) MDP0027 EL2126CSZ-T7 ( Note) 2126CSZ -40 to +85 7” 8 Ld SOIC (Pb-free) MDP0027 EL2126CSZ-T13 ( Note) 2126CSZ -40 to +85 13” 8 Ld SOIC (Pb-free) MDP0027 EL2126CWZ-T7 (Note) BAAH -40 to +85 7” 5 Ld SOT-23 P5.064 EL2126CWZ-T7A (Note) BAAH -40 to +85 7” 5 Ld SOT-23 P5.064 NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 2 FN7046.3 April 16, 2007 EL2126 Absolute Maximum Ratings Thermal Information VS+ to VS-) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33V Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 40mA Any Input . . . . . . . . . . . . . . . . . . . . . . . . . . VS+ - 0.3V to VS- + 0.3V Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-60°C to +150°C Maximum Die Junction Temperature . . . . . . . . . . . . . . . . . . . +150°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications Parameter VS+ = +5V, VS- = -5V, TA = +25°C, RF = 180Ω, RG = 20Ω, RL = 500Ω unless otherwise specified. Description Conditions Min Typ Max Unit 0.2 2 mV 3 mV DC PERFORMANCE VOS Input Offset Voltage (SO8) Input Offset Voltage (SOT23-5) TCVOS Offset Voltage Temperature Coefficient IB Input Bias Current IOS Input Bias Current Offset 0.06 TCIB Input Bias Current Temperature Coefficient 0.013 µA/°C CIN Input Capacitance 2.2 pF AVOL Open Loop Gain 80 87 dB PSRR Power Supply Rejection Ratio (Note 1) 80 100 dB CMRR Common Mode Rejection Ratio 75 106 dB CMIR Common Mode Input Range VOUTH Positive Output Voltage Swing No load, RF = 1kΩ VOUTL Negative Output Voltage Swing No load, RF = 1kΩ VOUTH2 Positive Output Voltage Swing RL = 100Ω VOUTL2 Negative Output Voltage Swing RL = 100Ω IOUT Output Short Circuit Current (Note 2) ISY Supply Current -10 VO = -2.5V to +2.5V at CMIR 17 µV/°C -7 µA -4.6 3.8 3.8 3.8 -4 3.2 -3.9 V V V -3.2 100 4.7 µA V 3.45 -3.5 80 0.6 V mA 5.5 mA AC PERFORMANCE - RG = 20Ω, CL = 3pF BW -3dB Bandwidth, RL = 500Ω 100 MHz BW ±0.1dB ±0.1dB Bandwidth, RL = 500Ω 17 MHz BW ±1dB ±1dB Bandwidth, RL = 500Ω 80 MHz Peaking Peaking, RL = 500Ω 0.6 dB SR Slew Rate VOUT = 2VP-P, measured at 20% to 80% 110 V/µs OS Overshoot, 4VP-P Output Square Wave Positive 2.8 % Negative -7 % 51 ns tS Settling Time to 0.1% of ±1V Pulse 3 80 FN7046.3 April 16, 2007 EL2126 Electrical Specifications Parameter VS+ = +5V, VS- = -5V, TA = +25°C, RF = 180Ω, RG = 20Ω, RL = 500Ω unless otherwise specified. (Continued) Description Conditions Min Typ Max Unit VN Voltage Noise Spectral Density 1.3 nV/√Hz IN Current Noise Spectral Density 1.2 pA/√Hz HD2 2nd Harmonic Distortion (Note 3) -70 dBc HD3 3rd Harmonic Distortion (Note 3) -70 dBc NOTES: 1. Measured by moving the supplies from ±4V to ±6V 2. Pulse test only and using a 10Ω load 3. Frequency = 1MHz, VOUT = 2VP-P, into 500Ω and 5pF load VS+ = +15V, VS- = -15V, TA = 25°C, RF = 180Ω, RG = 20Ω, RL = 500Ω unless otherwise specified. Electrical Specifications Parameter Description Conditions Min Typ Max Unit 0.5 3 mV 3 mV DC PERFORMANCE VOS Input Offset Voltage (SO8) Input Offset Voltage (SOT23-5) TCVOS Offset Voltage Temperature Coefficient IB Input Bias Current IOS Input Bias Current Offset 0.12 TCIB Input Bias Current Temperature Coefficient 0.016 µA/°C CIN Input Capacitance 2.2 pF AVOL Open Loop Gain 80 90 dB PSRR Power Supply Rejection Ratio (Note 4) 65 80 dB CMRR Common Mode Rejection Ratio 70 85 dB CMIR Common Mode Input Range VOUTH Positive Output Voltage Swing No load, RF = 1kΩ VOUTL Negative Output Voltage Swing No load, RF = 1kΩ VOUTH2 Positive Output Voltage Swing RL = 100Ω, RF = 1kΩ VOUTL2 Negative Output Voltage Swing RL = 100Ω, RF = 1kΩ IOUT Output Short Circuit Current (Note 5) ISY Supply Current -10 at CMIR 4.5 µV/°C -7 µA -14.6 13.6 13.8 13.7 -13.8 10.2 -13.7 V V V -9.5 220 5 µA V 11.2 -10.3 140 0.7 V mA 6 mA AC PERFORMANCE - RG = 20Ω, CL = 3pF BW -3dB Bandwidth, RL = 500Ω 135 MHz BW ±0.1dB ±0.1dB Bandwidth, RL = 500Ω 26 MHz BW ±1dB ±1dB Bandwidth, RL = 500Ω 60 MHz Peaking Peaking, RL = 500Ω 2.1 dB SR Slew Rate (±2.5V Square Wave, Measured 25%-75%) 150 V/µS OS Overshoot, 4VP-P Output Square Wave Positive 1.6 % Negative -4.4 % 48 ns TS Settling Time to 0.1% of ±1V Pulse 4 130 FN7046.3 April 16, 2007 EL2126 VS+ = +15V, VS- = -15V, TA = 25°C, RF = 180Ω, RG = 20Ω, RL = 500Ω unless otherwise specified. (Continued) Electrical Specifications Parameter Description Conditions Min Typ Max Unit VN Voltage Noise Spectral Density 1.4 nV/√Hz IN Current Noise Spectral Density 1.1 pA/√Hz HD2 2nd Harmonic Distortion (Note 6) -72 dBc HD3 3rd Harmonic Distortion (Note 6) -73 dBc NOTES: 4. Measured by moving the supplies from ±13.5V to ±16.5V 5. Pulse test only and using a 10Ω load 6. Frequency = 1MHz, VOUT = 2VP-P, into 500Ω and 5pF load 5 FN7046.3 April 16, 2007 EL2126 Typical Performance Curves Non-Inverting Frequency Response for Various RF Non-Inverting Frequency Response for Various RF 6 10 VS=±5V AV=10 CL=5pF RL=500Ω RF=1kΩ Normalized Gain (dB) Normalized Gain (dB) 10 RF=500Ω 2 -2 RF=180Ω -6 RF=100Ω -10 1M 10M 6 VS=±15V AV=10 CL=5pF RL=500Ω -2 RF=180Ω RF=100Ω -6 Frequency (Hz) Inverting Frequency Response for Various RF Inverting Frequency Response for Various RF RF=500Ω RF=1kΩ Normalized Gain (dB) Normalized Gain (dB) VS=±5V AV=-10 CL=5pF RL=500Ω RF=350Ω RF=200Ω -4 RF=100Ω -8 -12 1M 10M 4 VS=±15V AV=-10 CL=5pF RL=500Ω RF=350Ω RF=200Ω -4 RF=100Ω -8 -12 1M 100M RF=1kΩ RF=500Ω 0 Frequency (Hz) 10M 100M Frequency (Hz) Non-Inverting Frequency Response for Various Gain Non-Inverting Frequency Response for Various Gain 10 10 VS=±5V RG=20Ω RL=500Ω CL=5pF 2 AV=10 AV=20 -2 AV=50 -6 -10 1M 10M Frequency (Hz) 6 100M Normalized Gain (dB) Normalized Gain (dB) 100M 8 0 6 10M Frequency (Hz) 8 4 RF=500Ω 2 -10 1M 100M RF=1kΩ 6 VS=±15V RG=20Ω RL=500Ω CL=5pF AV=10 2 AV=20 -2 AV=50 -6 -10 1M 10M 100M Frequency (Hz) FN7046.3 April 16, 2007 EL2126 Typical Performance Curves (Continued) Inverting Frequency Response for Various Gain Inverting Frequency Response for Various RF 4 8 VS=±5V CL=5pF RG=35Ω 0 Normalized Gain (dB) Normalized Gain (dB) 8 AV=-10 -4 AV=-50 AV=-20 -8 -12 1M 10M 4 VS=±15V CL=5pF RG=20Ω 0 AV=-10 -4 AV=-50 -12 1M 100M 10M Frequency (Hz) Non-Inverting Frequency Response for Various Output Signal Levels Non-Inverting Frequency Response for Various Output Signal Levels VS=±5V CL=5pF RL=500Ω RF=180Ω AV=10 VO=500mVPP -4 VO=30mVPP VO=5VPP VO=2.5VPP -8 Normalized Gain (dB) Normalized Gain (dB) 10 0 VO=1VPP -12 1M 10M VS=±15V CL=5pF RL=500Ω RF=180Ω AV=10 100M VO=30mVPP VO=500mVPP 2 VO=1VPP -2 VO=10VPP VO=5VPP -6 VO=2.5VPP 10M 100M Frequency (Hz) Frequency (Hz) Inverting Frequency Response for Various Output Signal Levels Inverting Frequency Response for Various Output Signal Levels 8 VS=±5V CL=5pF RL=500Ω RF=350Ω AV=10 VO=500mVPP VO=1VPP VO=30mVPP 0 VO=3.4VPP -4 VO=2.5VPP -8 -12 1M 10M Frequency (Hz) 7 100M Normalized Gain (dB) Normalized Gain (dB) 6 -10 1M 8 4 100M Frequency (Hz) 8 4 AV=-20 -8 4 VS=±15V CL=5pF RL=500Ω RF=200Ω AV=10 VO=500mVPP VO=1VPP VO=30mVPP 0 -4 -8 -12 1M VO=3.4VPP VOV=2.5V O=2.5V PPP 10M 100M Frequency (Hz) FN7046.3 April 16, 2007 EL2126 Typical Performance Curves (Continued) Non-Inverting Frequency Response for Various CL Non-Inverting Frequency Response for Various CL 10 VS=±5V RF=150Ω AV=10 RL=500Ω 6 CL=28pF CL=11pF 2 Normalized Gain (dB) Normalized Gain (dB) 10 CL=16pF CL=5pF -2 CL=1pF -6 -10 1M 10M VS=±15V RF=180Ω AV=10 RL=500Ω 6 CL=5pF CL=1.2pF -6 10M 100M Frequency (Hz) Inverting Frequency Response for Various CL Inverting Frequency Response for Various CL 8 8 VS=±5V RF=350Ω RL=500Ω AV=-10 CL=28pF CL=16pF Normalized Gain (dB) Normalized Gain (dB) CL=16pF -2 Frequency (Hz) 4 CL=11pF 2 -10 1M 100M CL=28pF 0 CL=11pF -4 CL=5pF CL=1.2pF -8 -12 1M 10M 4 VS=±15V RF=200Ω RL=500Ω AV=-10 0 CLC=11pF L=11p -4 CL=5pF CL=1.2pF -8 -12 1M 100M CL=28pF CL=16pF Frequency (Hz) 10M 100M Frequency (Hz) Open Loop Gain/Phase Supply Current vs Supply Voltage 100 250 Phase 60 50 40 -50 20 -150 VS=±5V 0 10k 100k 1M 10M Frequency (Hz) 8 100M -250 1G Supply Current (mA) 150 Open Loop Phase (°) Open Loop Gain (dB) Gain 80 0.6/div 0 0 1.5/div Supply Voltage (V) FN7046.3 April 16, 2007 EL2126 Typical Performance Curves (Continued) Bandwidth vs Vs Peaking vs Vs 160 3.0 VS=±5V RG=20Ω RL=500Ω CL=5pF -3dB Bandwidth 120 AV=-10 AV=10 100 80 AV=-20 60 40 AV=-20 AV=50 0 0 2 4 6 8 10 12 14 2.0 AV=10 1.5 1.0 0.5 AV=-50 20 VS=±5V RG=20Ω RL=500Ω CL=5pF 2.5 Peaking (dB) 140 AV=-10 0 16 0 2 4 6 8 12 10 14 16 ±Supply Voltage (V) ±VS (V) Small Signal Step Response Large Signal Step Response RF=180Ω VS=±5V RG=20Ω VO=2VPP 0.5V/div 20mV/div RF=180Ω RG=20Ω VS=±5V VO=100mV 10ns/div 10ns/div 1MHz Harmonic Distortion vs Output Swing 1MHz Harmonic Distortion vs Output Swing -30 VS=±5V VO=2VP-P RF=180Ω AV=10 RL=500Ω -50 -60 Harmonic Distortion (dBc) Harmonic Distortion (dBc) -40 2nd HD -70 -80 3rd HD -90 -100 VS=±5V VO=2VP-P RF=180Ω AV=10 RL=500Ω -40 -50 2nd HD -60 -70 3rd HD -80 -90 -100 0 1 2 3 4 5 VOUT (VP-P) 9 6 7 8 0 5 10 15 20 25 VOUT (VP-P) FN7046.3 April 16, 2007 EL2126 Typical Performance Curves (Continued) Total Harmonic Distortion vs Frequency Noise vs Frequency -20 10 VS=±5V VO=2VP-P IN (pA/√Hz), VN (nV/√Hz) -30 THD (dBc) -40 -50 -60 -70 IN, VS=±5V VN, VS=±15V VN, VS=±5V -80 -90 1k 100k 10k 1M 10M 1 10 100M IN, VS=±15V 10k 100k 100M 400M Frequency (Hz) Settling Time vs Accuracy Group Delay vs Frequency 70 16 VS = ±5 V ,V VS = 50 O =5V P- P ±15 V, V 40 VS = ±5 V ,V 30 VS = 20 ±15V ,V VS=±5V RL=500Ω 12 Group Delay (ns) 60 Settling Time (ns) 1k 100 Frequency (Hz) O =5V P-P O =2V P-P O =2V P-P AV=10 8 4 AV=-10 0 10 0 0.1 1.0 -4 1M 10.0 10M Accuracy (%) Frequency (Hz) CMRR vs Frequency PSRR vs Frequency -10 110 -30 90 PSRR (dB) CMRR (dB) VS=±5V -50 -70 -90 -110 10 PSRR- 70 50 PSRR+ 30 100 1k 10k 100k Frequency (Hz) 10 1M 10M 100M 10 10k 100k 1M 10M 200M Frequency (Hz) FN7046.3 April 16, 2007 EL2126 (Continued) Closed Loop Output Impedance vs Frequency Bandwidth and Peaking vs Temperature 100 3.5 VS=±5V VS=±5V 10 1 2.5 Bandwidth 80 2 60 1.5 1 40 Peaking 0.1 0.5 20 0.01 10k 1M 100k 100M 10M 0 0 -40 -0.5 40 0 Frequency (Hz) 80 120 160 Temperature Slew Rate vs Swing Supply Current vs Temperature 220 5.2 15VSR- 200 180 VS=±15V 5.1 160 15VSR+ IS (mA) Slew Rate (V/µs) 3 100 Bandwidth (MHz) Closed Loop Output Impedance (Ω) 120 Peaking (dB) Typical Performance Curves 140 120 5 5VSR- 100 VS=±5V 4.9 5VSR+ 80 60 -1 1 3 5 7 9 11 13 4.8 -50 15 0 VOUT Swing (VPP) 50 100 150 100 150 Die Temperature (°C) CMRR vs Temperature Offset Voltage vs Temperature 1 120 VS=±5V 110 CMRR (dB) VOS (mV) 0 VS=±15V VS=±5V 100 -1 90 -2 -50 0 50 Die Temperature (°C) 11 100 150 80 -50 0 50 Die Temperature (°C) FN7046.3 April 16, 2007 EL2126 Typical Performance Curves (Continued) Positive Output Swing vs Temperature PSRR vs Temperature 110 4.05 106 VOUTH (V) PSRR (dB) 4 VS=±5V 102 98 94 3.95 VS=±5V 3.9 90 VS=±15V 3.85 86 82 -50 0 50 100 3.8 -50 150 0 50 100 150 Die Temperature (°C) Die Temperature (°C) Positive Output Swing vs Temperature Negative Output Swing vs Temperature -3.9 13.85 -3.95 13.8 VOUTL (V) VOUTH (V) -4 VS=±15V 13.75 13.7 VS=±5V -4.05 -4.1 -4.15 13.65 -4.2 13.6 -50 0 50 100 -4.25 -50 150 0 Die Temperature (°C) 50 100 150 100 150 Die Temperature (°C) Negative Output Swing vs Temperature Slew Rate vs Temperature -13.76 102 Slew Rate (V/µs) 100 VOUTL (V) -13.78 VS=±15V -13.8 VS=±5V 98 96 94 92 90 -13.82 -50 0 50 Die Temperature (°C) 12 100 150 88 -50 0 50 Die Temperature (°C) FN7046.3 April 16, 2007 EL2126 Typical Performance Curves (Continued) Slew Rate vs Temperature Positive Loaded Output Swing vs Temperature 155 3.52 3.5 VS=±15V VOUTH2 (V) SR (V/µs) 150 145 140 VS=±5V 3.48 3.46 135 -50 VO=2VPP 0 50 100 3.44 -50 150 0 50 Die Temperature (°C) Positive Loaded Output Swing vs Temperature -3.35 11.6 -3.4 VS=±15V VOUTL2 (V) 11.4 SR (V/µs) 150 Negative Loaded Output Swing vs Temperature 11.8 11.2 11 -3.45 -3.5 VS=±5V 3.55 10.8 10.6 -50 0 50 100 -3.6 -50 150 0 50 Die Temperature (°C) -9.6 1 Power Dissipation (W) 1.2 VS=±15V -10 -10.2 781mW 0.8 θJ A= + SO 8 16 0.6 488mW 0.4 0° C /W SO θJ T23 -5 56° C/W A =+2 0.2 -10.4 0 0 50 100 150 25 0 Die Temperature (°C) 50 75 85 100 125 150 Ambient Temperature (°C) Package Power Dissipation vs Ambient Temperature JEDEC JESD51-7 High Effective Thermal Conductivity Test Board 1.8 1.6 Power Dissipation (W) -10.6 -50 150 Package Power Dissipation vs Ambient Temperature JEDEC JESD51-3 Low Effective Thermal Conductivity Test Board -9.4 -9.8 100 Die Temperature (°C) Negative Loaded Output Swing vs Temperature VOUTL2 (V) 100 Die Temperature (°C) 1.4 1.2 1.136W SO 8 11 0°C /W 0.6 543mW S OT 23-5 θJ = 0.4 A +23 0°C/W 0.2 θJ 1 0.8 A =+ 0 0 25 50 75 85 100 125 150 Ambient Temperature (°C) 13 FN7046.3 April 16, 2007 EL2126 Pin Descriptions EL2126CW (5 ld SOT-23) EL2126CS (8 ld SO) Pin Name Pin Function 1 6 VOUT Output Equivalent Circuit VS+ VOUT Circuit 1 2 4 VS- Supply 3 3 VINA+ Input VS+ VIN+ VIN- VSCircuit 2 4 2 VINA- Input 5 7 VS+ Supply 14 Reference Circuit 2 FN7046.3 April 16, 2007 EL2126 Applications Information Noise Calculations Product Description The EL2126 is an ultra-low noise, wideband monolithic operational amplifier built on Elantec's proprietary high speed complementary bipolar process. It features 1.3nV/√Hz input voltage noise, 200µV typical offset voltage, and 73dB THD. It is intended for use in systems such as ultrasound imaging where very small signals are needed to be amplified. The EL2126 also has excellent DC specifications: 200µV VOS, 22µA IB, 0.4µA IOS, and 106dB CMRR. These specifications allow the EL2126 to be used in DC-sensitive applications such as difference amplifiers. The primary application for the EL2126 is to amplify very small signals. To maintain the proper signal-to-noise ratio, it is essential to minimize noise contribution from the amplifier. Figure 2 below shows all the noise sources for all the components around the amplifier. VIN R3 VN + - I N+ VR1 I N- Gain-Bandwidth Product VON R1 VR2 R2 The EL2126 has a gain-bandwidth product of 650MHz at ±5V. For gains less than 20, higher-order poles in the amplifier's transfer function contribute to even higher closedloop bandwidths. For example, the EL2126 has a -3dB bandwidth of 100MHz at a gain of 10 and decreases to 33MHz at gain of 20. It is important to note that the extra bandwidth at lower gain does not come at the expenses of stability. Even though the EL2126 is designed for gain ≥ 10. With external compensation, the device can also operate at lower gain settings. The RC network shown in Figure 1 reduces the feedback gain at high frequency and thus maintains the amplifier stability. R values must be less than RF divided by 9 and 1 divided by 2πRC must be less than 200MHz. RF + FIGURE 2. VN is the amplifier input voltage noise IN+ is the amplifier positive input current noise IN- is the amplifier negative input current noise VRX is the thermal noise associated with each resistor: V RX = 4kTRx (EQ. 1) where: k is Boltzmann's constant = 1.380658 x 10-23 T is temperature in degrees Kelvin (273+ °C) R C VR3 VOUT The total noise due to the amplifier seen at the output of the amplifier can be calculated by using the Equation 2. VIN FIGURE 1. Choice of Feedback Resistor, RF The feedback resistor forms a pole with the input capacitance. As this pole becomes larger, phase margin is reduced. This increases ringing in the time domain and peaking in the frequency domain. Therefore, RF has some maximum value which should not be exceeded for optimum performance. If a large value of RF must be used, a small capacitor in the few pF range in parallel with RF can help to reduce this ringing and peaking at the expense of reducing the bandwidth. Frequency response curves for various RF values are shown in the typical performance curves section of this data sheet. V ON = As the equation shows, to keep noise at a minimum, small resistor values should be used. At higher amplifier gain configuration where R2 is reduced, the noise due to IN-, R2, and R1 decreases and the noise caused by IN+, VN, and R3 starts to dominate. Because noise is summed in a rootmean-squares method, noise sources smaller than 25% of the largest noise source can be ignored. This can greatly simplify the formula and make noise calculation much easier to calculate. R 1⎞ 2 R 1⎞ 2 R 1⎞ 2⎞ ⎛ R 1⎞ 2 ⎛ ⎛ 2 2 ⎛ 2 ⎛ 2 2 BW × ⎜ VN × ⎜ 1 + -------⎟ + IN- × R 1 + IN+ × R 3 × ⎜ 1 + -------⎟ + 4 × K × T × R 1 + 4 × K × T × R 2 × ⎜ -------⎟ + 4 × K × T × R 3 × ⎜ 1 + -------⎟ ⎟ R 2⎠ R 2⎠ R 2⎠ ⎠ ⎝ R 2⎠ ⎝ ⎝ ⎝ ⎝ (EQ. 2) 15 FN7046.3 April 16, 2007 EL2126 Output Drive Capability The EL2126 is designed to drive low impedance load. It can easily drive 6VP-P signal into a 100Ω load. This high output drive capability makes the EL2126 an ideal choice for RF, IF, and video applications. Furthermore, the EL2126 is current-limited at the output, allowing it to withstand momentary short to ground. However, the power dissipation with output-shorted cannot exceed the power dissipation capability of the package. Driving Cables and Capacitive Loads Although the EL2126 is designed to drive low impedance load, capacitive loads will decreases the amplifier's phase margin. As shown in the performance curves, capacitive load can result in peaking, overshoot and possible oscillation. For optimum AC performance, capacitive loads should be reduced as much as possible or isolated with a series resistor between 5Ω to 20Ω. When driving coaxial cables, double termination is always recommended for reflection-free performance. When properly terminated, the capacitance of the coaxial cable will not add to the capacitive load seen by the amplifier. Power Supply Bypassing And Printed Circuit Board Layout As with any high frequency devices, good printed circuit board layout is essential for optimum performance. Ground plane construction is highly recommended. Lead lengths should be kept as short as possible. The power supply pins must be closely bypassed to reduce the risk of oscillation. The combination of a 4.7µF tantalum capacitor in parallel 16 with 0.1µF ceramic capacitor has been proven to work well when placed at each supply pin. For single supply operation, where pin 4 (VS-) is connected to the ground plane, a single 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor across pins 7 (VS+) and pin 4 (VS-) will suffice. For good AC performance, parasitic capacitance should be kept to a minimum. Ground plane construction again should be used. Small chip resistors are recommended to minimize series inductance. Use of sockets should be avoided since they add parasitic inductance and capacitance which will result in additional peaking and overshoot. Supply Voltage Range and Single Supply Operation The EL2126 has been designed to operate with supply voltage range of ±2.5V to ±15V. With a single supply, the EL2126 will operate from +5V to +30V. Pins 4 and 7 are the power supply pins. The positive power supply is connected to pin 7. When used in single supply mode, pin 4 is connected to ground. When used in dual supply mode, the negative power supply is connected to pin 4. As the power supply voltage decreases from +30V to +5V, it becomes necessary to pay special attention to the input voltage range. The EL2126 has an input voltage range of 0.4V from the negative supply to 1.2V from the positive supply. So, for example, on a single +5V supply, the EL2126 has an input voltage range which spans from 0.4V to 3.8V. The output range of the EL2126 is also quite large, on a +5V supply, it swings from 0.4V to 3.8V. FN7046.3 April 16, 2007 EL2126 Small Outline Package Family (SO) A D h X 45° (N/2)+1 N A PIN #1 I.D. MARK E1 E c SEE DETAIL “X” 1 (N/2) B L1 0.010 M C A B e H C A2 GAUGE PLANE SEATING PLANE A1 0.004 C 0.010 M C A B L b 0.010 4° ±4° DETAIL X MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL SO-14 SO16 (0.300”) (SOL-16) SO20 (SOL-20) SO24 (SOL-24) SO28 (SOL-28) TOLERANCE NOTES A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX - A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 - A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 - b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 - c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 - D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3 E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 - E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3 e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic - L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 - L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic - h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference - 16 20 24 28 Reference - N SO-8 SO16 (0.150”) 8 14 16 Rev. M 2/07 NOTES: 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994 17 FN7046.3 April 16, 2007 EL2126 Small Outline Transistor Plastic Packages (SOT23-5) P5.064 D 5 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE VIEW C e1 INCHES 5 SYMBOL 4 E CL 1 2 CL 3 e E1 b CL α 0.20 (0.008) M C C CL A A2 SEATING PLANE A1 -C- WITH b PLATING b1 c c1 MILLIMETERS MAX MIN MAX NOTES A 0.036 0.057 0.90 1.45 - A1 0.000 0.0059 0.00 0.15 - A2 0.036 0.051 0.90 1.30 - b 0.012 0.020 0.30 0.50 - b1 0.012 0.018 0.30 0.45 c 0.003 0.009 0.08 0.22 6 c1 0.003 0.008 0.08 0.20 6 D 0.111 0.118 2.80 3.00 3 E 0.103 0.118 2.60 3.00 - E1 0.060 0.067 1.50 1.70 3 e 0.0374 Ref 0.95 Ref - e1 0.0748 Ref 1.90 Ref - L 0.10 (0.004) C MIN 0.014 0.022 0.35 0.55 L1 0.024 Ref. 0.60 Ref. L2 0.010 Ref. 0.25 Ref. N 5 5 4 5 R 0.004 - 0.10 - R1 0.004 0.010 0.10 0.25 α 0o 8o 0o 8o Rev. 2 9/03 NOTES: BASE METAL 1. Dimensioning and tolerance per ASME Y14.5M-1994. 2. Package conforms to EIAJ SC-74 and JEDEC MO178AA. 4X θ1 3. Dimensions D and E1 are exclusive of mold flash, protrusions, or gate burrs. R1 4. Footlength L measured at reference to gauge plane. 5. “N” is the number of terminal positions. R GAUGE PLANE SEATING PLANE L C L1 α L2 6. These Dimensions apply to the flat section of the lead between 0.08mm and 0.15mm from the lead tip. 7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only. 4X θ1 VIEW C 18 FN7046.3 April 16, 2007 EL2126 SOT-23 Package Family MDP0038 e1 SOT-23 PACKAGE FAMILY D A MILLIMETERS 6 N SYMBOL 4 E1 2 E 3 0.15 C D 1 2X 2 3 0.20 C 5 2X e 0.20 M C A-B D B b NX 0.15 C A-B 1 3 SOT23-5 SOT23-6 TOLERANCE A 1.45 1.45 MAX A1 0.10 0.10 ±0.05 A2 1.14 1.14 ±0.15 b 0.40 0.40 ±0.05 c 0.14 0.14 ±0.06 D 2.90 2.90 Basic E 2.80 2.80 Basic E1 1.60 1.60 Basic e 0.95 0.95 Basic e1 1.90 1.90 Basic L 0.45 0.45 ±0.10 L1 0.60 0.60 Reference N 5 6 Reference Rev. F 2/07 D 2X NOTES: C A2 SEATING PLANE 1. Plastic or metal protrusions of 0.25mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. A1 0.10 C 3. This dimension is measured at Datum Plane “H”. NX 4. Dimensioning and tolerancing per ASME Y14.5M-1994. 5. Index area - Pin #1 I.D. will be located within the indicated zone (SOT23-6 only). (L1) 6. SOT23-5 version has no center lead (shown as a dashed line). H A GAUGE PLANE c L 0.25 0° +3° -0° All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 19 FN7046.3 April 16, 2007