EL5134, EL5135, EL5234, EL5235 ® Data Sheet May 4, 2007 650MHz, Gain of 5, Low Noise Amplifiers Features The EL5134, EL5135, EL5234, and EL5235 are ultra-low voltage noise, high speed voltage feedback amplifiers that are ideal for applications requiring low voltage noise, including communications and imaging. These devices offer extremely low power consumption for exceptional noise performance. Stable at gains as low as 5, these devices offer 100mA of drive performance. Not only do these devices find perfect application in high gain applications, they maintain their performance down to lower gain settings. • 650MHz -3dB bandwidth FN7383.4 • Av = +5 stable • Ultra low noise 1.5nV/√Hz and 0.9pA/√Hz • 450V/µs slew rate • Low supply current = 6.7mA per amplifier • Single supplies from 5V to 12V • Dual supplies from ±2.5V to ±5V These amplifiers are available in small package options (SOT-23) as well as the MSOP and the industry-standard SO packages. All parts are specified for operation over the -40°C to +85°C temperature range. • Fast disable on the EL5134 and EL5234 • Duals EL5234 and EL5235 • Low cost • Pb-free plus anneal available (RoHS compliant) Applications • Imaging • Instrumentation • Communications devices Ordering Information PART NUMBER PART MARKING TAPE & REEL PACKAGE PKG. DWG. # EL5134IS 5134IS - 8 Ld SOIC (150 mil) MDP0027 EL5134IS-T7 5134IS 7” 8 Ld SOIC (150 mil) MDP0027 EL5134IS-T13 5134IS 13” 8 Ld SOIC (150 mil) MDP0027 EL5134ISZ (Note) 5134ISZ - 8 Ld SOIC (150 mil) (Pb-Free) MDP0027 EL5134ISZ-T7 (Note) 5134ISZ 7” 8 Ld SOIC (150 mil) (Pb-Free) MDP0027 EL5134ISZ-T13 (Note) 5134ISZ 13” 8 Ld SOIC (150 mil) (Pb-Free) MDP0027 EL5135IW-T7 BDAA 7” (3k pcs) 5 Ld SOT-23 MDP0038 EL5135IW-T7A BDAA 7” (250 pcs) 5 Ld SOT-23 MDP0038 EL5135IWZ-T7 (Note) BTAA 7” (3k pcs) 5 Ld SOT-23 (Pb-Free) MDP0038 EL5135IWZ-T7A (Note) BTAA 7” (250 pcs) 5 Ld SOT-23 (Pb-Free) MDP0038 EL5234IY BWAAA - 10 Ld MSOP (3.0mm) MDP0043 EL5234IY-T7 BWAAA 7” 10 Ld MSOP (3.0mm) MDP0043 EL5234IY-T13 BWAAA 13” 10 Ld MSOP (3.0mm) MDP0043 EL5235IS 5235IS - 8 Ld SOIC (150 mil) MDP0027 EL5235IS-T7 5235IS 7” 8 Ld SOIC (150 mil) MDP0027 EL5235IS-T13 5235IS 13” 8 Ld SOIC (150 mil) MDP0027 NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003-2006. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. EL5134, EL5135, EL5234, EL5235 Pinouts EL5135 (5 LD SOT-23) TOP VIEW EL5134 (8 LD SOIC) TOP VIEW NC 1 IN- 2 IN+ 3 + VS- 4 8 CE OUT 1 7 VS+ VS- 2 6 OUT IN+ 3 INA+ 1 4 IN- EL5235 (8 LD SOIC) TOP VIEW 10 INA- + VS- 3 CEB 4 + - 5 NC EL5234 (10 LD MSOP) TOP VIEW CEA 2 5 VS+ + - OUTA 1 9 OUTA INA- 2 8 VS+ INA+ 3 7 OUTB VS- 4 8 VS+ 7 OUTB + 6 INB+ 5 INB+ 6 INB- INB+ 5 2 FN7383.4 May 4, 2007 EL5134, EL5135, EL5234, EL5235 Absolute Maximum Ratings (TA = +25°C) Thermal Information Supply Voltage from VS+ to VS- . . . . . . . . . . . . . . . . . . . . . . . 13.2V SR, Supply Rate of Supply Voltage Slew Rate . . . . . . . . . . . . 1V/µs IIN-, IIN+, CE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5mA Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +125°C Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA VS+ = +5V, VS- = -5V, Av=+5, RF = 100Ω, RG = 25Ω, RL = 500Ω,TA = +25°C, unless otherwise specified. Electrical Specifications PARAMETER VOS DESCRIPTION CONDITIONS MIN TYP MAX UNIT -1 0.2 1 mV EL5234 0.3 ±1.5 mV -0.8 Offset Voltage TCVOS Offset Voltage Temperature Coefficient Measured from TMIN to TMAX IB Input Bias Current VIN = 0V 2.5 3.7 5.5 µA IOS Input Offset Current VIN = 0V -0.7 0.3 0.7 nA TCIOS Input Bias Current Temperature Coefficient Measured from TMIN to TMAX PSRR Power Supply Rejection Ratio VS+ = 4.75V to 5.25V CMRR Common Mode Rejection Ratio CMIR µV/°C -3 nA/°C 75 85 dB VCM = ±3V 80 108 dB Common Mode Input Range Guaranteed by CMRR test ±3 ±3.3 V RIN Input Resistance Common mode 5 16 MΩ CIN Input Capacitance 1 pF IS Supply Current, per amplifier AVOL Open Loop Gain VO Voltage Swing 5.6 6.7 7.8 mA RL = 1kΩ to GND 4.0 8.0 kV/V RL = 1kΩ, RF = 900Ω, RG = 100Ω ±3.5 3.9 V RL = 150Ω, RF = 900Ω, RG = 100Ω ±3.3 3.65 V 70 140 mA ISC Short Circuit Current RL = 10Ω BW-3dB -3dB Bandwidth AV = 5, RL = 1kΩ 650 MHz BW-0.1dB ±0.1dB Bandwidth AV = 5, RL = 1kΩ 40 MHz GBWP Gain Bandwidth Product 1500 MHz PM Phase Margin RL = 1kΩ, CL = 6pF 55 ° SR Slew Rate VS = +5V, RL = 150Ω, VOUT = 0V to 3V 475 V/µs tR Rise Time ±0.1VSTEP 1.75 ns tF Fall Time ±0.1VSTEP 1.75 ns OS Overshoot ±0.1VSTEP 25 % tS 0.01% Settling Time 14 ns dG Differential Gain AV = 5, RF = 1kΩ 0.12 % dP Differential Phase AV = 5, RF = 1kΩ 0.08 ° eN Input Noise Voltage f = 10kHz 1.5 nV/√Hz iN Input Noise Current f = 10kHz 0.9 pA/√Hz 3 350 FN7383.4 May 4, 2007 EL5134, EL5135, EL5234, EL5235 VS+ = +5V, VS- = -5V, Av=+5, RF = 100Ω, RG = 25Ω, RL = 500Ω,TA = +25°C, unless otherwise specified. Electrical Specifications PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT 0 +12 +25 µA -25 -12 0 µA SUPPLY (EL5134, EL5234) ISOFF+ Supply Current - Disabled, per Amplifier ISOFF- Supply Current - Disabled, per Amplifier No load, VIN = 0V ENABLE (EL5134, EL5234) IIHCE CE Pin Input High Current CE = +5V 1 10 +25 µA IILCE CE Pin Input Low Current CE = 0V -1 0 +1 µA VIHCE CE Input High Voltage for Power-down VILCE CE Input Low Voltage for Power-up VS+ - 1 V VS+ - 3 V Applications Information Typical Performance Curves 240 5 VS = ±5V AV = +5 RG = 25Ω RL = 500Ω CL = 5pF 3 2 1 120 0 -1 -2 60 0 -60 -120 -3 -4 -180 -3dB BW @ 667MHz -5 0.1 1 10 100 -240 0.1 1K FIGURE 1. GAIN vs FREQUENCY 70 VS = ±5V AV = +5 RG = 25Ω RL = 500Ω CL = 5pF 0.2 0.1 100 1K VS = ±5V RL = 500Ω GAIN = 40dB or 100 FREQUENCY = 15.9MHz GAIN BW PRODUCT = 15.9 x 100 = 1590MHz 60 0.1dB BW @ 40MHz GAIN (dB) 0.3 10 FIGURE 2. PHASE vs FREQUENCY 0.5 0.4 1 FREQUENCY (MHz) FREQUENCY (MHz) NORMALIZED GAIN (dB) VS = ±5V AV = +5 RG = 25Ω RL = 500Ω CL = 5pF 180 PHASE (°) NORMALIZED GAIN (dB) 4 0 -0.1 50 40 -0.2 30 -0.3 -0.4 -0.5 1 10 FREQUENCY (MHz) FIGURE 3. 0.1dB BANDWIDTH 4 100 20 1 10 100 FREQUENCY (MHz) FIGURE 4. GAIN BANDWIDTH PRODUCT FN7383.4 May 4, 2007 EL5134, EL5135, EL5234, EL5235 1800 5 VS = ±5V RL = 500Ω 4 1600 NORMALIZED GAIN (dB) GAIN BANDWIDTH PRODUCT (MHz) Typical Performance Curves (Continued) 1400 1200 1000 800 2.0 AV = +5 1 0 -1 -2 AV = +20 -3 2.5 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGES (±V) 5.5 -5 0.1 6.0 3 2 4 VS = ±6V 1 0 -1 VS = ±5V -2 VS = ±4V -3 VS = ±3V -4 -5 0.1 10 100 FREQUENCY (MHz) RL = 500Ω 1 0 -1 -2 RL = 150Ω -3 RL = 100Ω 4 RL = 500Ω 1 0 RL = 1kΩ -1 -2 RL = 150Ω -3 RL = 100Ω -4 -5 0.1 RL = 1kΩ RL = 50Ω 1 10 100 FREQUENCY (MHz) 1K 5 VS = ±5V AV = +10 RG = 25Ω CL = 10pF 10 100 FREQUENCY (MHz) 1K FIGURE 9. GAIN vs FREQUENCY FOR VARIOUS RLOAD (AV = +10) 5 3 2 1 VS = ±5V AV = +5 RG = 25Ω RF = 100Ω RL = 500Ω CL = 18pF CL = 12pF CL = 8.2pF 0 -1 CL = 4.7pF -2 -3 CL = 0pF -4 RL = 50Ω 1 NORMALIZED GAIN (dB) 2 1K FIGURE 8. GAIN vs FREQUENCY FOR VARIOUS RLOAD 5 3 2 -5 0.1 1K FIGURE 7. GAIN vs FREQUENCY FOR VARIOUS ±VS 4 3 VS = ±5V AV = +5 RL = 500Ω CL = 5pF -4 VS = ±2.5V 1 10 100 FREQUENCY (MHz) 5 AV = +5V RG = 25Ω RL = 500Ω CL = 5pF NORMALIZED GAIN (dB) 4 AV = +10 1 FIGURE 6. GAIN vs FREQUENCY FOR VARIOUS +AV 5 NORMALIZED GAIN (dB) 2 -4 FIGURE 5. GAIN BANDWIDTH PRODUCT vs SUPPLY VOLTAGES NORMALIZED GAIN (dB) 3 VS = ±5V RG = 25Ω RL = 500Ω CL = 5pF -5 0.1 1 10 100 FREQUENCY (MHz) 1K FIGURE 10. GAIN vs FREQUENCY FOR VARIOUS CLOAD (AV = +5) FN7383.4 May 4, 2007 EL5134, EL5135, EL5234, EL5235 Typical Performance Curves (Continued) 3 2 1 VS = ±5V AV = +10 RG = 25Ω RF = 225Ω RL = 500Ω CL = 27pF 5 CL = 47pF 4 CL = 12pF 0 -1 -2 CL = 4.7pF -3 0 -1 -2 -5 0.1 10 100 FREQUENCY (MHz) 1K 3 2 4 RF = 2.74kΩ 0 -1 -2 RF = 225Ω -3 -4 -5 0.1 10 100 FREQUENCY (MHz) 1 CIN = 20pF 1 CIN = 4.7pF 0 -1 CIN = 2.7pF -2 CIN = 0pF -3 1 10 100 FREQUENCY (MHz) CIN = 15pF -1 CIN = 10pF -2 -3 -4 CIN = 0pF 1 10 100 FREQUENCY (MHz) 1K FIGURE 15. GAIN vs FREQUENCY FOR VARIOUS CIN(-) (AV = +10) 6 1K 200 VS = ±5V 80 0 -5 0.1 2 FIGURE 14. GAIN vs FREQUENCY FOR VARIOUS CIN(-) (AV = +5) OPEN LOOP GAIN (dB) 2 VS = ±5V AV = +20 RG = 25Ω RL = 500Ω CL = 10pF 1K CIN = 8.2pF 90 5 3 3 VS = ±5V AV = +5 RG = 25Ω RL = 500Ω CL = 5pF -5 0.1 1K FIGURE 13. GAIN vs FREQUENCY FOR VARIOUS RF (AV = +10) 4 10 100 FREQUENCY (MHz) -4 RF = 100Ω 1 1 5 RF = 4.53kΩ RF = 909Ω 1 RF = 50Ω FIGURE 12. GAIN vs FREQUENCY FOR VARIOUS RF (AV = +5) NORMALIZED GAIN (dB) 4 VS = ±5V AV = +10 RL = 500Ω CL = 10pF RF = 100Ω -3 -4 1 RF = 160Ω RF = 400Ω 1 -5 0.1 5 NORMALIZED GAIN (dB) 2 -4 FIGURE 11. GAIN vs FREQUENCY FOR VARIOUS CLOAD (AV = +10) NORMALIZED GAIN (dB) 3 RF = 200Ω VS = ±5V AV = +5 RL = 500Ω CL = 5pF OPEN LOOP GAIN 70 180 160 60 140 50 120 40 100 30 20 80 60 OPEN LOOP PHASE 10 40 0 20 -10 0.001 0.01 0.1 1 10 FREQUENCY (MHz) PHASE (°) NORMALIZED GAIN (dB) 4 NORMALIZED GAIN (dB) 5 100 0 1K FIGURE 16. OPEN LOOP GAIN and PHASE vs FREQUENCY FN7383.4 May 4, 2007 EL5134, EL5135, EL5234, EL5235 Typical Performance Curves (Continued) -10 VS = ±5V -30 10 CMRR (dB) OUTPUT IMPEDNACE (Ω) 100 1 -50 -70 0.1 -90 0.0 0.01 0.1 1 10 -110 1K 100 10K 100K FREQUENCY (MHz) PSRR (dB) AV=+10 VS=±5V -10 VS+ -30 VS- -50 VS-70 VS+ 100K 1M 10M 100M 500M MAX OUTPUT VOLTAGE SWING (VP-P) 10 10K 10 VS = ±5V AV = +5 RG = 25Ω CL = 5pF 9 8 7 6 5 4 RLOAD = 150Ω 3 2 1 0 0.1 1.0 5 -40 VS = ±5V AV = +5 RG = 25Ω RL = 500Ω -60 0 -5 -10 -15 -20 -25 -70 -80 INPUT TO OUTPUT -90 OUTPUT TO INPUT -100 -110 -120 -30 -130 -35 -40 0.1 1K VS = ±5V AV = +5 RG = 25Ω CHIP DISABLED -50 ISOLATION (dB) GROUP DELAY (ns) 10 10 100 FREQUENCY (MHz) FIGURE 20. MAX OUTPUT VOLTAGE SWING vs FREQUENCY FIGURE 19. PSRR vs FREQUENCY 15 100M 500M RLOAD = 1kΩ FREQUENCY (Hz) 20 10M FIGURE 18. CMRR vs FREQUENCY FIGURE 17. OUTPUT IMPEDANCE vs FREQUENCY -90 1K 1M FREQUENCY (Hz) 1 10 100 FREQUENCY (MHz) FIGURE 21. GROUP DELAY vs FREQUENCY 7 1K -140 0.1 1.0 10 100 FREQUENCY (MHz) 1K FIGURE 22. INPUT AND OUTPUT ISOLATION (EL5134, EL5234) FN7383.4 May 4, 2007 EL5134, EL5135, EL5234, EL5235 Typical Performance Curves (Continued) -40 -50 -60 VS = ±5V AV = =5 RG = 25Ω RL = 500Ω CL = 5pF VOUT = 2VP-P -20 -40 T.H.D 2nd H.D -70 -50 -70 -80 -90 Fin = 1MHz -90 -100 0.1 1.0 10 FUNDAMENTAL FREQUENCY (MHz) ENABLE SIGNAL 5 4 OUTPUT SIGNAL 3 2 4 0 3 -2 8 OUTPUT SIGNAL 0 100 200 300 400 TIME (ns) TIME (ns) FIGURE 25. TURN-ON TIME (EL5134, EL5234) FIGURE 26. TURN-OFF TIME (EL5134, EL5234) 100 VS = ±5V CURRENT NOISE (pA/√Hz) VOLTAGE NOISE (nV/√Hz) 7 DISABLE SIGNAL -3 -500 -400 -300 -200 -100 100 200 300 400 500 600 700 800 10 1 100 FIGURE 27. EQUIVALENT INPUT VOLTAGE NOISE vs FREQUENCY 8 6 0 -2 1.0 10 FREQUENCY (kHz) 5 1 -1 0.10 4 2 -1 0.1 0.01 3 VS = ±5V AV = +5 RG = 25Ω RL = 500Ω VOUT = 4VP-P 5 1 0 1 FIGURE 24. TOTAL HARMONIC DISTORTION vs OUTPUT VOLTAGES 6 VS = ±5V AV = +5 RG = 25Ω RL = 500Ω VOUT = 4VP-P 2 -3 -200 -100 0 OUTPUT VOLTAGES (VP-P) AMPLITUDE (V) 6 -100 100 FIGURE 23. HARMONIC DISTORTION vs FREQUENCY 100 Fin = 10MHz -60 3rd H.D -80 AMPLITUDE (V) VS = ±5V AV = +5 RG = 25Ω RL = 500Ω CL = 5pF -30 THD (dBc) HARMONIC DISTORTION (dBc) -30 1K VS = ±5V 10 1 0.1 0.01 0.10 1.0 10 FREQUENCY (kHz) 100 1K FIGURE 28. EQUIVALENT INPUT CURRENT NOISE vs FREQUENCY FN7383.4 May 4, 2007 EL5134, EL5135, EL5234, EL5235 Typical Performance Curves (Continued) 2 0.6 AMPLITUDE (V) AMPLITUDE (V) 0.4 0.2 TFALL = 1.75 ns 0.0 TRISE = 1.75ns -0.2 -0.4 -0.6 -20 0 20 40 VS = ±5V AV = +5 RG = 25Ω RL = 500Ω CL = 5pF VOUT = 500mV AMPLITUDE (dBm) -20 -30 SLEW RATE (V/µs) 600 6.6 6.4 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGES (V) 5.5 500 POSITIVE SLEW RATE 3.0 3.5 4.0 4.5 5.0 SUPPLY VOLTAGES (±V) 5.5 6.0 50 f2 = 4.3dBm @ 1.05MHz 40 35 2f2-f1 = -66.3dBm @ 1.15MHz 30 25 20 15 -90 5 1.0 1.1 1.2 FREQUENCY (MHz) FIGURE 33. THIRD ORDER IMD INTERCEPT (IP3) 9 VS = ±5V AV = +10 RF = 226Ω RL = 100Ω CL = 10pF 45 10 0.9 2.5 FIGURE 32. SLEW RATE vs SUPPLY VOLTAGES -80 0.8 AV = +5 RG = 25Ω RL = 500Ω CL = 5pF VOUT = 4VP-P NEGATIVE SLEW RATE Delta IM = (4.3) - (-69.4) = 73.7dB IP3 = 4.3 + (73.7/2) = 41dBm 2f1-f2 = -69.4dBm -60 @ 0.85MHz -70 -100 60 80 100 120 140 160 TIME (ns) 400 200 2.0 6.0 @ 0.95MHz f1 = 4.3dBm -50 40 300 Please note that the curve showed positive current. The negative current was almost the same. VS = ±5V AV = +10 RF = 226Ω RL = 100Ω CL = 10pF -40 20 FIGURE 30. LARGE SIGNAL STEP RESPONSE_RISE AND FALL TIME IP3 (dBm) SUPPLY CURRENT (mA) 6.8 FIGURE 31. SUPPLY CURRENT vs SUPPLY VOLTAGE -10 0 700 AV = +5 RG = 25Ω RL = 500Ω CL = 5pF 6.0 2.5 0 VS = ±5V AV = +5 RG = 25Ω RL = 500Ω CL = 5pF VOUT = 2.0V TRISE = 2.4ns -2 -20 60 80 100 120 140 160 TIME (ns) 7.0 10 TFALL = 2.4ns 0 1 FIGURE 29. SMALL SIGNAL STEP RESPONSE_RISE AND FALL TIME 6.2 1 0 1 10 100 FREQUENCY (MHz) FIGURE 34. THIRD ORDER IMD INTERCEPT vs FREQUENCY FN7383.4 May 4, 2007 EL5134, EL5135, EL5234, EL5235 Typical Performance Curves (Continued) JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1 0.9 1.2 1 909mW 0.8 870mW 0.6 SO8 θJA=110°C/W 435mW MSOP8/10 θJA=115°C/W 0.4 SOT23-5/6 θJA=230°C/W 0.2 POWER DISSIPATION (W) POWER DISSIPATION (W) 1.4 0.8 0.7 625mW 0.6 486mW 0.5 SO8 θJA=160°C/W 0.4 391mW 0.3 MSOP8/10 θJA=206°C/W SOT23-5/6 θJA=265°C/W 0.2 0.1 0 0 0 25 75 85 100 50 125 0 150 FIGURE 35. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE DIFFERENTIAL GAIN (%) 25 50 75 85 100 125 150 AMBIENT TEMPERATURE (°C) AMBIENT TEMPERATURE (°C) FIGURE 36. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE 0.15 0.10 0.05 0 -0.05 -0.10 -0.15 0 10 20 30 40 50 60 70 80 90 100 IRE DIFFERENTIAL PHASE (°) FIGURE 37. DIFFERENTIAL GAIN (%) 0.15 0.10 0.05 0 -0.05 -0.10 -0.15 -0.20 0 10 20 30 40 50 60 70 80 90 100 IRE FIGURE 38. DIFFERENTIAL PHASE (°) Product Description The EL5134, EL5135, EL5234 and EL5235 are voltage feedback operational amplifiers designed for communication and imaging applications requiring very low voltage and current noise. They also feature low distortion while drawing moderately low supply current and is built on Intersil's proprietary high-speed complementary bipolar process. The EL5134, EL5135, EL5234 and EL5235 use a classical voltage-feedback topology which allows them to be used in a variety of applications where current-feedback amplifiers are 10 not appropriate because of restrictions placed upon the feedback element used with the amplifier. Gain-Bandwidth Product and the -3dB Bandwidth The EL5134, EL5135, EL5234 and EL5235 have a gainbandwidth product of 1500MHz while using only 6.7mA of supply current per amplifier. For gains greater than 5 their closed-loop -3dB bandwidth is approximately equal to the gain-bandwidth product divided by the noise gain of the circuit. For gains of 5, higher-order poles in the amplifiers' FN7383.4 May 4, 2007 EL5134, EL5135, EL5234, EL5235 transfer function contribute to even higher closed loop bandwidths. For example, the EL5134, EL5135, EL5234 and EL5235 have a -3dB bandwidth of 650MHz at a gain of 5, dropping to 150MHz at a gain of 10. It is important to note that the EL5134, EL5135, EL5234 and EL5235 is designed so that this “extra” bandwidth in low-gain application does not come at the expense of stability. As seen in the typical performance curves, the EL5134, EL5135, EL5234 and EL5235 in a gain of only 5 exhibited 0.2dB of peaking with a 500Ω load. Output Drive Capability The EL5134, EL5135, EL5234 and EL5235 are designed to drive a low impedance load. They can easily drive 6VP-P signal into a 500Ω load. This high output drive capability makes the EL5134, EL5135, EL5234 and EL5235 and ideal choice for RF, IF, and video applications. Furthermore, the EL5134, EL5135, EL5234 and EL5235 are current-limited at their outputs, allowing them to withstand momentary short to ground. However, the power dissipation with output-shorted cannot exceed the power dissipation capability of the package. Driving Cables and Capacitive Loads Although the EL5134, EL5135, EL5234 and EL5235 are designed to drive low impedance load, capacitive loads will decreases the amplifiers’ phase margin. As shown in the performance curves, capacitive load can result in peaking, overshoot and possible oscillation. For optimum AC performance, capacitive loads should be reduced as much as possible or isolated with a series resistor between 5Ω to 20Ω. When driving coaxial cables, double termination is always recommended for reflection-free performance. When properly terminated, the capacitance of the coaxial cable will not add to the capacitive load seen by the amplifier. Disable/Power-Down The EL5134 and EL5234 amplifiers can be disabled placing their outputs in a high impedance state. When disable, each amplifier current is reduced to 12uA. The EL5134 and EL5234 are disabled when their CE pins are pulled up to within 1V of the power suply. Similarly, the amplifiers are enabled by floating or pulling its CE pin to at least 3V below the positive supply. For +/-5V supply, this means that EL5134 and EL5234 amplifiers will be enabled when CE is 2V or less, and disabled when CE is above 4V. Although the logic levels are not stardard TTL, this choice of logic voltages allows the EL5134 and EL5234 to be enabled by typing CE to ground, even in 5V single supply applications. The CE pin can be driveing from CMOS outputs. Supply Voltage Range and Single-Supply Operation The EL5134, EL5135, EL5234 and EL5235 have been designed to operate with supply voltages having a span of greater than 5V and less than 12V. In practical terms, this means that they will operate on dual supplies ranging from 11 ±2.5V to ±6V. With single-supply, the EL5134, EL5135, EL5234 and EL5235 will operate from 5V to 12V. To prevent internal circuit latch-up, the slew rate between the negative and positve supplies must be less than 1V/nS. As supply voltages continue to decrease, it becomes necessary to provide input and output voltage ranges that can get as close as possible to the supply voltages. The EL5134, EL5135, EL5234 and EL5235 have an input range which extends to within 2V of either supply. So, for example, on ±5V supplies, the EL5134, EL5135, EL5234 and EL5235 have an input range which spans ±3V. The output range of the EL5134, EL5135, EL5234 and EL5235 is also quite large, extending to within 2V of the supply rail. On a ±5V supply, the output is therefore capable of swinging from -3.1V to +3.1V. Single-supply output range is larger because of the increased negative swing due to the external pulldown resistor to ground. Power Dissipation With the wide power supply range and large output drive capability of the EL5134, EL5135, EL5234 and EL5235, it is possible to exceed the 150°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified for the EL5134, EL5135, EL5234 and EL5235 to remain in the safe operating area. These parameters are related as follows: T JMAX = T MAX + ( θ JA xPD MAXTOTAL ) where: • PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) • PDMAX for each amplifier can be calculated as follows: V OUTMAX PD MAX = 2*V S × I SMAX + ( V S - V OUTMAX ) × ---------------------------R L where: • TMAX = Maximum ambient temperature • θJA = Thermal resistance of the package • PDMAX = Maximum power dissipation of 1 amplifier • VS = Supply voltage • IMAX = Maximum supply current of 1 amplifier • VOUTMAX = Maximum output voltage swing of the application • RL = Load resistance Power Supply Bypassing And Printed Circuit Board Layout As with any high frequency devices, good printed circuit board layout is essential for optimum performance. Ground FN7383.4 May 4, 2007 EL5134, EL5135, EL5234, EL5235 plane construction is highly recommended. Pin lengths should be kept as short as possible. The power supply pins must be closely bypassed to reduce the risk of oscillation. The combination of a 4.7µF tantalum capacitor in parallel with 0.1µF ceramic capacitor has been proven to work well when placed at each supply pin. For single supply operation, where pin 4 (VS-) is connected to the ground plane, a single 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor across pin 8 (VS+). For good AC performance, parasitic capacitance should be kept to a minimum. Ground plane construction again should be used. Small chip resistors are recommended to minimize series inductance. Use of sockets should be avoided since they add parasitic inductance and capacitance which will result in additional peaking and overshoot. 12 FN7383.4 May 4, 2007 EL5134, EL5135, EL5234, EL5235 Small Outline Package Family (SO) A D h X 45° (N/2)+1 N A PIN #1 I.D. MARK E1 E c SEE DETAIL “X” 1 (N/2) B L1 0.010 M C A B e H C A2 GAUGE PLANE SEATING PLANE A1 0.004 C 0.010 M C A B L b 0.010 4° ±4° DETAIL X MDP0027 SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL SO-14 SO16 (0.300”) (SOL-16) SO20 (SOL-20) SO24 (SOL-24) SO28 (SOL-28) TOLERANCE NOTES A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX - A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 - A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 - b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 - c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 - D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3 E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 - E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3 e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic - L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 - L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic - h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference - 16 20 24 28 Reference - N SO-8 SO16 (0.150”) 8 14 16 Rev. M 2/07 NOTES: 1. Plastic or metal protrusions of 0.006” maximum per side are not included. 2. Plastic interlead protrusions of 0.010” maximum per side are not included. 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994 13 FN7383.4 May 4, 2007 EL5134, EL5135, EL5234, EL5235 SOT-23 Package Family MDP0038 e1 D SOT-23 PACKAGE FAMILY A MILLIMETERS 6 N SYMBOL 4 E1 2 E 3 0.15 C D 1 2X 2 3 0.20 C 5 2X e 0.20 M C A-B D B b NX 0.15 C A-B 1 3 SOT23-5 SOT23-6 A 1.45 1.45 MAX A1 0.10 0.10 ±0.05 A2 1.14 1.14 ±0.15 b 0.40 0.40 ±0.05 c 0.14 0.14 ±0.06 D 2.90 2.90 Basic E 2.80 2.80 Basic E1 1.60 1.60 Basic e 0.95 0.95 Basic e1 1.90 1.90 Basic L 0.45 0.45 ±0.10 L1 0.60 0.60 Reference N 5 6 Reference D 2X TOLERANCE Rev. F 2/07 NOTES: C A2 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. SEATING PLANE A1 0.10 C 1. Plastic or metal protrusions of 0.25mm maximum per side are not included. 3. This dimension is measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. NX 5. Index area - Pin #1 I.D. will be located within the indicated zone (SOT23-6 only). (L1) 6. SOT23-5 version has no center lead (shown as a dashed line). H A GAUGE PLANE c L 14 0.25 0° +3° -0° FN7383.4 May 4, 2007 EL5134, EL5135, EL5234, EL5235 Mini SO Package Family (MSOP) 0.25 M C A B D MINI SO PACKAGE FAMILY (N/2)+1 N E MDP0043 A E1 MILLIMETERS PIN #1 I.D. 1 B (N/2) e H C SEATING PLANE 0.10 C N LEADS SYMBOL MSOP8 MSOP10 TOLERANCE NOTES A 1.10 1.10 Max. - A1 0.10 0.10 ±0.05 - A2 0.86 0.86 ±0.09 - b 0.33 0.23 +0.07/-0.08 - c 0.18 0.18 ±0.05 - D 3.00 3.00 ±0.10 1, 3 E 4.90 4.90 ±0.15 - E1 3.00 3.00 ±0.10 2, 3 e 0.65 0.50 Basic - L 0.55 0.55 ±0.15 - L1 0.95 0.95 Basic - N 8 10 Reference - 0.08 M C A B b Rev. D 2/07 NOTES: 1. Plastic or metal protrusions of 0.15mm maximum per side are not included. L1 2. Plastic interlead protrusions of 0.25mm maximum per side are not included. A 3. Dimensions “D” and “E1” are measured at Datum Plane “H”. 4. Dimensioning and tolerancing per ASME Y14.5M-1994. c SEE DETAIL "X" A2 GAUGE PLANE L A1 0.25 3° ±3° DETAIL X All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 15 FN7383.4 May 4, 2007