10/100 LAN Interface Module for NIC/HUB Card Applications, Mini Package ELECTRONICS INC. EPF8018G • Guaranteed to operate with 8 mA DC bias at 70°C on cable side • • Complies with or exceeds IEEE 802.3, 10 BT/100 BX Standards • Electrical Parameters @ 25° C OCL @ 70°C Insertion Loss (dB Max.) 100 KHz, 0.1 Vrms 8 mA DC Bias 1-80 MHz Cable Side 80-100 MHz Return Loss (dB Min.) 100-150 MHz 1-30 MHz 30-60 MHz Xmit Rcv Xmit Rcv Xmit Rcv Xmit Rcv Xmit 350µH -1 -1 -1 • -1 -3.5 -18 -3 -12 -18 Common Mode Rejection (dB Min.) 60-100 MHz Rcv Xmit -12 -10 30-100 MHz 7 -45 -10 -45 -30 -30 -15 10-100 MHz -40 -40 -15 Transmit Channel TD+ 15 RX+ 11 TX+ CT 14 CT 3 RD- 2 6 1:1 TD- 16 RX- 5 10 TX2 :1 CT 12 CT Dimensions Package A Dim. Min. A B C D E F G H I J K L M N P Q .780 .290 .223 .700 .003 .100 .350 .016 .008 .045 0° .025 N J PCA EPF8018G Date Code B Q Pad Layout D P M E C K L PCA ELECTRONICS, INC. 16799 SCHOENBORN ST. NORTH HILLS, CA 91343 5-10 MHz Rcv Xmit Rcv Xmit Rcv Xmit Rcv Schematic RD+ 1 H 200-500 MHz 100-200 MHz Isolation : 1500 Vrms • Cable Impedance : 100 Ω • Rise Time : 3.0 nS Max. • Receive Channel Pin 1 I.D. Crosstalk (dB Min.) [Between Channels] F (Inches) Max. Nom. .800 .310 .243 Typ. .020 Typ. .370 .022 .012 Typ. 8° .045 (Millimeters) Min. Max. Nom. 19.81 20.321 12.95 3.46 5.66 6.17 17.78 Typ. 0.076 .508 2.54 Typ. 8.89 9.40 .406 .559 .203 .305 1.14 Typ. 0° 8° .635 1.14 .030 .100 .092 .410 .762 2.54 2.34 17.78 I G CSF8018Ga Rev. 1 11/26/96 Product performance is limited to specified parameters. Data is subject to change without prior notice. TEL: (818) 892-0761 FAX: (818) 894-5791 http://www.pca.com 10/100 LAN Interface Module for NIC/HUB Card Applications, Mini Package ELECTRONICS INC. EPF8018G The circuit below is a guideline for interconnecting PCA’s EPF8018G with QSI6611 and QSI6612 chip set for 10/100 Mb/s applications. Further details can be obtained from the chip manufacturer application notes. Typical insertion loss of the isolation transformer is 0.5dB. This parameter covers the entire spectrum of the encoded signals in 10/100 protocols. Under terminated conditions, to transmit a 2V pk-pk signal across the cable, you must adjust the chips supporting resistor to get at least 2.12V pk-pk across the transmit pins. It is recommended that system designers do not use the receiver side center tap to ground, via a capacitor. This may worsen EMI, specifically if the secondary “common mode termination” is pulled to chassis ground as shown. The phantom resistors shown around the connector have been known to suppress unwanted radiation that unused wires pick up from the immediate environment. Their placement and use are to be considered carefully before a design is finalized. The “common mode termination” load of 75 Ω shown from the center taps of the secondary may be taken to chassis ground via a cap of suitable value. This depends upon user’s design, EMI margin etc. It is recommended that there be a neat separation of ground planes in the layout. It is generally accepted practice to limit the plane off at least 0.05 inches away from the chip side pins of EPF8018G. There need not be any ground plane beyond this point. For best results, PCB designer should design the outgoing traces preferably to be 50 Ω, balanced and well coupled to achieve minimum radiation from these traces. Typical Application Circuit for UTP TD+ 1 11 2 7 3 6 6 16 TD- Rcv 15 50Ω 75Ω 14 4 RJ45* 12 5 RD+ 25Ω RD25Ω 25Ω 25Ω QSI66 11 or QSI66 12 10 Xmit 39Ω 100Ω 100Ω +5V 1 75Ω 2 50Ω 7 5 High Voltage Capacitor EPF8018G 8 Node Pinout Chassis Ground CM Capacitor Notes : * NIC Side is shown. Hub side connection will have crossover swapping pins 1-2 & 3-6. PCA ELECTRONICS, INC. 16799 SCHOENBORN ST. NORTH HILLS, CA 91343 CSF8018Gb Rev. 1 11/26/96 TEL: (818) 892-0761 FAX: (818) 894-5791 http://www.pca.com