ICS 1A31

PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840001-31
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
FEATURES
The ICS840001-31 is a two output LVCMOS/
LVTTL Synthesizer and a member of the
HiPerClockS™
HiPerClocks TM family of high perfor mance
devices from ICS. One output is the LVCMOS/
LVTTL main synthesized clock output (Q) and one
output is a three-state LVCMOS/LVTTL reference clock
(REF_CLK) output at the frequency of the crystal oscillator.
The device can accept 26.5625MHz and 40MHz crystals and
can synthesize 106.25MHz or 100MHz outputs. The
ICS840001-31 has excellent <1ps phase jitter performance
over the 637kHz – 10MHz integration range. The ICS84000131 is packaged in a 3mm x 3mm 16-pin VFQFN, making it
ideal for use on space constrained boards.
• (2) LVCMOS/LVTTL outputs, 20Ω typical output impedence
(1) Main clock output (Q)
(1) Three-state reference clock output (REF_CLK)
ICS
• Crystal oscillator interface can accept 26.5625MHz or
40MHz 18pF parallel resonant crystals
• Output frequency range: 106.25MHz or 100MHz
• VCO range: 490MHz to 640MHz
• RMS phase jitter @ 106.25MHz, using a 26.5625MHz crystal
(637kHz - 10MHz): 0.38ps (typical)
• 3.3V operating supply
• 0°C to 70°C ambient operating temperature
FUNCTION TABLE
Inputs
Outputs
0
VCO
(MHz)
637.5
Q
Frequency (MHz)
106.25
1 (or Floating)
600
10 0
Crystal
M
OE
26.5625
0
40
1 (or Floating)
Application
REF_CLK
Frequency (MHz)
Fibre Channel
High-Z
40
PIN ASSIGNMENT
490MHz - 640MHz
÷6
11
VDDO
XTAL_OUT 3
10
GND
9
M 4
1 = ÷15 (default)
0 = ÷24
M
Q
XTAL_IN 2
6
7
Q
VDD
8
NC
5
nc
XTAL_OUT
VCO
16 15 14 13
12
nc
OSC
Phase
Detector
OE 1
nc
XTAL_IN
nc
REF_CLK
nc
VDDA
OE (Pullup)
REF_CLK
BLOCK DIAGRAM
Serial Attached (SCSI)
ICS840001-31
16-Lead VFQFN
3mm x 3mm x 0.95 package body
K Package
Top View
(Pullup)
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
840001AK-31
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REV. A MAY 4, 2005
1
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840001-31
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
1
OE
Input
2,3
XTAL_IN,
XTAL_OUT
Input
4
M
Input
Pullup
Pullup
Description
Output enable pin. When HIGH, REF_CLK output is enabled.
When LOW, forces REF_CLK to HiZ state.
LVCMOS/LVTTL interface levels.
Cr ystal oscillator interface. XTAL_IN is the input.
XTAL_OUT is the output.
M divider input. 0 = ÷24, 1 = ÷15 (default).
LVCMOS/LVTTL interface levels.
5, 6, 7, 8,
14, 15
9
nc
Unused
VDD
Power
Core supply pin.
10
GND
Power
Power supply ground.
11
VDDO
Power
12
Q
Output
13
REF_CLK
Output
16
VDDA
Power
Output supply pin.
Single-ended clock output. LVCMOS/LVTTL interface levels.
20Ω typical output impedance.
Single-ended three-state reference clock output.
LVCMOS/LVTTL interface levels. 20Ω typical output impedance.
Analog supply pin.
No connect.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
CIN
Input Capacitance
Test Conditions
Minimum
Typical
4
Maximum
Units
pF
CPD
Power Dissipation Capacitance
8
pF
RPULLUP
Input Pullup Resistor
51
kΩ
ROUT
Output Impedance
20
Ω
840001-31AK
VDD, VDDA, VDDO = 3.465V
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2
REV. A MAY 4, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840001-31
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VDD
4.6V
Inputs, VI
-0.5V to VDD + 0.5 V
Outputs, VO
-0.5V to VDD + 0.5V
Package Thermal Impedance, θJA
51.5°C/W (0 lfpm)
Storage Temperature, TSTG
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDA = VDDO = 3.3V±5%, TA = 0°C TO 70°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
VDD
Core Supply Voltage
3.135
3.3
3.465
V
VDDA
Analog Supply Voltage
3.135
3.3
3.465
V
VDDO
Output Supply Voltage
3.135
3.3
3.465
V
IDD
Power Supply Current
70
mA
IDDA
Analog Supply Current
6
mA
IDDO
Output Supply Current
27
mA
TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDA = VDDO = 3.3V±5%, TA = 0°C TO 70°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
VIH
Input High Voltage
2
VDD + 0.3
V
VIL
Input Low Voltage
-0.3
0.8
V
IIH
Input High Current
OE, M
VDD = VIN = 3.465V
5
µA
IIL
Input Low Current
OE, M
VDD = 3.465V, VIN = 0V
VOH
Output High Voltage; NOTE 1
-150
µA
2.6
V
Output Low Voltage; NOTE 1
VOL
NOTE 1: Outputs terminated with 50Ω to VDD/2. See Parameter Measurement Information Section,
"3.3V Output Load Test Circuit".
0.5
V
Maximum
Units
40
MHz
Equivalent Series Resistance (ESR)
50
Ω
Shunt Capacitance
7
pF
Drive Level
1
mW
TABLE 5. CRYSTAL CHARACTERISTICS
Parameter
Test Conditions
Minimum
Mode of Oscillation
Fundamental
Frequency
840001AK-31
Typical
26.5625
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3
REV. A MAY 4, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840001-31
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 6. AC CHARACTERISTICS, VDD = VDDA = VDDO = 3.3V±5%, TA = 0°C TO 70°C
Symbol
Parameter
fOUT
Output Frequency
tjit(Ø)
t R / tF
RMS Phase Jitter (Random);
NOTE 1
Output Rise/Fall Time
Test Conditions
100MHz, Integration Range:
637kHz to 10MHz
106.25MHz, Integration Range:
637kHz to 10MHz
20% to 80%
odc
Output Duty Cycle
All parameters are characterized @ 100MHz and 106.25MHz.
NOTE 1: Please refer to the Phase Noise Plot.
840001-31AK
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4
Minimum
Typical
Maximum
Units
100
MHz
106.25
MHz
0.54
ps
0.38
ps
470
ps
50
%
REV. A MAY 4, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840001-31
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
PARAMETER MEASUREMENT INFORMATION
1.65V ± 5%
Noise Power
Phase Noise Plot
SCOPE
VDD,
VDDA,
VDDO
Qx
LVCMOS
Phase Noise Mask
GND
Offset Frequency
f1
-1.65V ± 5%
f2
RMS Jitter = Area Under the Masked Phase Noise Plot
3.3V OUTPUT LOAD AC TEST CIRCUIT
RMS PHASE JITTER
V
DD
80%
2
Q0
80%
t PW
t
odc =
Clock
Outputs
PERIOD
t PW
20%
20%
tR
tF
x 100%
t PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
840001AK-31
OUTPUT RISE/FALL TIME
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5
REV. A MAY 4, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840001-31
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. The ICS840001-31 provides separate power supplies to isolate any high switching noise from the
outputs to the internal PLL. VDD, VDDA and VDDO should be individually connected to the power supply plane through vias, and
bypass capacitors should be used for each pin. To achieve optimum jitter performance, power supply isolation is required. Figure 1 illustrates how a 10Ω resistor along with a 10μF and a
.01μF bypass capacitor should be connected to each VDDA pin.
3.3V
VDD
.01μF
10Ω
V DDA
.01μF
10μF
FIGURE 1. POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
allel resonant crystal and were chosen to minimize the ppm error. The optimum C1 and C2 values can be slightly adjusted for
different board layouts.
The ICS840001-31 has been characterized with 18pF parallel
resonant crystals. The capacitor values, C1 and C2, shown in
Figure 2 below were determined using a 26.5625MHz, 18pF par-
XTAL_OUT
C1
33p
X1
18pF Parallel Crystal
XTAL_IN
C2
22p
Figure 2. CRYSTAL INPUt INTERFACE
840001-31AK
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6
REV. A MAY 4, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840001-31
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
RELIABILITY INFORMATION
TABLE 7.
θJAVS. AIR FLOW TABLE FOR 16 LEAD VFQFN
θJA at 0 Air Flow (Linear Feet per Minute)
0
Multi-Layer PCB, JEDEC Standard Test Boards
51.5°C/W
TRANSISTOR COUNT
The transistor count for ICS840001-31 is: 2805
840001AK-31
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7
REV. A MAY 4, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
PACKAGE OUTLINE - K SUFFIX
FOR
ICS840001-31
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
16 LEAD VFQFN
TABLE 8. PACKAGE DIMENSIONS
JEDEC VARIATION
ALL DIMENSIONS IN MILLIMETERS
SYMBOL
MINIMUM
MAXIMUM
16
N
A
0.80
1.0
A1
0
0.05
0.25 Reference
A3
b
0.18
0.30
e
0.50 BASIC
ND
4
NE
4
3.0
D
D2
0.25
1.25
3.0
E
E2
0.25
1.25
L
0.30
0.50
Reference Document: JEDEC Publication 95, MO-220
840001-31AK
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8
REV. A MAY 4, 2005
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS840001-31
FEMTOCLOCKS™ CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER
TABLE 9. ORDERING INFORMATION
Part/Order Number
Marking
Package
Shipping Packaging
Temperature
ICS840001AK-31
1A31
16 Lead VFQFN
tray
0°C to 70°C
ICS840001AK-31
1A31
16 Lead VFQFN
2500 tape & reel
0°C to 70°C
PCI Express™ is a trademark of PCI-SIG. All trademarks mentioned are the property of their respective owners.
The aforementioned trademarks, HiPerClockS™ and FemtoClocks™ are a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability or other extraordinary environmental requirements are
not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS
product for use in life support devices or critical medical instruments.
840001AK-31
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9
REV. A MAY 4, 2005