AVAGO HFBR

HFBR-1119TZ Transmitter
HFBR-2119TZ Receiver
Fiber Optic Transmitter and Receiver Data Links
for 266 MBd
Data Sheet
Description
Features
The HFBR-1119TZ/-2119TZ series of data links are highperformance, cost-efficient, transmitter and receiver
modules for serial optical data communication applications specified at 266 MBd for Fibre Channel applications
or for general-purpose fiber optic data link transmission.
 Full compliance with the optical performance requirements of the fibre channel physical layer
These modules are designed for 50 or 62.5 m core multimode optical fiber and operate at a nominal wavelength of
1300 nm. They incorporate our high-performance, reliable,
long-wavelength, optical devices and proven circuit technology to give long life and consistent performance.
 Other versions available for:
– FDDI
– ATM
 Compact 16-pin DIP package with plastic ST* connector
 Wave solder and aqueous wash process compatible
package
 Manufactured in an ISO 9001 certified facility
Transmitter
Applications
The transmitter utilizes a 1300 nm surface-emitting
InGaAsP LED, packaged in an optical subassembly. The LED
is DC-coupled to a custom IC which converts differentialinput, PECL logic signals, ECL-referenced (shifted) to a +5 V
power supply, into an analog LED drive current.
 Fibre channel interfaces
Receiver
The receiver utilizes an InGaAs PIN photodiode coupled
to a custom silicon transimpedance preamplifier IC. The
PIN-preamplifier combination is AC-coupled to a custom
quantizer IC which provides the final pulse shaping for the
logic output and the Signal Detect function. Both the Data
and Signal Detect Outputs are differential. Also, both Data
and Signal Detect Outputs are PECL compatible, ECL-referenced (shifted) to a +5 V power supply.
Package
The overall package concept for the Data Links consists of
the following basic elements: two optical subassemblies,
two electrical subassemblies, and the outer housings as
illustrated in Figure 1.
* ST is a registered trademark of AT&T Lightguide Cable Connectors.
 Multimode fiber optic links up to 266 MBd at 1500 m
 General purpose, point-to-point data communications
 Replaces DLT/R1040-ST2 model transmitters and
receivers
The package outline drawing and pinout are shown in Figures 2 and 3. The details of this package outline and pinout are
compatible with other data-link modules from other vendors.
The optical subassemblies consist of a transmitter subassembly in which the LED resides and a receiver subassembly
housing the PIN-preamplifier combination.
The electrical subassemblies consist of a multi-layer printed circuit board on which the IC chips and various surfacemounted, passive circuit elements are attached.
RECEIVER
PIN PHOTODIODE
DIFFERENTIAL
DATA IN
DIFFERENTIAL
QUANTIZER
IC
SIGNAL
DETECT OUT
PREAMP IC
OPTICAL
SUBASSEMBLIES
ELECTRICAL
SUBASSEMBLIES
SIMPLEX ST®
RECEPTACLE
TRANSMITTER
DIFFERENTIAL
DATA IN
VBB
DRIVER IC
LED
TOP VIEW
Figure 1. Transmitter and receiver block diagram.
THREADS
3/8 – 32 UNEF-2A
HFBR-111X/211XT
DATE CODE (YYWW)
SINGAPORE
12.19
MAX.
8.31
41 MAX.
5.05
0.9
7.01
9.8 MAX.
5.0
2.45
19.72
NOTES:
1. MATERIAL ALLOY 194 1/2H – 0.38 THK
FINISH MATTE TIN PLATE 7.6 µm MIN.
2. MATERIAL PHOSPHOR BRONZE WITH
120 MICROINCHES TIN LEAD (90/10)
OVER 50 MICROINCHES NICKEL.
12
17.78
(7 x 2.54)
8 x 7.62
3. UNITS = mm
HOUSING PINS 0.38 x 0.5 mm
NOTE 1
PCB PINS
DIA. 0.46 mm
NOTE 2
Figure 2. Package outline drawing.
2
3
OPTICAL PORT
OPTICAL PORT
NC
9
8
NC
GND
10
7
NO PIN
VCC
11
6
VCC
12
GND
9
8
NC
NO PIN
10
7
GND
GND
GND
11
6
VCC
5
GND
GND
12
5
VCC
13
4
GND
GND
13
4
VCC
DATA
14
3
GND
SD
14
3
DATA
DATA
15
2
VBB
SD
15
2
DATA
NC
16
1
NC
NO PIN
16
1
NC
TRANSMITTER
NC
OPTICAL POWER BUDGET – dB
8
7
6
5
62.5/125 µm
4
3
2
50/125 µm
1
0
0
0.5
1
1.5
2
FIBER OPTIC CABLE LENGTH – km
RECEIVER
Figure 3. Pinout drawing.
Figure 4. Optical power budget at BOL vs. fiber optic cable length.
Each transmitter and receiver package includes an internal
shield for the electrical subassembly to ensure low EMI
emissions and high immunity to external EMI fields.
Figure 4 illustrates the predicted OPB associated with
the transmitter and receiver specified in this data sheet
at the Beginning of Life (BOL). This curve represents the
attenuation and chromatic plus modal dispersion losses
associated with 62.5/125 m and 50/125 m fiber cables
only. The area under the curve represents the remaining
OPB at any link length, which is available for overcoming
non-fiber cable related losses.
The outer housing, including the ST* port, is molded of
filled, non-conductive plastic to provide mechanical
strength and electrical isolation. For other port
styles, please contact your Avago Technologies Sales
Representative.
Each data-link module is attached to a printed circuit
board via the 16-pin DIP interface. Pins 8 and 9 provide
mechanical strength for these plastic-port devices and
will provide port-ground for forthcoming metal-port
modules.
Application Information
The Applications Engineering group of the Fiber Optics
Product Division is available to assist you with the technical
understanding and design tradeoffs associated with these
transmitter and receiver modules. You can contact them
through your Avago Technologies sales representative.
The following information is provided to answer some of
the most common questions about the use of these parts.
Transmitter and Receiver Optical Power Budget versus
Link Length
The Optical Power Budget (OPB) is the available optical
power for a fiber-optic link to accommodate fiber cable
losses plus losses due to in-line connectors, splices,
optical switches, and to provide margin for link aging and
unplanned losses due to cable plant reconfiguration or
repair.
* ST is a registered trademark of AT&T Lightguide Cable Connectors.
3
Avago LED technology has produced 1300 nm LED devices
with lower aging characteristics than normally associated
with these technologies in the industry. The industry convention is 1.5 dB aging for 1300 nm LEDs; however, Avago
1300 nm LEDs will experience less than 1 dB of aging
over normal commercial equipment mission-life periods.
Contact your Avago Technologies sales representative for
additional details.
Figure 4 was generated with an Avago fiber-optic link
model containing the current industry conventions for
fiber cable specifications and Fibre Channel optical parameters. These parameters are reflected in the guaranteed
performance of the transmitter and receiver specifications
in this data sheet. This same model has been used extensively in the ANSI and IEEE committees, including the ANSI
X3T9.5 committee, to establish the optical performance
requirements for various fiber-optic interface standards.
The cable parameters used come from the ISO/IEC JTC1/
SC 25/WG3 Generic Cabling for Customer Premises per
DIS 11801 document and the EIA/TIA-568-A Commercial Building Telecommunications Cabling Standard per
SP-2840.
Transmitter and Receiver Signaling Rate Range and
BER Performance
For purposes of definition, the symbol rate (Baud), also
called signaling rate, is the reciprocal of the symbol time.
Data rate (bits/sec) is the symbol rate divided by the
encoding factor used to encode the data (symbols/bit).
The specifications in this data sheet have all been
measured using the standard Fibre Channel symbol rate
of 266 MBd.
The data link modules can be used for other applications at signaling rates different than specified in this
data sheet. Depending on the actual signaling rate, there
may be some differences in optical power budget. This is
primarily caused by a change in receiver sensitivity.
These data link modules can also be used for applications
which require different bit-error-ratio (BER) performance.
Figure 5 illustrates the typical trade-off between link BER
and the receiver input optical power level.
Data Link Jitter Performance
The Avago 1300 nm data link modules are designed to
operate per the system jitter allocations stated in FC-PH
Annex A.4.3 and A.4.4.
The 1300 nm transmitter will tolerate the worst-case input
electrical jitter allowed, without violating the worst-case
output jitter requirements.
The 1300 nm receiver will tolerate the worst-case input
optical jitter allowed without violating the worst-case
output electrical jitter allowed.
BIT ERROR RATIO
1 x 10-4
CENTER OF SYMBOL
10-5
-4
-2
0
2
RELATIVE INPUT OPTICAL POWER – dB
CONDITIONS:
1. 266 MBd
2. PRBS 27-1
3. TA = 25 °C
4. VCC = 5 Vdc
5. INPUT OPTICAL RISE/FALL TIMES =
1.0/1.9 ns
Figure 5. HFBR-1119TZ/2119TZ bit-error-ratio vs. relative receiver input
optical power.
4
It is advised that normal static precautions be taken in
the handling and assembly of these data link modules to
prevent damage which may be induced by electrostatic
discharge (ESD). The HFBR-1119TZ/-2119TZ series meets
MIL-STD-883C Method 3015.4 Class 2.
Care should be taken to avoid shorting the receiver Data
or Signal Detect Outputs directly to ground without
proper currentlimiting impedance.
Solder and Wash Process Compatibility
The transmitter and receiver are delivered with protective process caps covering the individual ST* ports. These
process caps protect the optical subassemblies during
wave solder and aqueous wash processing and act as dust
covers during shipping.
These data link modules are compatible with either
industry standard wave- or hand-solder processes.
Shipping Container
Board Layout – Interface Circuit and Layout Guidelines
1 x 10-3
1 x 10-6
1 x 10-7
1 x 10-8
1 x 10-9
1 x 10-10
1 x 10-11
1 x 10-12
-6
Recommended Handling Precautions
The data link modules are packaged in a shipping
container designed to protect it from mechanical and ESD
damage during shipment or storage.
1 x 10-2
1x
The jitter specifications stated in the following transmitter
and receiver specification tables are derived from the
values in FC-PH Annex A.4.3 and A.4.4. They represent
the worst-case jitter contribution that the transmitter and
receiver are allowed to make to the overall system jitter
without violating the allowed allocation. In practice, the
typical jitter contribution of the Avago data link modules
is well below the maximum allowed amounts.
It is important to take care in the layout of your circuit
board to achieve optimum performance from these data
link modules. Figure 6 provides a good example of a
power supply filter circuit that works well with these parts.
Also, suggested signal terminations for the Data, Data-bar,
Signal Detect and Signal Detect-bar lines are shown. Use
of a multilayer, ground-plane printed circuit board will
provide good high-frequency circuit performance with
a low inductance ground return path. See additional
recommendations noted in the interface schematic
shown in Figure 6.
Rx
Tx
*
A
L2
1
+5 Vdc
C2
0.1
GND
9 NC
NC 8
10 GND
NO 7
PIN
11 VCC1
*
*
9 NC
NC 8
GND 7
GND 6
10 NO
PIN
11 GND
12 VCC
GND 5
12 GND
VCC 5
VCC 4
13 GND
GND 4
13 GND
14 D
GND 3
14 SD
D 3
DATA
15 D
VBB 2
15 SD
D 2
NC 1
NO
16 PIN
NC 1
R2
82
R4
130
R1
130
16 NC
L1
1
VCC 6
DATA
R3
82
*
C1
0.1
C7
10
(OPTIONAL)
C3
0.1
C4
10
A
DATA
DATA
R7
82
C6
0.1
R5
82
R8
130
R6
130
R9
82
C2
0.1
R11
82
SD
SD
TERMINATE D, D
AT Tx INPUTS
TOP VIEWS
R10
130
R12
130
TERMINATE D, D, SD, SD
INPUTS OF FOLLOW-ON DEVICES
Notes:
1. Resistance is in ohms. Capacitance is in microfarads. Inductance is in microhenries.
2. Terminate transmitter input data and data-bar at the transmitter input pins. Terminate the receiver output data, data-bar, and signal detect-bar at
the follow-on device input pins. For lower power dissipation in the signal detect termination circuitry with small compromise to the signal quality,
each signal detect output can be loaded with 510 ohms to ground instead of the two resistor, split-load pecl termination shown in this schematic.
3. Make differential signal paths short and of same length with equal termination impedance.
4. Signal traces should be 50 ohms microstrip or stripline transmission lines. Use multilayer, ground-plane printed circuit board for best highfrequency performance.
5. Use high-frequency, monolithic ceramic bypass capacitors and low series DC resistance inductors. Recommend use of surface-mount coil
inductors and capacitors. In low noise power supply systems, ferrite bead inductors can be substituted for coil inductors. Locate power supply
filter components close to their respective power supply pins. C7 is an optional bypass capacitor for improved, low-frequency noise power supply
filter performance.
6. Device ground pins should be directly and individually connected to ground.
7. Caution: do not directly connect the fiber-optic module PECL outputs (data, data-bar, signal detect, signal detect-bar, VBB) to ground without
proper current limiting impedance.
8. (*) Optional metal ST optical port transmitter and receiver modules will have pins 8 and 9 electrically connected to the metal port only and not
connected to the internal signal ground.
Figure 7. Recommended interface circuitry and power supply filter circuits.
5
Board Layout – Hole Pattern
The Avago transmitter and receiver hole pattern is compatible with other data link modules from other vendors.
The drawing shown in Figure 7 can be used as a guide in
the mechanical layout of your circuit board.
Regulatory Compliance
These data link modules are intended to enable commercial system designers to develop equipment that
complies with the various international regulations
governing certification of Information Technology Equipment. Additional information is available from your Avago
sales representative.
(16X) ø 0.8 ± 0.1
.032 ± .004
All HFBR-1119TZ LED transmitters are classified as
IEC-825-1 Accessible Emission Limit (AEL) Class 1 based
upon the current proposed draft scheduled to go into
effect on January 1, 1997. AEL Class 1 LED devices are considered eye safe. See Application Note 1094, LED Device
Classifications with Respect to AEL Values as Defined in the
IEC 825-1 Standard and the European EN60825-1 Directive.
The material used for the housing in the HFBR-1119TZ/2119TZ series is Ultem 2100 (GE). Ultem 2100 is recognized for a UL flammability rating of 94V-0 (UL File Number
E121562) and the CSA (Canadian Standards Association)
equivalent (File Number LS88480).
–A–
Ø 0.000 M A
17.78
.700
(7X) 2.54
.100
7.62
.300
TOP VIEW
UNITS = mm/INCH
220
200
180
tr = 1.8 ns
tr = 1.9 ns
160
tr = 2.0 ns
140
tr = 2.1 ns
120
tr = 2.2 ns
TRANSMITTER
OUTPUT OPTICAL
RISE TIMES – ns
100
80
60
1280
1300
1320
1340
1360
1380
Oc – TRANSMITTER OUTPUT OPTICAL
CENTER WAVELENGTH – nm
HFBR-1119TZ TYPICAL TRANSMITTER TEST
RESULTS OF Oc, 'O AND tr ARE CORRELATED
AND COMPLY WITH THE ALLOWED SPECTRAL
WIDTH AS A FUNCTION OF CENTER WAVELENGTH
FOR VARIOUS RISE AND FALL TIMES.
Figure 8. Typical transmitter output optical spectral width (FWHM) vs.
transmitter output optical center wavelength and rise/fall times.
6
RELATIVE INPUT OPTICAL POWER – dB
'Oc – TRANSMITTER OUTPUT OPTICAL
SPECTRAL WIDTH (FWHM) – nm
Figure 7. Recommended board layout hole pattern.
5
4
3
2
1
0
-1.5
-1
-0.5
0
0.5
1
1.5
EYE SAMPLING TIME POSITION – ns
CONDITIONS:
1. TA = 25 °C
2. VCC = 5 Vdc
3. INPUT OPTICAL RISE/FALL TIMES = 1.0/1.9 ns
4. INPUT OPTICAL POWER IS NORMALIZED
TO CENTER OF DATA SYMBOL
5. NOTES 11 AND 12 APPLY
Figure 9. HFBR-2119TZ receiver relative input optical power vs. eye sampling
time position.
HFBR-1119TZ Transmitter Pin-Out Table
Pin
Symbol
Functional Description
Reference
1
NC
No internal connect, used for mechanical strength only
2
VBB
VBB Bias output
3
GND
Ground
Note 3
4
GND
Ground
Note 3
5
GND
Ground
Note 3
6
GND
Ground
Note 3
7
OMIT
No pin
8
NC
No internal connect, used for mechanical strength only
Note 5
9
NC
No internal connect, used for mechanical strength only
Note 5
10
GND
Ground
Note 3
11
VCC
Common supply voltage
Note 1
12
VCC
Common supply voltage
Note 1
13
GND
Ground
Note 3
14
DATA
Data input
Note 4
15
DATA
Inverted Data input
Note 4
16
NC
No internal connect, used for mechanical strength only
HFBR-2119TZ Receiver Pin-Out Table
Pin
Symbol
Functional Description
Reference
1
NC
No internal connect, used for mechanical strength only
2
DATA
Inverted Data input
Note 4
3
DATA
Data input
Note 4
4
VCC
Common supply voltage
Note 1
5
VCC
Common supply voltage
Note 1
6
VCC
Common supply voltage
Note 1
7
GND
Ground
Note 3
8
NC
No internal connect, used for mechanical strength only
Note 5
9
NC
No internal connect, used for mechanical strength only
Note 5
10
OMIT
No pin
11
GND
Ground
Note 3
12
GND
Ground
Note 3
13
GND
Ground
Note 3
14
SD
Signal Detect
Note 2, 4
15
SD
Inverted Signal Detect
Note 2, 4
16
OMIT
No pin
Notes:
1. Voltages on VCC must be from the same power supply (they are connected together internally).
2. Signal Detect is a logic signal that indicates the presence or absence of an input optical signal. A logic-high, VOH, on Signal Detect indicates
presence of an input optical signal. A logic-low, VOL, on Signal Detect indicates an absence of input optical signal.
3. All GNDs are connected together internally and to the internal shield.
4. DATA, DATA, SD, SD are open-emitter output circuits.
5. On metal-port modules, these pins are redefined as “Port Connection.”
7
Specifications – Absolute Maximum Ratings
Parameter
Symbol
Min.
Typ.
Max.
Unit
Reference
Storage Temperature
TS
-40
100
°C
Lead Soldering Temperature
TSOLD
260
°C
Lead Soldering Time
tSOLD
10
sec.
Supply Voltage
VCC
-0.5
7.0
V
Data Input Voltage
VI
-0.5
VCC
V
Differential Input Voltage
VD
1.4
V
Note 1
Output Current
IO
50
mA
Note 2
Max.
Unit
Reference
Recommended Operating Conditions
Parameter
Symbol
Min.
Typ.
Ambient Operating Temperature
TA
0
70
°C
Supply Voltage
VCC
4.5
5.5
V
Data Input Voltage – Low
VIL - VCC
-1.810
-1.475
V
Data Input Voltage – High
VIH - VCC
-1.165
-0.880
V
Data and Signal Detect Output Load
RL
50

Note 3
HFBR-1119TZ Transmitter Electrical Characteristics
(TA = 0° C to +70° C, VCC = 4.5 V to 5.5 V)
Parameter
Symbol
Supply Current
ICC
Min.
Typ.
Max.
Unit
Reference
165
185
mA
Note 4
Power Dissipation
PDISS
0.86
1.1

Note 16
Threshold Voltage
VBB - VCC
-1.42
-1.3
-1.24
V
Note 21
Data Input Current – Low
IIL
-350
0
Data Input Current – High
IIH
A
14
350
A
HFBR-2119TZ Receiver Electrical Characteristics
(TA = 0° C to +70° C, VCC = 4.5 V to 5.5 V)
Parameter
Symbol
Typ.
Max.
Unit
Reference
Supply Current
ICC
Min.
100
165
mA
Note 15
Power Dissipation
PDISS
0.3
0.5

Note 16
Data Output Voltage – Low
VOL - VCC
-1.840
-1.620
V
Note 17
Data Output Voltage – High
VOH - VCC
-1.045
-0.880
V
Note 17
Data Output Rise Time
tr
0.35
2.2
ns
Note 18
Data Output Fall Time
tf
0.35
2.2
ns
Note 18
Signal Detect Output Voltage –
Low (De-asserted)
VOL - VCC
-1.840
-1.620
V
Note 17
Signal Detect Output Voltage –
High (Asserted)
VOH - VCC
-1.045
-0.880
V
Note 17
Signal Detect Output Rise Time
tr
0.35
2.2
ns
Note 18
Signal Detect Output Fall Time
tf
0.35
2.2
ns
Note 18
Signal Detect Asserted Time (off to on)
tSDA
0
55
100
s
Note 19
Signal Detect De-asserted Time (on to off )
tSDD
0
110
350
s
Note 20
8
HFBR-1119TZ Transmitter Optical Characteristics
(TA = 0° C to +70° C, VCC = 4.5 V to 5.5 V)
Parameter
Symbol
Min.
Max.
Unit
Reference
Output Optical Power
62.5/125 m, NA = 0.275 fiber
PO, BOL
PO, EOL
-19
-20
Typ.
-14
-14
dBm avg.
Note 5
Output Optical Power
50/125 m, NA = 0.20 fiber
PO, BOL
-22.5
-14
dBm avg.
Note 5
0.03
-35
%
dB
Note 6
1380
nm
Note 7
Figure 8
nm
Note 7
Figure 8
Optical Extinction Ratio
Center Wavelength
C
Spectral Width – FWHM

Optical Rise Time
tr
0.6
2.0
ns
Note 8
Figure 8
Optical Fall Time
tf
0.6
2.2
ns
Note 8
Figure 8
Deterministic Jitter Contributed by
the Transmitter
DJC
0.08
0.30
ns rms
ns p-p
Note 9
Random Jitter Contributed by
the Transmitter
RJC
0.03
0.11
ns p-p
ns p-p
Note 10
1270
1310
137
HFBR-2119TZ Receiver Optical Characteristics
(TA = 0° C to +70° C, VCC = 4.5 V to 5.5 V)
Parameter
Symbol
Max.
Unit
Reference
Input Optical Power
Minimum at Window Edge
PIN Min. (W)
-26
dBm avg.
Note 11
Figure 9
Input Optical Power
Minimum at Eye Center
PIN Min. (C)
-28
dBm avg.
Note 12
Figure 9
Input Optical Power Maximum
PIN Max.
-14
dBm avg.
Note 11
Operating Wavelength

1270
1380
nm
Signal Detect – Asserted
PA
PD +1.5 dB
-27
dBm avg.
Note 13, 19
Signal Detect – De-asserted
PD
-45
dBm avg.
Note 14, 20
Signal Detect – Hysteresis
PA – PD
1.5
dB
Deterministic Jitter Contributed by
the Receiver
DJC
0.24
0.90
ns rms
ns p-p
Note 9, 11
Random Jitter Contributed by
the Receiver
RJC
0.26
0.97
ns rms
ns p-p
Note 10, 11
9
Min.
Typ.
Notes:
1. This is the maximum voltage that can be applied across the
Differential Transmitter Data Inputs to prevent damage to the input
ESD protection circuit.
2. When component testing these products, do not short the receiver
Data or Signal Detect outputs directly to ground to avoid damage to
the part.
3. The outputs are terminated with 50  connected to VCC - 2 V.
4. The power supply current needed to operate the transmitter is
provided to differential ECL circuitry. This circuitry maintains a nearly
constant current flow from the power supply. Constant current
operation helps to prevent unwanted electrical noise from being
generated and conducted or emitted to neighboring circuitry.
5. These optical power values are measured as follows:
 The Beginning of Life (BOL) to the End of Life (EOL) optical power
degradation is typically 1.5 dB per the industry convention for
long wavelength LEDs. The actual degradation observed in Avago
Technologies’s 1300 nm LED products is < 1 dB, as specified in
this data sheet.
 Over the specified operating voltage and temperature ranges.
 With 25 MBd (12.5 MHz square-wave), input signal.
 At the end of one meter of noted optical fiber with cladding
modes removed.
The average power value can be converted to a peak power value by
adding 3 dB. Higher output optical power transmitters are available
on special request.
6. The Extinction Ratio is a measure of the modulation depth of the
optical signal. The data “0” output optical power is compared to the
data “1” peak output optical power and expressed as a percentage.
With the transmitter driven by a 12.5 MHz square-wave signal, the
average optical power is measured. The data “1” peak power is
then calculated by adding 3 dB to the measured average optical
power. The data “0” output optical power is found by measuring
the optical power when the transmitter is driven by a logic “0”
input. The extinction ratio is the ratio of the optical power at the “0”
level compared to the optical power at the “1” level expressed as a
percentage or in decibels.
7. This parameter complies with the requirements for the tradeoffs
between center wave length, spectral width, and rise/fall times
shown in Figure 8.
8. The optical rise and fall times are measured from 10% to 90% when
the transmitter is driven by a 25 MBd (12.5 MHz squarewave) input
signal. This parameter complies with the requirements for the
tradeoffs between center wavelength, spectral width, and rise/fall
times shown in Figure 8.
9. Deterministic Jitter is defined as the combination of Duty Cycle
Distortion and Data Dependent Jitter. Deterministic Jitter is
measured with a test pattern consisting of repeating K28.5
(00111110101100000101) data bytes and evaluated per the method
in FC-PH Annex A.4.3.
For product information and a complete list of distributors, please go to our web site:
10. Random Jitter is specified with a sequence of K28.7 (square wave
of alternating 5 ones and 5 zeros) data bytes and, for the receiver,
evaluated at a Bit- Error-Ratio (BER) of 1 x 10-12 per the method in
FC-PH Annex A.4.4.
11. This specification is intended to indicate the performance of the
receiver when Input Optical Power signal characteristics are present
per the following definitions. The Input Optical Power dynamic
range from the minimum level (with a window time-width) to the
maximum level is the range over which the receiver is guaranteed to
provide output data with a Bit-Error-Ratio (BER) better than or equal
to 1 x 10-12.
 At the Beginning of Life (BOL).
 Over the specified operation temperature and voltage ranges.
 Input symbol pattern is a 266 MBd, 27 - 1 pseudo-random bit
stream data pattern.
 Receiver data window time-width is ± 0.94 ns or greater and
centered at mid-symbol. This data window time width is
calculated to simulate the effect of worst-case input jitter per
FCPH Annex J and clock recovery sampling position in order to
insure good operation with the various FC-0 receiver circuits.
 The maximum total jitter added by the receiver and the maximum
total jitter presented to the clock recovery circuit comply with the
maximum limits listed in Annex J, but the allocations of the Rx
added jitter between deterministic jitter and random jitter are
different than in Annex J.
12. All conditions of Note 11 apply except that the measurement is
made at the center of the symbol with no window time-width.
13. This value is measured during the transition from low to high levels
of input optical power.
14. This value is measured during the transition from high to low levels
of input optical power.
15. These values are measured with the outputs terminated into 50 
connected to VCC - 2 V and an input optical power level of -14 dBm
average.
16. The power dissipation value is the power dissipated in the
transmitter or the receiver itself. Power dissipation is calculated
as the sum of the products of supply voltage and supply current,
minus the sum of the products of the output voltages and currents.
17. These values are measured with respect to VCC with the output
terminated into 50  connected to VCC - 2 V.
18. The output rise and fall times are measured between 20% and 80%
levels with the output connected to VCC - 2 V through 50 .
19. The Signal Detect output shall be asserted, logic-high (VOH), within
100 s after a step increase of the Input Optical Power.
20. Signal Detect output shall be de-asserted, logic-low (VOL), within
350 s after a step decrease in the Input Optical Power.
21. This value is measured with an output load RL = 10 k.
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Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved. Obsoletes AV01-0153EN
AV02-3571EN - June 11, 2012