ATM Multimode Fiber Transceivers for SONET OC-3/SDH STM-1 in Low Cost 2 x 5 Package Style Technical Data HFBR-5905 1300 nm 2 km Features • Multisourced 2 x 5 Package Style with MT-RJ Receptacle • Single +3.3 V Power Supply • Wave Solder and Aqueous Wash Process Compatibility • Manufactured in an ISO 9002 Certified Facility • Full Compliance with ATM Forum UNI SONET OC-3 Multimode Fiber Physical Layer Specification Applications • Multimode Fiber ATM Backbone Links • Multimode Fiber ATM Wiring Closet to Desktop Links Description The HFBR-5900 family of transceivers from Agilent provide the system designer with products to implement a range of solutions for multimode fiber SONET OC-3 (SDH STM-1) physical layers for ATM and other services. These transceivers are all supplied in the new industry standard 2 x 5 DIP style with a MT-RJ fiber connector interface. ATM 2 km Backbone Links The HFBR-5905 is a 1300 nm product with optical performance compliant with the SONET STS-3c (OC-3) Physical Layer Interface Specification. This physical layer is defined in the ATM Forum UserNetwork Interface (UNI) Specification Version 3.0. This document references the ANSI T1E1.2 specification for the details of the interface for 2 km multimode fiber backbone links. The ATM 100 Mb/s-125 MBd Physical Layer interface is best implemented with the HFBR-5903 family of FDDI Transceivers which are specified for use in this 4B/5B encoded physical layer per the FDDI PMD standard. Transmitter Sections The transmitter section of the HFBR-5905 utilizes a 1300 nm InGaAsP LED. This LED is packaged in the optical subassembly portion of the transmitter section. It is driven by a custom silicon IC which converts differential PECL logic signals, ECL referenced (shifted) to a +3.3 V supply, into an analog LED drive current. Powered by ICminer.com Electronic-Library Service CopyRight 2003 Receiver Sections The receiver section of the HFBR-5905 utilizes an InGaAs PIN photodiode coupled to a custom silicon transimpedance preamplifier IC. It is packaged in the optical subassembly portion of the receiver. This PIN/preamplifier combination is coupled to a custom quantizer IC which provides the final pulse shaping for the logic output and the Signal Detect function. The Data output is differential. The Signal Detect output is singleended. Both Data and Signal Detect outputs are PECL compatible, ECL referenced (shifted) to a 3.3 V power supply. The receiver outputs, Data Out and Data Out Bar, are squelched at Signal Detect Deassert. That is, when the light input power decreases to a typical -38 dBm or less, the Signal Detect Deasserts, i.e. the Signal Detect output goes to a PECL low state. This forces the receiver outputs, Data Out and Data Out Bar to go to steady PECL levels High and Low respectively. 2 Package The overall package concept for the Agilent transceiver consists of three basic elements; the two optical subassemblies, an electrical subassembly, and the housing as illustrated in the block diagram in Figure 1. The package outline drawing and pin out are shown in Figures 2 and 3. The details of this package outline and pin out are compliant with the multisource definition of the 2 x 5 DIP. The low profile of the Agilent transceiver design complies with the maximum height allowed for the MT-RJ connector over the entire length of the package. The optical subassemblies utilize a high-volume assembly process together with low-cost lens elements which result in a costeffective building block. The electrical subassembly consists of a high volume multilayer printed circuit board on which the IC and various surface-mounted passive circuit elements are attached. The receiver section includes an internal shield for the electrical and optical subassemblies to ensure high immunity to external EMI fields. The outer housing including the MT-RJ ports is molded of filled nonconductive plastic to provide mechanical strength and electrical isolation. The solder posts of the Agilent design are isolated from the internal circuit of the transceiver. The transceiver is attached to a printed circuit board with the ten signal pins and the two solder posts which exit the bottom of the housing. The two solder posts provide the primary mechanical strength to withstand the loads imposed on the transceiver by mating with the MT-RJ connectored fiber cables. RX SUPPLY DATA OUT DATA OUT QUANTIZER IC SIGNAL DETECT PIN PHOTODIODE PRE-AMPLIFIER SUBASSEMBLY RX GROUND MT-RJ RECEPTACLE TX GROUND DATA IN DATA IN LED DRIVER IC TX SUPPLY Figure 1. Block Diagram. Powered by ICminer.com Electronic-Library Service CopyRight 2003 LED OPTICAL SUBASSEMBLY 3 13.97 (0.55) MIN. 4.5 ±0.2 (0.177 ±0.008) (PCB to OPTICS CENTER LINE) 5.15 (0.20) (PCB to OVERALL RECEPTACLE CENTER LINE) FRONT VIEW 10.0 13.59 (0.535) (0.394) MAX. MAX. TOP VIEW 10.16 (0.4) Pin 1 7.59 (0.299) 8.6 (0.339) 1.778 (0.07) +0 -0.2 (+000) (0.024) (-008) Ø 0.61 Ø1.5 (0.059) 12.4 (0.488) 17.778 (0.7) 7.112 (0.28) 48.57 (1.912) 36.04 (1.419) MAX. 9.3 9.8 (0.386) (0.366) MAX. MAX. SIDE VIEW 3.3 (0.13) Ø 1.07 (0.042) DIMENSIONS IN MILLIMETERS (INCHES) NOTES: 1. THIS PAGE DESCRIBES THE MAXIMUM PACKAGE OUTLINE, MOUNTING STUDS, PINS AND THEIR RELATIONSHIPS TO EACH OTHER. 2. TOLERANCED TO ACCOMMODATE ROUND OR RECTANGULAR LEADS. 3. ALL 12 PINS AND POSTS ARE TO BE TREATED AS A SINGLE PATTERN. 4. THE MT-RJ HAS A 750 µm FIBER SPACING. 5. THE MT-RJ ALIGNMENT PINS ARE IN THE MODULE. 6. FOR SM MODULES, THE FERRULE WILL BE PC POLISHED (NOT ANGLED). 7. SEE MT-RJ TRANSCEIVER PIN OUT DIAGRAM FOR DETAILS. Figure 2. Package Outline Drawing Powered by ICminer.com Electronic-Library Service CopyRight 2003 4 RX TX Mounting Studs/Solder Posts Top View RECEIVER SIGNAL GROUND RECEIVER POWER SUPPLY SIGNAL DETECT RECEIVER DATA OUT BAR RECEIVER DATA OUT f f f f f f f 8 f 7 f 6 f 1 10 2 9 3 4 5 TRANSMITTER DATA IN BAR TRANSMITTER DATA IN TRANSMITTER DISABLE (LASER BASED PRODUCTS ONLY) TRANSMITTER SIGNAL GROUND TRANSMITTER POWER SUPPLY Figure 3. Pin Out Diagram. Pin Descriptions: Pin 1 Receiver Signal Ground VEE RX: Directly connect this pin to the receiver ground plane. Pin 2 Receiver Power Supply VCC RX: Provide +3.3 V dc via the recommended receiver power supply filter circuit. Locate the power supply filter circuit as close as possible to the VCC RX pin. Pin 3 Signal Detect SD: Normal optical input levels to the receiver result in a logic “1” output. Low optical input levels to the receiver result in a fault condition indicated by a logic “0” output. This Signal Detect output can be used to drive a PECL input on an upstream circuit, such as Signal Detect input or Loss of Signal-bar. Pin 4 Receiver Data Out Bar RD-: No internal terminations are provided. See recommended circuit schematic. Pin 5 Receiver Data Out RD+: No internal terminations are provided. See recommended circuit schematic. Pin 6 Transmitter Power Supply VCC TX: Provide +3.3 V dc via the recommended transmitter power supply filter circuit. Locate the power supply filter circuit as close as possible to the VCC TX pin. Pin 7 Transmitter Signal Ground VEE TX: Directly connect this pin to the transmitter ground plane. Powered by ICminer.com Electronic-Library Service CopyRight 2003 Pin 8 Transmitter Disable TDIS: No internal connection. Optional feature for laser based products only. For laser based products connect this pin to +3.3 V TTL logic high “1” to disable module. To enable module connect to TTL logic low “0”. Pin 9 Transmitter Data In TD+: No internal terminations are provided. See recommended circuit schematic. Pin 10 Transmitter Data In Bar TD-: No internal terminations are provided. See recommended circuit schematic. Mounting Studs/Solder Posts The mounting studs are provided for transceiver mechanical attachment to the circuit board. It is recommended that the holes in the circuit board be connected to chassis ground. 5 The Applications Engineering group is available to assist you with the technical understanding and design trade-offs associated with these transceivers. You can contact them through your Agilent sales representative. The following information is provided to answer some of the most common questions about the use of these parts. Transceiver Optical Power Budget versus Link Length Optical Power Budget (OPB) is the available optical power for a fiber optic link to accommodate fiber cable losses plus losses due to in-line connectors, splices, optical switches, and to provide margin for link aging and unplanned losses due to cable plant reconfiguration or repair. Figure 4 illustrates the predicted OPB associated with the transceiver specified in this data sheet at the Beginning of Life (BOL). These curves represent the attenuation and chromatic plus modal dispersion losses associated with the 62.5/125 µm and 50/125 µm fiber cables only. 12 HFBR-5905, 62.5/125 µm OPTICAL POWER BUDGET (dB) 10 8 HFBR-5905 50/125 µm 6 4 Agilent LED technology has produced 1300 nm LED devices with lower aging characteristics than normally associated with these technologies in the industry. The industry convention is 1.5 dB aging for 1300 nm LEDs. The 1300 nm Agilent LEDs are specified to experience less than 1 dB of aging over normal commercial equipment mission life periods. Contact your Agilent sales representative for additional details. Figure 4 was generated for the 1300 nm transceivers with a Agilent fiber optic link model containing the current industry conventions for fiber cable specifications and the draft ANSI T1E1.2. These optical parameters are reflected in the guaranteed performance of the transceiver specifications in this data sheet. This same model has been used extensively in the ANSI and IEEE committees, including the ANSI T1E1.2 committee, to establish the optical performance requirements for various fiber optic interface standards. The cable parameters used come from the ISO/IEC JTC1/SC 25/WG3 Generic Cabling for Customer Premises per DIS 11801 document and the EIA/TIA-568-A Commercial Building Telecommunications Cabling Standard per SP-2840. 2 0 0. 3 0.5 1.0 1.5 2.0 2.5 FIBER OPTIC CABLE LENGTH (km) Figure 4. Typical Optical Power Budget at BOL versus Fiber Optic Cable Length. Powered by ICminer.com Electronic-Library Service CopyRight 2003 Transceiver Signaling Operating Rate Range and BER Performance For purposes of definition, the symbol (Baud) rate, also called signaling rate, is the reciprocal of the symbol time. Data rate (bits/ sec) is the symbol rate divided by the encoding factor used to encode the data (symbols/bit). When used in 155 Mb/s SONET OC-3 applications the performance of the 1300 nm transceivers, HFBR-5905 is guaranteed to the full conditions listed in product specification tables. The transceivers may be used for other applications at signaling rates different than 155 Mb/s with some variation in the link optical power budget. Figure 5 gives an indication of the typical performance of these products at different rates. 2.5 TRANSCEIVER RELATIVE POWER BUDGET AT CONSTANT BER (dB) The area under the curves represents the remaining OPB at any link length, which is available for overcoming nonfiber cable related losses. Application Information 2 1.5 1 0.5 0 -0.5 -1 0 25 50 75 100 125 150 175 200 SIGNAL RATE (MBd) CONDITIONS: 1. PRBS 2 7-1 2. DATA SAMPLED AT CENTER OF DATA SYMBOL. 3. BER = 10 -6 4. TA = +25° C 5. VCC = 3.3 V dc 6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns. Figure 5. Transceiver Relative Optical Power Budget at Constant BER vs. Signaling Rate. These transceivers can also be used for applications which require different Bit Error Rate (BER) performance. Figure 6 illustrates the typical trade-off between link BER and the receivers input optical power level. 6 to the overall system jitter without violating the Annex B allocation example. In practice, the typical contribution of the Agilent transceivers is well below these maximum allowed amounts. The Agilent 1300 nm transmitters will tolerate the worst case input electrical jitter allowed in Annex B without violating the worst case output optical jitter requirements. Recommended Handling Precautions Agilent recommends that normal static precautions be taken in the handling and assembly of these transceivers to prevent damage which may be induced by electrostatic discharge (ESD). The HFBR-5900 series of transceivers meet MIL-STD-883C Method 3015.4 Class 2 products. The Agilent 1300 nm receivers will tolerate the worst case input optical jitter allowed in Annex B without violating the worst case output electrical jitter allowed. The jitter specifications stated in the following 1300 nm transceiver specification tables are derived from the values in Table B1 of Annex B. They represent the worst case jitter contribution that the transceivers are allowed to make TERMINATE AT TRANSCEIVER INPUTS 100 8 7 1 2 3 VCC TX f f f 4 5 W HFBR-5905 SERIES 1 x 10-5 1 x 10-6 CENTER OF SYMBOL 1 x 10-7 1 x 10-8 1 x 10-9 1 x 10-10 1 x 10-11 1 x 10-12 -6 -4 -2 0 2 RELATIVE INPUT OPTICAL POWER - dB Figure 6. Bit Error Rate vs. Relative Receiver Input Optical Power. Z = 50 W TD- Z = 50 W TD+ 1 µH C2 LVPECL W 130 W VCC (+3.3 V) C3 10 µF VCC (+3.3 V) 1 µH f RD+ C1 130 W W Z = 50 W Z = 50 W 100 Figure 7. Recommended Decoupling and Termination Circuits Powered by ICminer.com Electronic-Library Service CopyRight 2003 W LVPECL RD- VCC (+3.3 V) 130 W SD 82 Note: C1 = C2 = C3 = 10 nF or 100 nF 4 CONDITIONS: 1. 125 MBd 2. PRBS 2 7-1 3. CENTER OF SYMBOL SAMPLING 4. TA = +25°C 5. VCC = 3.3 V dc 6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns. VCC (+3.3 V) Z = 50 130 1 x 10-4 PHY DEVICE 130 f RD+ f SD VCC RX RX VEE RX TX f 1 x 10-3 Care should be used to avoid shorting the receiver data or signal detect outputs directly to ground without proper current limiting impedance. 6 f N/C TD- TD+ f VEE TX 9 f RD- 10 W 1 x 10-2 BIT ERROR RATE Transceiver Jitter Performance The Agilent 1300 nm transceivers are designed to operate per the system jitter allocations stated in Table B1 of Annex B of the draft ANSI T1E1.2 Revision 3 standard. W TERMINATE AT DEVICE INPUTS 7 frequency board layout practices. Figures 7 and 8 show two recommended termination schemes. Board Layout - Decoupling Circuit, Ground Planes and Termination Circuits It is important to take care in the layout of your circuit board to achieve optimum performance from these transceivers. Figure 7 provides a good example of a schematic for a power supply decoupling circuit that works well with these parts. It is further recommended that a contiguous ground plane be provided in the circuit board directly under the transceiver to provide a low inductance ground for signal return current. This recommendation is in keeping with good high Solder and Wash Process Compatibility The transceivers are delivered with protective process plugs inserted into the MT-RJ receptacle. This process plug protects the optical subassemblies during wave solder and aqueous wash processing and acts as a dust cover during shipping. These transceivers are compatible with either industry standard wave or hand solder processes. Shipping Container The transceiver is packaged in a shipping container designed to protect it from mechanical and ESD damage during shipment or storage. Board Layout - Hole Pattern The Agilent transceiver complies with the circuit board “Common Transceiver Footprint” hole pattern defined in the original multisource announcement which defined the 2 x 5 package style. This drawing is reproduced in Figure 9 with the addition of ANSI Y14.5M compliant dimensioning to be used as a guide in the mechanical layout of your circuit board. TERMINATE AT TRANSCEIVER INPUTS PHY DEVICE VCC (+3.3 V) VCC (+3.3 V) 130 10 9 8 7 82 6 VCC TX N/C VEE TX RD+ RX RD- TD+ VCC RX TX SD TDVEE RX f f f f f f f f f f 1 2 3 4 W W 130 82 10 nF W Z = 50 W TD- Z = 50 W TD+ LVPECL W VCC (+3.3 V) 1 µH C2 VCC (+3.3 V) C3 VCC (+3.3 V) 10 nF 10 µF 130 W 130 W RD+ 1 µH 5 C1 LVPECL Z = 50 W W VCC (+3.3 V) Z = 50 Z = 50 W 130 RD- Figure 8. Alternative Termination Circuits Powered by ICminer.com Electronic-Library Service CopyRight 2003 10 nF 82 W 82 W SD 82 Note: C1 = C2 = C3 = 10 nF or 100 nF W W TERMINATE AT DEVICE INPUTS 8 Board Layout - Art Work The Applications Engineering group has developed a Gerber file artwork for a multilayer printed circuit board layout incorporating the recommendations above. Contact your local Agilent sales representative for details. Regulatory Compliance These transceiver products are intended to enable commercial system designers to develop equipment that complies with the various international regulations governing certification of Information Technology Equipment. See the Regulatory Compliance Table for details. Additional information is available from your Agilent sales representative. Spacing Of Front Housing Leads Holes KEEP OUT AREA FOR PORT PLUG 7 (0.276) Ø 1.4 ±0.1 (0.055 ±0.004) The second case to consider is static discharges to the exterior of the equipment chassis containing the transceiver parts. To the extent that the MT-RJ connector is exposed to the outside of the equipment chassis it may be subject to whatever ESD system level test criteria that the equipment is intended to meet. Electrostatic Discharge (ESD) There are two design cases in which immunity to ESD damage is important. The first case is during handling of the transceiver prior to mounting it on the circuit board. It is important to use normal ESD handling precautions for ESD sensitive devices. These precautions include using grounded wrist straps, work benches, and floor mats in ESD controlled areas. 7.11 (0.28) Ø 1.4 ±0.1 (0.055 ±0.004) 3.56 (0.14) Holes For Housing Leads Ø 1.4 ±0.1 (0.055 ±0.004) 10.16 (0.4) 10.8 (0.425) 3.08 (0.121) 13.34 7.59 (0.525) (0.299) 3 (0.118) 3 (0.118) 27 (1.063) 6 (0.236) 4.57 (0.18) 9.59 (0.378) 1.778 (0.07) 17.78 (0.7) 13.97 (0.55) MIN. 2 (0.079) Ø 2.29 (0.09) 7.112 (0.28) 3.08 (0.121) Ø 0.81 ±0.1 (0.032 ±0.004) DIMENSIONS IN MILLIMETERS (INCHES) NOTES: 1. THIS FIGURE DESCRIBES THE RECOMMENDED CIRCUIT BOARD LAYOUT FOR THE MT-RJ TRANSCEIVER PLACED AT .550 SPACING. 2. THE HATCHED AREAS ARE KEEP-OUT AREAS RESERVED FOR HOUSING STANDOFFS. NO METAL TRACES OR GROUND CONNECTION IN KEEP-OUT AREAS. 3. 10 PIN MODULE REQUIRES ONLY 16 PCB HOLES, INCLUDING 4 PACKAGE GROUNDING TAB HOLES CONNECTED TO SIGNAL GROUND. 4. THE SOLDER POSTS SHOULD BE SOLDERED TO CHASSIS GROUND FOR MECHANICAL INTEGRITY AND TO ENSURE FOOTPRINT COMPATIBILITY WITH OTHER SFF TRANSCEIVERS. Figure 9. Recommended Board Layout Hole Pattern Powered by ICminer.com Electronic-Library Service CopyRight 2003 9 Regulatory Compliance Table Feature Electrostatic Discharge (ESD) to the Electrical Pins Electrostatic Discharge (ESD) to the MT-RJ Receptacle Electromagnetic Interference (EMI) Test Method MIL-STD-883C Performance Meets Class 2 (2000 to 3999 Volts). Withstand up to 2200 V applied between electrical pins. Variation of Typically withstand at least 25 kV without damage when IEC 801-2 the MT-RJ Connector Receptacle is contacted by a Human Body Model probe. FCC Class B Transceivers typically provide a 10 dB margin to the CENELEC CEN55022 noted standard limits when tested at a certified test VCCI Class 2 range with the transceiver mounted to a circuit card without a chassis enclosure. Immunity Variation of IEC 801-3 Typically show no measurable effect from a 10 V/m field swept from 10 to 450 MHz applied to the transceiver when mounted to a circuit card without a chassis enclosure. Eye Safety AEL Class 1 Compliant per Agilent testing under single fault EN60825-1 (+A11) conditions. TUV Certification: Pending Electromagnetic Interference (EMI) Most equipment designs utilizing this high speed transceiver from Agilent will be required to meet the requirements of FCC in the United States, CENELEC EN55022 (CISPR 22) in Europe and VCCI in Japan. This product is suitable for use in designs ranging from a desktop computer with a single transceiver to a concentrator or switch product with a large number of transceivers. 10.8 ±0.1 (0.425 ±0.004) Immunity Equipment utilizing these transceivers will be subject to radio-frequency electromagnetic fields in some environments. These transceivers have a high immunity to such fields. For additional information regarding EMI, susceptibility, ESD and conducted noise testing procedures and results on the 1 x 9 Transceiver family, please refer to Applications Note 1075, Testing and Measuring Electromagnetic Compatibility Performance of the HFBR-510X/-520X Fiber Optic Transceivers. 3.8 (0.15) 1 (0.039) 9.8 ±0.1 (0.386 ±0.004) 13.97 (0.55) MIN. 0.25 ±0.1 (0.01 ±0.004) (TOP OF PCB TO BOTTOM OF OPENING) DIMENSIONS IN MILLIMETERS (INCHES) Figure 10. Recommended Panel Mounting Powered by ICminer.com Electronic-Library Service CopyRight 2003 14.79 (0.589) 10 Transceiver Reliability and Performance Qualification Data Ordering Information The 2 x 5 transceivers have passed Agilent reliability and performance qualification testing and are undergoing ongoing quality and reliability monitoring. Details are available from your Agilent sales representative. These transceivers are manufactured at the Agilent Singapore location which is an ISO 9002 certified facility. The HFBR-5905 1300 nm product is available for production orders through the Agilent Component Field Sales Offices and Authorized Distributors world wide. Applications Support Materials Contact your local Agilent Component Field Sales Office for information on how to obtain PCB layouts and evaluation boards for the 2 x 5 transceivers. 6 RELATIVE INPUT OPTICAL POWER (dB) - TRANSMITTER OUTPUT OPTICAL SPECTRAL WIDTH (FWHM) - nm 200 3.0 180 1.0 160 1.5 140 2.0 tr/f – TRANSMITTER OUTPUT OPTICAL RISE/FALL TIMES – ns 2.5 120 3.0 l D 100 1260 1280 1300 1320 1340 1360 4 3 2 1 0 -3 lC – TRANSMITTER OUTPUT OPTICAL RISE/ FALL TIMES – ns -2 -1 0 1 2 EYE SAMPLING TIME POSITION (ns) 3 CONDITIONS: 1. TA = +25° C 2. VCC = 3.3 V dc 3. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns. 4. INPUT OPTICAL POWER IS NORMALIZED TO CENTER OF DATA SYMBOL. 5. NOTE 15 AND 16 APPLY. HFBR-5905 TRANSMITTER TEST RESULTS OF lC, Dl AND tr/f ARE CORRELATED AND COMPLY WITH THE ALLOWED SPECTRAL WIDTH AS A FUNCTION OF CENTER WAVELENGTH FOR VARIOUS RISE AND FALL TIMES. Figure 11. Transmitter Output Optical Spectral Width (FWHM) vs. Transmitter Output Optical Center Wavelength and Rise/Fall Times. 5 Figure 12. Relative Input Optical Power vs. Eye Sampling Time Position. Powered by ICminer.com Electronic-Library Service CopyRight 2003 11 Absolute Maximum Ratings Absolute maximum limits mean that no catastrophic damage will occur if the product is subjected to these ratings for short periods, provided each limiting parameter is in isolation and all other parameters have values within the performance specification. It should not be assumed that limiting values of more than one parameter can be applied to the product at the same time Parameter Storage Temperature Lead Soldering Temperature Lead Soldering Time Supply Voltage Data Input Voltage Differential Input Voltage (p-p) Output Current Symbol TS TSOLD tSOLD VCC VI VD IO Min. -40 Typ. -0.5 -0.5 Max. +100 +260 10 3.6 VCC 2.0 50 Unit °C °C sec. V V V mA Reference Note 1 Recommended Operating Conditions Parameter Ambient Operating Temperature Supply Voltage Data Input Voltage - Low Data Input Voltage - High Data and Signal Detect Output Load Differential Input Voltage (p-p) Symbol TA VCC VIL - VCC VIH - VCC RL VD Min. 0 3.135 -1.810 -1.165 Typ. Max. +70 3.465 -1.475 -0.880 50 0.800 Unit °C V V V W V Reference Note 2 Note 1 Transmitter Electrical Characteristics (TA = 0°C to +70°C, VCC = 3.135 V to 3.465 V) Parameter Symbol Supply Current ICC Power Dissipation PDISS Data Input Current - Low IIL Data Input Current - High IIH Min. -350 Typ. 133 0.45 -2 18 Max. 175 0.60 350 Unit mA W µA µA Reference Note 3 Note 5a Receiver Electrical Characteristics (TA = 0°C to +70°C, VCC = 3.135 V to 3.465 V) Parameter Symbol Supply Current ICC Power Dissipation PDISS Data Output Voltage - Low VOL - VCC Data Output Voltage - High VOH - VCC Data Output Rise Time tr Data Output Fall Time tf Signal Detect Output Voltage - Low VOL - VCC Signal Detect Output Voltage - High VOH - VCC Signal Detect Output Rise Time tr Signal Detect Output Fall Time tf Power Supply Noise Rejection PSNR Powered by ICminer.com Electronic-Library Service CopyRight 2003 Min. Typ. 65 0.225 -1.840 -1.045 0.8 0.8 -1.840 -1.045 0.35 0.35 50 Max. 120 0.415 -1.620 -0.880 2.2 2.2 -1.620 -0.880 2.2 2.2 Unit mA W V V ns ns V V ns ns mV Reference Note 4 Note 5b Note 6 Note 6 Note 7 Note 7 Note 6 Note 6 Note 7 Note 7 12 Transmitter Optical Characteristics (TA = 0°C to +70°C, VCC = 3.135 V to 3.465 V) Parameter Symbol Output Optical Power BOL PO 62.5/125 µm, NA = 0.275 Fiber EOL Output Optical Power BOL PO 50/125 µm, NA = 0.20 Fiber EOL Optical Extinction Ratio Output Optical Power at Logic Low “0” State Center Wavelength PO (“0”) Spectral Width - FWHM - RMS Optical Rise Time Dl Min. -19 -20 -22.5 -23.5 Typ. -15.7 0.05 -50 lC Max. -14 Unit dBm avg. Reference Note 8 -14 dBm avg. Note 8 0.2 -35 -45 % dB dBm avg. Note 9 1380 nm Note 10 1270 1308 tr 0.6 147 63 1.2 3.0 ns Optical Fall Time tf 0.6 2.0 3.0 ns Systematic Jitter Contributed by the Transmitter Random Jitter Contributed by the Transmitter SJ 0.04 1.2 ns p-p Note 23 Figure 11 Note 23 Figure 11 Note 12, 23 Figure 11 Note 12, 23 Figure 11 Note 13 RJ 0 0.52 ns p-p Note 14 Typ. Max. -30 Unit dBm avg. -31 dBm avg. Reference Note 15 Figure 12 Note 16 Figure 12 nm Receiver Optical and Electrical Characteristics (TA = 0°C to +70°C, VCC = 3.135 V to 3.465 V) Parameter Symbol Input Optical Power PIN Min. (W) Minimum at Window Edge Input Optical Power PIN Min. (C) Minimum at Eye Center Input Optical Power Maximum Min. PIN Max. -14 Operating Wavelength l 1270 Systematic Jitter Contributed by the Receiver SJ Random Jitter Contributed by the Receiver RJ Signal Detect - Asserted PA PD + 1.5 dB Signal Detect - Deasserted PD Signal Detect - Hysteresis PA - PD dBm avg. Note 15 1380 nm 0.2 1.2 ns p-p Note 17 1 1.91 ns p-p Note 18 -31 dBm avg. Note 19 -45 dBm avg. Note 20 1.5 dB Signal Detect Assert Time (off to on) 0 2 100 µs Note 21 Signal Detect Deassert Time (on to off) 0 5 350 µs Note 22 Powered by ICminer.com Electronic-Library Service CopyRight 2003 13 Notes: 1 . This is the maximum voltage that can be applied across the Differential Transmitter Data Inputs to prevent damage to the input ESD protection circuit. 2 . The outputs are terminated with 50 W connected to VCC -2 V. 3 . The power supply current needed to operate the transmitter is provided to differential ECL circuitry. This circuitry maintains a nearly constant current flow from the power supply. Constant current operation helps to prevent unwanted electrical noise from being generated and conducted or emitted to neighboring circuitry. 4 . This value is measured with the outputs terminated into 50 W connected to VCC - 2 V and an Input Optical Power level of -14 dBm average. 5a.The power dissipation of the transmitter is calculated as the sum of the products of supply voltage and current. 5b.The power dissipation of the receiver is calculated as the sum of the products of supply voltage and currents, minus the sum of the products of the output voltages and currents. 6. This value is measured with respect to VCC with the output terminated into 50 W connected to VCC - 2 V. 7. The output rise and fall times are measured between 20% and 80% levels with the output connected to VCC -2 V through 50 W. 8. These optical power values are measured with the following conditions: • The Beginning of Life (BOL) to the End of Life (EOL) optical power degradation is typically 1.5 dB per the industry convention for long wavelength LEDs. The actual degradation observed in Agilent’s 1300 nm LED products is < 1 dB, as specified in this data sheet. • Over the specified operating voltage and temperature ranges. • With 25 MBd (12.5 MHz squarewave), input signal. • At the end of one meter of noted optical fiber with cladding modes removed. The average power value can be converted to a peak power value by adding 3 dB. Higher output optical power transmitters are available on special request. Please consult with your local Agilent sales representative for further details. 9. The Extinction Ratio is a measure of the modulation depth of the optical signal. The data “0” output optical power is compared to the data “1” peak output optical power and expressed as a percentage. With the transmitter driven by a 25 MBd (12.5 MHz square-wave) input signal, the average optical power is measured. The data “1” peak power is then calculated by adding 3 dB to the measured average optical power. The data “0” output optical power is found by measuring the optical power when the transmitter is driven by a logic “0” input. The extinction ratio is the ratio of the optical power at the “0” level compared to the optical power at the “1” level expressed as a percentage or in decibels. 10.The transmitter will provide this low level of Output Optical Power when driven by a logic “0” input. This can be useful in link troubleshooting. 11.The relationship between Full Width Half Maximum and RMS values for Spectral Width is derived from the assumption of a Gaussian shaped spectrum which results in a 2.35 X RMS = FWHM relationship. 12. The optical rise and fall times are measured from 10% to 90% when the transmitter is driven by a 25 MBd (12.5 MHz square-wave) input signal. The ANSI T1E1.2 committee has designated the possibility of defining an eye pattern mask for the transmitter optical output as an item for further study. Agilent will incorporate this requirement into the specifications for these products if it is defined. The HFBR-5905 products typically comply with the template requirements of CCITT (now ITU-T) G.957 Section 3.2.5, Figure 2 for the STM-1 rate, excluding the optical receiver filter normally associated with single mode fiber measurements which is the likely source for the ANSI T1E1.2 committee to follow in this matter. 13.Systematic Jitter contributed by the transmitter is defined as the combination of Duty Cycle Distortion and Data Dependent Jitter. Systematic Jitter is measured at 50% threshold using a 155.52 MBd (77.5 MHz square-wave), 27 - 1 psuedorandom data pattern input signal. 14.Random Jitter contributed by the transmitter is specified with a 155.52 MBd (77.5 MHz square-wave) input signal. Powered by ICminer.com Electronic-Library Service CopyRight 2003 15. This specification is intended to indicate the performance of the receiver section of the transceiver when Input Optical Power signal characteristics are present per the following definitions. The Input Optical Power dynamic range from the minimum level (with a window time-width) to the maximum level is the range over which the receiver is guaranteed to provide output data with a Bit Error Rate (BER) better than or equal to 1 x 10 -10. • At the Beginning of Life (BOL) • Over the specified operating temperature and voltage ranges • Input is a 155.52 MBd, 223 - 1 PRBS data pattern with 72 “1”s and 72 “0”s inserted per the CCITT (now ITU-T) recommendation G.958 Appendix I. • Receiver data window time-width is 1.23 ns or greater for the clock recovery circuit to operate in. The actual test data window time-width is set to simulate the effect of worst case optical input jitter based on the transmitter jitter values from the specification tables. The test window time-width is HFBR-5905 3.32 ns. • Transmitter operating with a 155.52 MBd, 77.5 MHz square-wave, input signal to simulate any crosstalk present between the transmitter and receiver sections of the transceiver. 16.All conditions of Note 15 apply except that the measurement is made at the center of the symbol with no window time-width. 17.Systematic Jitter contributed by the receiver is defined as the combination of Duty Cycle Distortion and Data Dependent Jitter. Systematic Jitter is measured at 50% threshold using a 155.52 MBd (77.5 MHz square-wave), 27 - 1 psuedorandom data pattern input signal. 18.Random Jitter contributed by the receiver is specified with a 155.52 MBd (77.5 MHz square-wave) input signal. 19 .This value is measured during the transition from low to high levels of input optical power. 20. This value is measured during the transition from high to low levels of input optical power. At Signal Detect Deassert, the receiver outputs Data Out and Data Out Bar go to steady PECL levels High and Low respectively. 21. The Signal Detect output shall be asserted within 100 µs after a step increase of the Input Optical Power. 22. Signal detect output shall be deasserted within 350 µs after a step decrease in the Input Optical Power. At Signal Detect Deassert, the receiver outputs Data Out and Data Out Bar go to steady PECL levels High and Low respectively. 23. The HFBR-5905 transceiver complies with the requirements for the tradeoffs between center wavelength, spectral width, and rise/fall times shown in Figure 11. This figure is derived from the FDDI PMD standard (ISO/IEC 9314-3 : 1990 and ANSI X3.166 - 1990) per the description in ANSI T1E1.2 Revision 3. The interpretation of this figure is that values of Center Wavelength and Spectral Width must lie along the appropriate Optical Rise/Fall Time curve. www.semiconductor.agilent.com Data subject to change. Copyright © 2000 Agilent Technologies, Inc. Obsoletes: 5968-6261E (6/99) 5968-6261E (03/00) Powered by ICminer.com Electronic-Library Service CopyRight 2003