Agilent HMMC-5034 37–43 GHz Amplifier Data Sheet TC926 Chip Size: Chip Size Tolerance: Chip Thickness: Pad Dimensions: Description The HMMC-5034 is a MMIC power amplifier designed for use in wireless transmitters that operate within the 37 GHz to 42.5 GHz range. At 40 GHz it provides 23 dBm of output power [P(-1dB)] and 8 dB of smallsignal gain from a small easy-touse device. The HMMC-5034 was designed to be driven by the HMMC-5040 MMIC amplifier for linear transmit applications. This device has input and output matching circuitry for use in 50 ohm environments. 1.56 × 1.02 mm (61.4 × 40.1 mils) ±10 µm (± 0.4 mils) 127 ± 15 µm (5.0 ± 0.6 mils) 80 × 80 µm (3.2 × 3.2 mils) Features •23 dBm Output P(-1dB) •8 dB Gain @ 40 GHz •Integrated Output Power Detector Network •50Ω Input/Output Matching •Bias: 4.5 Volts, 300 mA Absolute Maximum Ratings[1] Symbol Parameters/Conditions VD1,2 Drain Supply Voltages VG1,2 Gate Supply Voltages ID1 Min. Max. Units 5 Volts 0.5 Volts Input-Stage Drain Current 165 mA ID2 Output–Stage Drain Current 285 mA Pin RF Input Power 23 dBm Tch Channel Temperature[2] 175 °C Tbs Backside Temperature −55 +95 °C Tst Storage Temperature −65 +170 °C Tmax Max. Assembly Temperature 300 °C −3.0 Notes: 1. Absolute maximum ratings for continuous operation unless otherwise noted. 2. Refer to DC Specifications / Physical Properties table for derating information. 1 DC Specifications/Physical Properties[1] Symbol Parameters/Conditions Min. Typ. Max. Units VD1,2 Drain Supply Operating Voltages 2 4.5 5 Volts ID1 Suggested First Stage Operating Drain Supply Current (VD1 = 4.5V) 100 165 mA ID2 Suggested Second Stage Operating Drain Supply Current (VD2 = 4.5V) 200 285 mA VG1,2 Gate Supply Operating Voltages (ID1 ≅ 100 mA, ID2 ≅ 200 mA) -0.8 Volts VP Pinch-off Voltage (VD1 =VD2 = 4.5 V, ID1 + ΙD2 ≤ 10 mA) −1.2 Volts Vdet Reference and Output Detector DC Voltage (VD2 = 4.5 V, No RF Output) 1.4 Volts g Detector Voltage Sensitivity (VDD = 4.5 V, Pout = 20 dBm) 0.12 mV/mW −2.5 Resistance[2]† θch-bs Thermal (Channel-to-Backside at Tch = 150°C) 44 °C/Watt Tch Channel Temperature[3] (Tbs ≅ 90°C, MTTF > 106 hrs, VD1 = VD2 = 4.5 V, ID1 = 100 mA, ID2 = 200 mA) 150 °C Notes: 1. Backside operating temperature Tbs = 25°C unless otherwise noted. 2. Thermal resistance (°C/Watt) at a channel temperature T(°C) can be estimated using the equation: θ(T) ≅ θch-bs × [T(°C)+273] / [150°C+273]. 3. Derate MTTF by a factor of two for every 8°C above T ch. RF Specifications (TA = 25°C, Z0 = 50Ω, VD1 = VD2 = 4.5 V, ID1 = 100 mA, ID2 = 200 mA) 37–40 GHz Symbol Parameters/Conditions BW Operating Bandwidth 37 Gain Small Signal Gain 7 ∆Gain/∆T Temperature Coefficient of Gain P(-1dB) Output Power at 1dB Gain Compression[1] 21 23 PSAT Saturated Output Power[1] 22 24 ∆P/∆T Temperature Coefficient of P(-1dB) and Psat (RLin)MIN Minimum Input Return Loss 9 10 (RLout)MIN Minimum Output Return Loss 10 12 Isolation Minimum Reverse Isolation Min. Typ. 8 40–2.5 GHz Max. Min. 40 40 11 6 0.019 7 Max. Units 42.5 GHz 11 dB 0.019 dB/°C 20 22 dBm 21 23 dBm 0.015 dB/°C 8 10 dB 9 12 dB 27 dB 0.015 30 Notes: 1. Devices operating continuously at or beyond 1 dB gain compression may experience power degradation. 2 Typ. Applications The HMMC-5034 MMIC is a broadband power amplifier designed for use in communications transmitters that operate in various frequency bands within 37 GHz and 42.5 GHz. It can be attached to the output of the HMMC-5040 increasing the power handling capability of transmitters requiring linear operation. Biasing and Operation The recommended DC bias condition is with both drains (VD1 and VD2) connected to single 4.5 volt supply (VDD) and both gates (VG1 and VG2) connected to an adjustable negative voltage supply (VGG) as shown in Figures 12 or 13. The gate voltage is adjusted for a total drain supply current of commonly 300 mA or less. The RF input and output ports are AC–coupled. An output power detector network is also supplied. The Det.Out port provides a DC voltage that is generated by the RF power at the RF-Output port. The Det.Ref pad provides a DC reference voltage that can be used to nullify the effects of temperature variations on the detected RF voltage. The differential voltage between the Det.Ref and Det.Out bonding pads can be correlated to the RF power emerging from the RFOutput port. A bond wire attaching both VD2 bond pads to the supply will assure symmetric operation and minimize any DC offset voltage between Det.Ref and Det.Out (at no RF output power). crowave/millimeter-wave connections should be kept as short as possible to minimize inductance. For assemblies requiring long bond wires, multiple wires can be attached to the RF bonding pads. Thermosonic wedge is the preferred method for wire bonding to the gold bond pads. A guidedwedge at an ultrasonic power level of 64 dB can be used for the 0.7 mil wire. The recommended wire bond stage temperature is 150± 2°C. No ground wires are needed because ground connections are made with plated through-holes to the backside of the device. GaAs MMICs are ESD sensitive. ESD preventive measures must be employed in all aspects of storage, handling, and assembly. Assembly Techniques Electrically and thermally conductive epoxy die attach is the preferred assembly method. Solder die attach using a fluxless gold-tin (AuSn) solder preform can also be used. The device should be attached to an electrically conductive surface to complete the DC and RF ground paths. The backside metallization on the device is gold. MMIC ESD precautions, handling considerations, die attach and bonding methods are critical factors in successful GaAs MMIC performance and reliability. Agilent application note #54, "GaAs MMIC ESD, Die Attach and Bonding Guidelines" provides basic information on these subjects. It is recommended that the electrical connections to the bonding pads be made using 0.7-1.0 mil diameter gold wire. The mi- (Optional) (Optional) VD1 VG2 VG1 VD2 Det.Ref D2 R1 RF Input Stage 1 RF Output Stage 2 D1 R1 VG1 VD1 (Optional) VG2 VD2 C Det.Out (Optional) Figure 1. Simplified Schematic Diagram 3 6 10 Spec Range 4 37-42.5 GHz 2 20 0 -2 30 -4 -6 -8 -10 40 Isolation 35 30 45 40 50 Reverse Isolation (dB) Gain 8 Small-Signal Gain (dB) 0 Input and Output Return Loss (dB) VDD = 4.5V, IDD = 300mA 10 Spec Range 5 Output 15 40 GHz Power (dBm) Gain (dB) VDD = 4.5V, f = 38 GHz 40 8 42.5 GHz 6 43.5 GHz 4 TOI 20 Pout Single-tone 0 -20 2 -40 0 150 200 250 IDD (mA) 300 350 40 GHz 6 24 Psat (dBm) P-1dB (dBm) 37 GHz 42.5 GHz 43.5 GHz 18 8 12 10 14 22 40 GHz 37 GHz 42.5 GHz 43.5 GHz 20 18 16 150 200 250 IDD (mA) 300 Figure 6. P-1dB vs. Total Drain Current as a Function of Frequency* *Wafe–-probed 4 4 VDD = 4.5V 26 22 20 2 300 mA Figure 5. Intermodulation Distortion for 150 mA and 300 mA Total Drain Current (10 MHz Spacing) VDD = 4.5V 24 150 mA IM3 Pin (dBm) Figure 4. Gain vs. Total Drain Current as a Function of Frequency* 26 50 Figure 3. Typical Input and Output Return Loss vs. Frequency* VDD = 4.5V 10 45 40 Frequency (GHz) Figure 2. Typical Gain and Isolation vs. Frequency* 37 GHz 35 30 Frequency (GHz) 12 37-42.5 GHz Input 10 20 50 VDD = 4.5V, IDD = 300mA 0 measurements. 350 16 150 200 250 IDD (mA) 300 Figure 7. Psat vs. Total Drain Current as a Function of Frequency* 350 VDD = 4.5V, IDD = 300 mA 26 26 24 90°C 22 90°C Psat (dBm) P-1dB (dBm) 10°C 10°C 24 VDD = 4.5V, IDD = 300 mA 50°C 20 18 16 37 22 50°C 20 18 38 39 40 41 42 Frequency (GHz) 43 16 37 44 38 Figure 8. P-1dB vs. Frequency as a Function of Temperature* 12 39 40 41 Frequency (GHz) 42 43 44 Figure 9. Psat vs. Frequency as a Function of Temperature* VDD = 4.5V, IDD = 300 mA 10°C 10 Gain (dB) 8 90°C 6 50°C 4 2 0 37 38 39 40 41 42 Frequency (GHz) 43 44 Figure 10. Gain vs. Frequency as a Function of Temperature* VD1 Opt.VG1 370 VD2 Opt.VG2 970 1560 1020 950 TC926 RF Input 510 RF Output 70 0,0 70 VG1 Opt.VD1 670 VG2 Opt.VD2 1490 Figure 11. Bonding Pad Positions (Dimensions are in micrometers) *Wafer–probed measurements. 5 To VDD Supply (with low f bypassing) >= 100 pF Chip Capacitor VD1 VD2 TC926 RF Output RF Input VG1 VG2 >= 100 pF Chip Capacitor To VGG Supply (with low f bypassing) Figure 12. Common Assembly Diagram (Shown with/out optional output detector connections) To VDD Supply (with low f bypassing) >= 100 pF Chip Capacitor Optional Det.Ref VD1 (Independent of RF Power Level) VD2 TC926 RF Output RF Input VG1 VG2 VD2 Det.Out >= 100 pF Chip Capacitor To VGG Supply >= 100 pF Chip Capacitor (with low f bypassing) Figure 13. Common Assembly Diagram with Detector (Shown with output detector connections and optional VD2 "balancing" connection) 6 This data sheet contains a variety of typical and guaranteed performance data. The information supplied should not be interpreted as a complete list of circuit specifications. In this data sheet the term typical refers to the 50th percentile performance. For additional information contact your local Agilent Technologies’ sales representative. www.agilent.com/semiconductors For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (408) 654-8675 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6271 2451 India, Australia, New Zealand: (+65) 6271 2394 Japan: (+81 3) 3335-8152(Domestic/International), or 0120-61-1280(Domestic Only) Korea: (+65) 6271 2194 Malaysia, Singapore: (+65) 6271 2054 Taiwan: (+65) 6271 2654 Data subject to change. Copyright 2002 Agilent Technologies, Inc. August 30, 2002 5988-3203EN 8