Agilent AMMC-6440 37 – 42 GHz Power Amplifier Data Sheet Features • Wide frequency range: 37 - 42 GHz • High gain: 14 dB • Power: @42 GHz, P-1dB=28 dBm Description The AMMC-6440 MMIC is a broadband 1W power amplifier designed for use in transmitters that operate in various frequency bands between 37GHz and 42GHz. This MMIC optimized for linear operation with an output third order intercept point (OIP3) of 38dBm. At 42GHz it provides 28dBm of output power (P1dB) and 14dB of gain. The device has input and output matching circuitry for use in 50 Ω environments. The AMMC-6440 also integrates a Chip Size: 2500 x 1750 mm (100 x 69 mils) Chip Size Tolerance: ± 10mm (±0.4 mils) Chip Thickness: 100 ± 10mm (4 ± 0.4 mils) Pad Dimensions: 100 x 100 mm (4 ± 0.4 mils) • Highly linear: OIP3=39dBm • Integrated RF power detector • 5.5 Volt, -0.7 Volt, 950mA operation temperature compensated RF power detection circuit that enables power detection of 0.25V/W. DC bias is simple and the device operates on widely available 5.5V for current supply (negative voltage only needed for Vg). It is fabricated in a PHEMT process for exceptional power and gain performance. Applications • Microwave Radio systems • LMDS & Pt-Pt mmW Long Haul • 802.16 & 802.20 WiMax BWA • WLL and MMDS loops • Commercial grade military • Can be driven by AMMC-6345, increasing overall gain. AMMC-6440 Absolute Maximum Ratings[1] Symbol Parameters/Conditions Units Min. Max. Vd Positive Drain Voltage V Vg Gate Supply Voltage V Id Drain Current mA 1500 Pin CW Input Power dBm 23 Tch Operating Channel Temp. °C +150 Tstg Storage Case Temp. °C Tmax Maximum Assembly Temp °C (60 sec max) 7 -3 -65 0.5 +150 +300 Note: 1. Operation in excess of any one of these conditions may result in permanent damage to this device. Note: These devices are ESD sensitive. The following precautions are strongly recommended. Ensure that an ESD approved carrier is used when dice are transported from one destination to another. Personal grounding is to be worn at all times when handling these devices AMMC-6440 DC Specifications/Physical Properties [1] Symbol Parameters and Test Conditions Units Id Drain Supply Current (under any RF power drive and temperature) (Vd=5.5 V, Vg set for Id Typical) mA Vg Gate Supply Operating Voltage (Id(Q) = 950 (mA)) V θch-b Thermal Resistance [2] (Backside temperature, Tb = 25°C) °C/W Min. -0.85 Typ. Max. 950 1050 -0.7 -0.65 6.4 Notes: 1. Ambient operational temperature TA=25°C unless otherwise noted. 2. Channel-to-backside Thermal Resistance (θch-b) = 7.5°C/W at Tchannel (Tc) = 100°C as measured using infrared microscopy. Thermal Resistance at backside temperature (Tb) = 25°C calculated from measured data. AMMC-6440 RF Specifications [3, 4, 5] TA= 25°C, Vd=5.5V, Id(Q)=950 mA, Zo=50 Ω Symbol Parameters and Test Conditions Units Minimum Typical Gain Small-signal Gain[4] dB 12 14 0.5 P-1dB Output Power at 1dB Gain Compression dBm 26 28 0.39 P-3dB Output Power at 3dB Gain Compression dBm 28.5 0.36 OIP3 Third Order Intercept Point; ∆f=100MHz; Pin=-20dBm dBm 38 0.86 RLin Input Return Loss[4] dB -16 0.70 RLout Output Return Loss[4] dB -18 0.71 dB -47 3.00 Isolation Min. Reverse Isolation Maximum Sigma Notes: 3. Small/Large -signal data measured in wafer form TA = 25°C. 4. 100% on-wafer RF test is done at frequency = 38, 40, and 42 GHz. Statistics based on 1500 part sample 5. Specifications are derived from measurements in a 50 Ω test environment. Aspects of the amplifier performance may be improved over a more narrow bandwidth by application of additional conjugate, linearity, or power matching. LSL 12 12.5 LSL 13 13.5 14 14.5 15 26 LSL 27 28 29 27 28 Gain at 40 GHz P-1dB at 40 GHz P-1dB at 42 GHz Typical distribution of Small Signal Gain and Output Power @P-1dB. Based on 1500 part sampled over several production lots. 2 AMMC-6440 Typical Performances (TA = 25°C, Vd =5.5 V, ID = 950 mA, Zin = Zout = 50 Ω) NOTE: These measurements are in a 50 Ω test environment. Aspects of the amplifier performance may be improved over a more narrow bandwidth by application of additional conjugate, linearity, or power matching 20 0 -20 30 S11[dB] S21[dB] S22[dB] S12[dB] -5 25 P-1 [dBm], PAE [%] -40 -10 Return Loss [dB] 10 S12 [dB] S21[dB] 15 -15 -20 20 P-1 PAE 15 10 5 -25 35 40 Frequency [GHz] -30 30 -60 50 45 Figure 1. Typical Gain and Reverse Isolation 0 35 40 Frequency [GHz] 45 50 Figure 2. Typical Return Loss (Input and Output) 35 43 35 38 Pout(dBm) PAE[%] Id(total) 1150 30 5 4 Po[dBm], and, PAE[%] IP3 [dBm] Noise Figure [dB] 7 6 36 34 3 25 1050 20 15 950 10 32 2 45 1250 40 9 8 39 41 Frequency [GHz] Figure 3. Typical Output Power (@P-1dB) and PAE 40 10 37 Ids [mA] 0 30 5 5 1 30 32 0 32 34 36 38 40 Frequency [GHz] 42 44 34 36 38 40 Frequency [GHz] 42 44 Figure 5. Typical Output 3rd Order Intercept Pt. Figure 4. Typical Noise Figure 0 S11_-40 S22_20 S22_-40 S11_85 S22_85 -10 -5 0 5 Pin [dBm] 10 15 850 20 Figure 6. Typical Output Power, PAE, and Total Drain Current versus Input Power at40GHz 0 S11_20 -5 0 -15 25 S21_20 S21_-40 S21_85 -5 20 -15 10 -20 30 35 Frequency[GHz] 40 Figure 7. Typical S11 over temperature 3 15 -15 -20 -25 25 S21[dB] -10 S22[dB] S11[dB] -10 45 -25 25 30 35 Frequency[GHz] 40 Figure 8. Typical S22 over temperature 45 5 25 30 35 Frequency[GHz] 40 Figure 9. Typical Gain over temperature 45 32 30 P-1 [dBm] 28 26 24 P-1_85deg 22 P-1_20deg P-1_-40deg 20 35 37 39 41 Frequency [GHz] 43 45 Figure 10. Typical One dB Compression over temperature Typical Scattering Parameters [1], (TA = 25°C, Vd =5.5 V, ID = 950 mA, Zin = Zout = 50 Ω) S11 S21 S12 S22 Freq GHz dB Mag Phase dB Mag Phase dB Mag Phase dB Mag Phase 20 -8.26 0.39 35.28 -3.39 0.68 53.88 -51.52 2.66E-03 82.15 -10.41 0.30 -39.51 21 -9.55 0.33 18.31 -0.13 0.99 -32.46 -53.07 2.22E-03 58.35 -11.90 0.25 -54.15 22 -10.68 0.29 6.50 0.05 1.01 -98.82 -49.74 3.26E-03 107.10 -13.84 0.20 -67.90 23 -11.77 0.26 -4.14 -0.14 0.98 -151.54 -48.39 3.81E-03 136.45 -16.35 0.15 -82.69 24 -12.77 0.23 -11.52 -0.49 0.95 163.34 -43.49 6.69E-03 113.79 -20.06 0.10 -92.28 25 -13.43 0.21 -21.81 -0.41 0.95 125.97 -42.58 7.43E-03 103.95 -25.31 0.05 -93.95 26 -14.12 0.20 -31.29 0.24 1.03 90.59 -39.45 1.07E-02 92.03 -30.03 0.03 -54.19 27 -15.09 0.18 -41.60 1.14 1.14 56.21 -39.32 1.08E-02 84.03 -27.22 0.04 -20.99 28 -16.42 0.15 -51.56 2.48 1.33 21.78 -38.53 1.18E-02 61.72 -23.66 0.07 -16.14 29 -17.94 0.13 -62.21 4.32 1.64 -13.91 -40.36 9.60E-03 53.79 -21.56 0.08 -29.95 30 -18.94 0.11 -73.50 6.33 2.07 -51.69 -36.99 1.41E-02 44.78 -21.11 0.09 -42.93 31 -21.70 0.08 -82.94 8.58 2.69 -93.11 -40.58 9.35E-03 23.71 -21.65 0.08 -53.78 32 -25.86 0.05 -113.23 11.20 3.63 -140.25 -41.25 8.66E-03 27.01 -22.32 0.08 -67.31 33 -42.75 0.01 162.22 13.10 4.52 168.62 -40.97 8.95E-03 35.99 -23.96 0.06 -77.52 34 -29.08 0.04 80.83 14.71 5.44 113.57 -42.41 7.58E-03 18.07 -26.35 0.05 -118.70 35 -22.63 0.07 33.21 14.94 5.58 57.12 -41.53 8.39E-03 22.34 -34.08 0.02 -129.29 36 -19.22 0.11 21.46 14.65 5.40 4.18 -43.59 6.62E-03 42.99 -38.46 0.01 21.71 37 -18.69 0.12 15.80 14.25 5.16 -46.43 -39.17 1.10E-02 32.85 -29.79 0.03 95.54 38 -16.44 0.15 -2.06 13.67 4.82 -95.24 -39.54 1.05E-02 7.47 -25.71 0.05 49.06 39 -16.58 0.15 -19.18 13.65 4.81 -143.86 -39.47 1.06E-02 0.37 -22.80 0.07 32.40 40 -17.21 0.14 -37.99 13.63 4.80 167.35 -44.88 5.70E-03 11.79 -23.37 0.07 11.92 41 -17.47 0.13 -53.55 14.18 5.12 113.76 -40.24 9.72E-03 30.26 -25.74 0.05 -4.19 42 -26.58 0.05 -91.15 14.40 5.25 49.11 -39.66 1.04E-02 -4.22 -26.64 0.05 71.61 43 -33.75 0.02 110.21 13.06 4.50 -25.29 -39.36 1.08E-02 -12.55 -18.85 0.11 55.31 44 -23.07 0.07 40.34 9.09 2.85 -96.84 -43.48 6.70E-03 -17.47 -19.06 0.11 25.20 21.00 45 -21.59 0.08 23.11 3.77 1.54 -158.36 -52.98 2.24E-03 -26.13 -19.51 0.11 46 -21.12 0.09 22.94 -2.00 0.79 149.17 -46.88 4.53E-03 39.82 -19.06 0.11 20.89 47 -18.59 0.12 26.05 -7.54 0.42 105.77 -42.48 7.52E-03 69.08 -18.27 0.12 12.16 48 -17.71 0.13 23.21 -12.29 0.24 69.14 -37.89 1.27E-02 69.52 -16.95 0.14 6.57 49 -15.29 0.17 11.09 -16.78 0.14 36.42 -35.71 1.64E-02 14.63 -17.51 0.13 -11.50 50 -14.03 0.20 8.90 -20.84 0.09 8.48 -33.85 2.03E-02 35.67 -19.70 0.10 -24.97 Note: Data obtained from on-wafer measurements. 4 Biasing and Operation The recommended quiescent DC bias condition for optimum efficiency, performance, and reliability is Vd=5.5 volts with Vg set for Id=950 mA. Minor improvements in performance are possible depending on the application. The drain bias voltage range is 3 to 5.5V. A single DC gate supply connected to Vg will bias all gain stages. Muting can be accomplished by setting Vg and /or Vg to the pinch-off voltage Vp. An optional output power detector network is also provided. The differential voltage between the Det-Ref and Det-Out pads can be correlated with the RF power emerging from the RF output port. The detected voltage is given by : V = (Vref − Vdet ) − Vofs where V ref is the voltage at the DET _ R port, Vdet is a voltage at the DET _ O port, and Vofs is the zero-input-power offset voltage. There are three methods to calculate : 1. Vofs can be measured before each detector measurement (by removing or switching off the power source and measuring ). This method gives an error due to temperature drift of less than 0.01dB/50°C. 2. Vofs can be measured at a single reference temperature. The drift error will be less than 0.25dB. 3. Vofs can either be characterized over temperature and stored in a lookup table, or it can be measured at two temperatures and a linear 5 fit used to calculate at any temperature. This method gives an error close to the method #1. The RF ports are AC coupled at the RF input to the first stage and the RF output of the final stage. No ground wired are needed since ground connections are made with plated through-holes to the backside of the device. Assembly Techniques The backside of the MMIC chip is RF ground. For microstrip applications the chip should be attached directly to the ground plane (e.g. circuit carrier or heatsink) using electrically conductive epoxy [1] For best performance, the topside of the MMIC should be brought up to the same height as the circuit surrounding it. This can be accomplished by mounting a gold plate metal shim (same length and width as the MMIC) under the chip which is of correct thickness to make the chip and adjacent circuit the same height. The amount of epoxy used for the chip and/or shim attachment should be just enough to provide a thin fillet around the bottom perimeter of the chip or shim. The ground plain should be free of any residue that may jeopardize electrical or mechanical attachment. The location of the RF bond pads is shown in Figure 12. Note that all the RF input and output ports are in a GroundSignal configuration. RF connections should be kept as short as reasonable to minimize performance degradation due to undesirable series inductance. A single bond wire is normally sufficient for signal connections, however double bonding with 0.7 mil gold wire or use of gold mesh [2] is recommended for best performance, especially near the high end of the frequency band. Thermosonic wedge bonding is preferred method for wire attachment to the bond pads. Gold mesh can be attached using a 2 mil round tracking tool and a tool force of approximately 22 grams and a ultrasonic power of roughly 55 dB for a duration of 76 +/- 8 mS. The guided wedge at an untrasonic power level of 64 dB can be used for 0.7 mil wire. The recommended wire bond stage temperature is 150 +/- 2C. Caution should be taken to not exceed the Absolute Maximum Rating for assembly temperature and time. The chip is 100um thick and should be handled with care. This MMIC has exposed air bridges on the top surface and should be handled by the edges or with a custom collet (do not pick up the die with a vacuum on die center). This MMIC is also static sensitive and ESD precautions should be taken. Notes: [1] Ablebond 84-1 LM1 silver epoxy is recommended. [2] Buckbee-Mears Corporation, St. Paul, MN, 800-262-3824 DET_R Vd Vg DQ DET_O RFout RFin Three stage 0.5W power amplifier Figure 11. AMMC-6440 Schematic Figure 12. AMMC-6440 Bonding pad locations 6 Vg (Optional) Vd 0.1µF 0.1µF 68pF Vg Vd DET_O RFOutput AMMC-6440 Vd RFInput RFO RFI DET_R Vg Vd 0.1µF 0.1µF 68pF Vd Vg 0.16 0.14 0.12 0.1 0.08 0.06 0.04 0.02 0 1 0.1 0.01 0.001 Det_R - Det_O [V] Det_R - Det_O [V] Figure 13. AMMC-6440 Assembly diagram 0.0001 5 10 15 20 25 Pout[dBm] 30 35 Figure 14. AMMC-6440 Typical Detector Voltage and Output Power, Freq=40 GHz 7 Notes: 1. 1µF capacitors on gate and drain lines not shown required. 2. Vg connection is recommended on both sides for devices operating at or above P1dB. www.agilent.com/ semiconductors For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (408) 654-8675 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6756 2394 India, Australia, New Zealand: (+65) 6755 1939 Japan: (+81 3) 3335-8152(Domestic/International), or 0120-61-1280(Domestic Only) Korea: (+65) 6755 1989 Singapore, Malaysia, Vietnam, Thailand, Philippines, Indonesia: (+65) 6755 2044 Taiwan: (+65) 6755 1843 Data subject to change. Copyright © 2004 Agilent Technologies, Inc. October 4, 2004 5989-1707EN