IDT7054S/L HIGH-SPEED 4K x 8 FourPortTM STATIC RAM Features ◆ ◆ ◆ ◆ ◆ ◆ High-speed access – Commercial: 20/25/35ns (max.) – Industrial: 25ns (max.) – Military: 25/35ns (max.) Low-power operation – IDT7054S Active: 750mW (typ.) Standby: 7.5mW (typ.) – IDT7054L Active: 750mW (typ.) Standby: 1.5mW (typ.) True FourPort memory cells which allow simultaneous access of the same memory locations Fully asynchronous operation from each of the four ports: P1, P2, P3, and P4 ◆ TTL-compatible; single 5V (±10%) power supply Available in 128 pin Thin Quad Flatpack and 108 pin PGA packages Industrial temperature range (–40°C to +85°C) is available for selected speeds Description The IDT7054 is a high-speed 4K x 8 FourPort™ Static RAM designed to be used in systems where multiple access into a common RAM is required. This FourPort Static RAM offers increased system performance in multiprocessor systems that have a need to communicate in real time and also offers added benefit for high-speed systems in which multiple access is required in the same cycle. The IDT7054 is also designed to be used in systems where on-chip hardware port arbitration is not needed. This part lends itself to those systems which cannot tolerate wait states or are designed to be able to Functional Block Diagram R/WP1 CEP1 R/WP4 CEP4 OEP1 OEP4 I/O0P1-I/O7P1 A0P1 - A11P1 A0P2 - A11P2 I/O0P2-I/O7P2 COLUMN I/O PORT 1 ADDRESS DECODE LOGIC COLUMN I/O MEMORY ARRAY PORT 2 ADDRESS DECODE LOGIC COLUMN I/O PORT 4 ADDRESS DECODE LOGIC A0P4 - A11P4 PORT 3 ADDRESS DECODE LOGIC A0P3 - A11P3 COLUMN I/O OEP2 I/O0P4-I/O7P4 I/O0P3-I/O7P3 OEP3 CEP2 CEP3 R/WP2 R/WP3 3241 drw 01 NOVEMBER 2001 1 ©2001 Integrated Device Technology, Inc. DSC 3241/11 IDT7054S/L High-Speed 4K x 8 FourPort™ Static RAM Military, Industrial and Commercial Temperature Ranges externally arbitrated or withstand contention when all ports simultaneously access the same FourPort RAM location. The IDT7054 provides four independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. It is the user’s responsibility to ensure data integrity when simultaneously accessing the same memory location from all ports. An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to enter a very low power standby power mode. Fabricated using IDT’s CMOS high-performance technology, this FourPort SRAM typically operates on only 750mW of power. Low-power (L) versions offer battery backup data retention capability, with each port typically consuming 50µW from a 2V battery. The IDT7054 is packaged in a ceramic 108-pin Pin Grid Array (PGA) and a 128-pin Thin Quad Flatpack (TQFP). The military grade product is manufactured in compliance with the latest revision of MIL-PRF-38535 QML, making it ideally suited to military temperature applications demanding the highest level of performance and reliability. Pin Configurations(1,2,3) 11/14/01 81 80 R/W P2 84 77 83 74 78 76 OE NC A8 P2 P2 87 86 90 82 92 A6 P1 96 105 I/O2 P1 107 2 108 4 5 3 8 VCC 7 6 9 NC I/O1 P2 A B C 12 GND 10 I/O2 P2 I/O0 P2 I/O5 P1 07 A9 P4 06 R/W P4 05 NC 04 I/O6 P4 03 41 A11 P4 38 OE 13 I/O4 P2 11 I/O3 P2 D 17 21 VCC VCC 16 14 19 I/O1 P3 I/O6 P2 15 I/O5 P2 I/O7 P2 E F 25 GND 22 I/O3 P3 18 I/O2 P3 G H I/O5 P4 29 I/O7 P3 23 J 33 32 24 I/O4 P3 I/O7 P4 I/O2 P4 I/O5 P3 20 I/O0 P3 INDEX 28 VCC 36 34 GND I/O6 P1 I/O7 P1 I/O4 P1 A8 P4 42 37 31 1 I/O3 P1 08 P4 GND I/O1 P1 A10 P4 A7 P4 P4 106 103 09 45 40 GND A5 P4 47 43 35 10 A6 P4 CE I/O0 P1 P1 NC 104 P1 A2 P4 50 46 39 11 A3 P4 GND 108-Pin PGA Top View(5) NC A1 P4 49 44 12 53 51 A4 P4 IDT7054G G108-1(4) R/W P3 OE P3 CE P3 A9 P3 48 CE OE 56 A8 P3 55 58 A6 P3 102 100 101 62 A2 P3 59 A10 P3 54 A11 P3 A0 P4 VCC A11 P1 R/W P1 66 A2 P2 61 A4 P3 57 A7 P3 52 98 97 99 64 A1 P3 60 A5 P3 A4 P1 A7 P1 A9 P1 71 A6 P2 93 94 A8 P1 67 A1 P2 63 A3 P3 89 91 95 75 65 A0 P3 A0 P1 A3 P1 A10 P1 70 A4 P2 A9 P2 68 A0 P2 85 88 A5 P1 73 79 P2 69 A3 P2 A10 P2 CE A1 P1 A2 P1 72 A5 P2 A7 P2 A11 P2 30 I/O3 P4 26 I/O6 P3 K I/O4 P4 02 27 I/O0 P4 I/O1 P4 L M 01 3241 drw 02 NOTES: 1. All VCC pins must be connected to the power supply. 2. All GND pins must be connected to the ground supply. 3. Package body is approximately 1.21 in x 1.21 in x .16 in. 4. This package code is used to reference the package diagram. 5. This text does not indicate orientation of the actual part-marking. 6.42 2 IDT7054S/L High-Speed 4K x 8 FourPort™ Static RAM Pin Configurations (1,2,3) Military, Industrial and Commercial Temperature Ranges (con't.) CEP2 OEP2 N/C N/C N/C N/C N/C A0P1 A1P1 A2P1 A3P1 A4P1 A5P1 A6P1 A10P1 VCC A7P1 A8P1 A9P1 A11P1 CEP1 R/WP1 OEP1 N/C N/C N/C N/C N/C N/C I/O0P1 I/O1P1 I/O2P1 I/O3P1 GND I/O4P1 I/O5P1 I/O6P1 I/O7P1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 IDT7054PRF PK128-1(4) 128-Pin TQFP Top View(5) 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 INDEX 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 R/WP2 A11P2 A9P2 A8P2 A7P2 A10P2 A6P2 A5P2 A4P2 A3P2 A2P2 A1P2 A0P2 A0P3 A1P3 A2P3 A3P3 A4P3 A5P3 A6P3 A10P3 A7P3 A8P3 A9P3 A11P3 OEP3 11/14/01 CEP3 R/WP3 N/C N/C N/C N/C N/C A0P4 A1P4 A2P4 A3P4 A4P4 A5P4 A6P4 A10P4 GND A7P4 A8P4 A9P4 A11P4 CEP4 R/WP4 OEP4 N/C N/C N/C N/C N/C GND N/C I/O7P4 I/O6P4 I/O5P4 GND I/O4P4 I/O3P4 I/O2P4 I/O1P4 N/C VCC I/O0P2 I/O1P2 I/O2P2 GND I/O3P2 I/O4P2 I/O5P2 VCC I/O6P2 I/O7P2 N/C I/00P3 I/O1P3 VCC I/O2P3 I/O3P3 I/O4P3 GND I/O5P3 I/O6P3 I/O7P3 N/C VCC I/O0P4 . NOTES: 1. All VCC pins must be connected to the power supply. 2. All GND pins must be connected to the ground supply. 3. Package body is approximately 14mm x 20mm x 1.4mm. 4. This package code is used to reference the package diagram. 5. This text does not indicate orientation of the actual part-marking. 6.42 3 3241 drw 03 IDT7054S/L High-Speed 4K x 8 FourPort™ Static RAM Military, Industrial and Commercial Temperature Ranges Capacitance(1) Pin Configurations (1,2) Symbol (TA = +25°C, f = 1.0MHz) TQFP ONLY Pin Name Symbol Parameter Conditions(2) Max. Unit VIN = 0V 9 pF VOUT = 0V 10 pF A 0 P1 - A11 P1 Address Line s - Port 1 A 0 P2 - A11 P2 Address Line s - Port 2 A 0 P3 - A11 P3 Address Line s - Port 3 A 0 P4 - A11 P4 Address Line s - Port 4 I/O0 P1 - I/O7 P1 Data I/O - Port 1 I/O0 P2 - I/O7 P2 Data I/O - Port 2 I/O0 P3 - I/O7 P3 Data I/O - Port 3 I/O0 P4 - I/O7 P4 Data I/O - Port 4 R/W P1 Read/Write - Port 1 R/W P2 Read/Write - Port 2 R/W P3 Read/Write - Port 3 R/W P4 Read/Write - Port 4 GND Ground Military CE P1 Chip Enab le - Port 1 Commercial CE P2 Chip Enab le - Port 2 Industrial CE P3 Chip Enab le - Port 3 CE P4 NOTES: 1. This is the parameter TA. This is the "instant on" case temperature. Chip Enab le - Port 4 OE P1 Output Enab le - Port 1 OE P2 Output Enab le - Port 2 OE P3 Output Enab le - Port 3 OE P4 Output Enab le - Port 4 V CC Power VCC Supply Voltage GND Ground VIH VIL Input High Voltage Input Low Voltage Grade Symbol 3241 tbl 01 Unit 4.5 5.0 5.5 V 0 0 0 V 2.2 ____ NOTES: 1. VIL > -1.5V for pulse width less than 10ns. 2. VTERM must not exceed Vcc + 10%. GND Vcc -55°C to +125°C 0V 5.0V + 10% 0°C to +70 °C 0V 5.0V + 10% -40°C to +85°C 0V 5.0V + 10% 3241 tbl 04 Rating Commercial & Industrial Military Unit VTERM(2) Terminal Voltage with Respect to GND -0.5 to +7.0 -0.5 to +7.0 V TBIAS Temperature Under Bias -55 to +125 -65 to +135 o C TSTG Storage Temperature -65 to +150 -65 to +150 o C IOUT DC Output Current 50 50 mA 3241 tbl 05 Max. ____ Ambient Temperature Absolute Maximum Ratings(1) Typ. -0.5 Output Capacitance Maximum Operating Temperature and Supply Voltage(1) Min. (1) COUT 3241 tbl 03 Recommended DC Operating Conditions Parameter Input Capacitance NOTES: 1. This parameter is determined by device characterization but is not production tested. 2. 3dV references the interpolated capacitance when the input and the output signals switch from 0V to 3V or from 3V to 0V. NOTES: 1. All VCC pins must be connected to the power supply. 2. All GND pins must be connected to the ground supply. Symbol CIN 6.0 (2) 0.8 V V NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VTERM must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns maximum, and is limited to < 20mA for the period of V TERM > VCC + 10%. 3241 tbl 02 6.42 4 IDT7054S/L High-Speed 4K x 8 FourPort™ Static RAM Military, Industrial and Commercial Temperature Ranges DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range(1,5) (V CC = 5.0V ± 10%) 7054X20 Com'l Only Symbol ICC1 ICC2 ISB ISB1 Parameter Operating Power Supply Current (All Ports Active) Dynamic Operating Current (All Ports Active) Standby Current (All Ports - TTL Level Inputs) Full Standby Current (All Ports - All CMOS Level Inputs) Condition Version CE = VIL Outputs Disabled f = 0(3) CE = VIL Outputs Disabled f = fMAX(4) CE = VIH f = fMAX(4) All Ports CE > VCC - 0.2V VIN > VCC - 0.2V or VIN < 0.2V, f = 0(3) 7054X25 Com'l, Ind & Military 7054X35 Com'l & Military TYP.(2) Max. TYP. (2) Max. TYP.(2) Max. Unit COM'L. S L 150 150 300 250 150 150 300 250 150 150 300 250 mA MIL. & IND. S L ____ ____ ____ 150 150 360 300 150 150 360 300 mA ____ COM'L. S L 240 210 370 325 225 195 350 305 210 180 335 290 mA MIL. & IND. S L ____ ____ ____ 225 195 400 340 210 180 395 330 mA ____ COM'L. S L 70 60 95 80 60 50 85 70 40 35 75 60 mA MIL. & IND. S L ____ ____ ____ 60 50 115 85 40 35 110 80 mA ____ COM'L. S L 1.5 0.3 15 1.5 1.5 0.3 15 1.5 1.5 0.3 15 1.5 mA MIL. & IND. S L ____ ____ ____ 1.5 0.3 30 4.5 1.5 0.3 30 4.5 mA ____ 3241 tbl 06 NOTES: 1. 'X' in part number indicates power rating (S or L). 2. VCC = 5V, TA = +25°C and are not production tested. 3. f = 0 means no address or control lines change. 4. At f = fMAX , address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, and using “AC Test Conditions” of input levels of GND to 3V. 5. For the case of one port, divide the appropriate current above by four. DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range (VCC = 5.0V ± 10%) 7054S Symbol Parameter Test Conditions 7054L Min. Max. Min. Max. Unit |ILI| Input Leakage Current(1) VCC = 5.5V, VIN = 0V to V CC ___ 10 ___ 5 µA |ILO| Output Leakage Current CE = VIH, VOUT = 0V to V CC ___ 10 ___ 5 µA VOL Output Low Voltage IOL = 4mA ___ 0.4 ___ 0.4 V VOH Output High Voltage IOH = -4mA 2.4 ___ 2.4 ___ V 2674 tbl 07 NOTE: 1. At Vcc < 2.0V input leakages are undefined. 6.42 5 IDT7054S/L High-Speed 4K x 8 FourPort™ Static RAM Military, Industrial and Commercial Temperature Ranges AC Test Conditions GND to 3.0V Input Pulse Levels 3ns Max. Input Rise/Fall Times Input Timing Reference Levels 1.5V Output Reference Levels 1.5V Figures 1 and 2 Output Load 3241 tbl 08 5V 5V 893Ω 893Ω DATAOUT DATAOUT 347Ω 347Ω 30pF 5pF* 3241 drw 04 Figure 2. Output Test Load (for tLZ , tHZ , tWZ, tOW ) *Including scope and jig Figure 1. AC Output Test Load Timing Waveform of Read Cycle No. 1, Any Port(1) tRC ADDRESS tAA tOH DATAOUT tOH PREVIOUS DATA VALID DATA VALID 3241 drw 05 NOTE: 1. R/W = VIH, OE = VIL, and CE = VIL. 6.42 6 IDT7054S/L High-Speed 4K x 8 FourPort™ Static RAM Military, Industrial and Commercial Temperature Ranges AC Electrical Characteristics Over the Operating Temperature and Supply Voltage(3) 7054X20 Com'l Only Symbol Parameter 7054X25 Com'l, Ind & Military 7054X35 Com'l & Military Min. Max. Min. Max. Min. Max. Unit READ CYCLE tRC Read Cycle Time 20 ____ 25 ____ 35 ____ ns tAA Address Access Time ____ 20 ____ 25 ____ 35 ns Chip Enable Access Time ____ 20 ____ 25 ____ 35 ns Output Enable Access Time ____ 10 ____ 15 ____ 25 ns 0 ____ 0 ____ 0 ____ ns 5 ____ 5 ____ 5 ____ ns ____ 12 ____ 15 ____ 15 ns 0 ____ 0 ____ 0 ____ ns 20 ____ 25 ____ 35 tACE tAOE Output Hold from Address Change tOH (1,2) tLZ Output Low-Z Time tHZ Output High-Z Time (1,2) tPU Chip Enab le to Power Up Time (2) tPD Chip Disable to Power Down Time (2) ____ ns 3241 tbl 09 NOTES: 1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2). 2. This parameter is guaranteed by device characterization but is not production tested. 3. 'X' in part number indicates power rating (S or L). Timing Waveform of Read Cycle No. 2, Any Port(1, 2) tACE CE tAOE tHZ OE tLZ tHZ DATAOUT VALID DATA tLZ tPU tPD ICC 50% CURRENT 50% ISB 3241 drw 06 NOTES: 1. R/W = VIH for Read Cycles. 2. Addresses valid prior to or coincident with CE transition LOW. 6.42 7 IDT7054S/L High-Speed 4K x 8 FourPort™ Static RAM Military, Industrial and Commercial Temperature Ranges AC Electrical Characteristics Over the Operating Temperature and Supply Voltage(5) 7054X20 Com'l Only Symbol Parameter 7054X25 Com'l, Ind & Military 7054X35 Com'l & Military Min. Max. Min. Max. Min. Max. Unit 20 ____ 25 ____ 35 ____ ns 15 ____ 20 ____ 30 ____ ns 15 ____ 20 ____ 30 ____ ns 0 ____ 0 ____ 0 ____ ns 15 ____ 20 ____ 30 ____ ns 0 ____ 0 ____ 0 ____ ns 15 ____ 15 20 ____ ns ____ 15 ____ 15 ____ 15 ns 0 ____ 0 ____ 0 ____ ns ____ 12 ____ 15 ____ 15 ns 0 ____ 0 ____ 0 ____ ns ____ 35 ____ 45 ____ 55 ns 30 ____ 35 ____ 45 ns WRITE CYCLE tWC tEW tAW tAS Write Cycle Time Chip Enable to End-of-Write Address Valid to End-of-Write Address Set-up Time (3) tWP Write Pulse Width tWR Write Recovery Time tDW tHZ tDH Data Valid to End-of-Write Output High-Z Time (1,2) Data Hold Time (1,2) tWZ Write Enable to Output in High-Z tOW Output Active from End-of-Write (1,2) tWDD Write Pulse to Data Delay (4) tDDD Write Data Valid to Read Data Delay (4) ____ 3241 tbl 10 NOTES: 1. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2). 2. This parameter is guaranteed by device characterization but is not production tested. 3. If OE = VIL during a R/W controlled write cycle, the write pulse width must be the larger of tWP or (t WZ + tDW) to allow the I/O drivers to turn off data to be placed on the bus for the required tDW. If OE = V IH during an R/W controlled write cycle, this requirement does not apply and the write pulse can be as short as the specified tWP. Specified for OE = VIH (refer to “Timing Waveform of Write Cycle”, Note 8). 4. Port-to-port delay through RAM cells from writing port to reading port, refer to “Timing Waveform of Write with Port-to-Port Read”. 5. 'X' in part number indicates power rating. 6.42 8 IDT7054S/L High-Speed 4K x 8 FourPort™ Static RAM Military, Industrial and Commercial Temperature Ranges Timing Waveform of Write Cycle No. 1, R/W Controlled Timing(5,8) tWC ADDRESS (6) tAS OE tWR(3) tAW CE tHZ tWP(2) (7) R/W tWZ (7) tLZ tHZ (7) tOW DATAOUT (4) (4) tDW tDH DATAIN 3241 drw 07 Timing Waveform of Write Cycle No. 2, CE Controlled Timing(1,5) tWC ADDRESS tAW CE (6) tAS (2) tWR tEW (3) R/W tDW tDH DATAIN 3241 drw 08 NOTES: 1. R/W or CE = VIH during all address transitions. 2. A write occurs during the overlap (tEW or tWP) of a CE = VIL and a R/W = VIL. 3. tWR is measured from the earlier of CE or R/W = VIH to the end of write cycle. 4. During this period, the I/O pins are in the output state, and input signals must not be applied. 5. If the CE LOW transition occurs simultaneously with or after the R/W = VIL transition, the outputs remain in the High-impedance state. 6. Timing depends on which enable signal is asserted last, CE or R/W. 7. Transition is measured 0mV from Low or High-impedance voltage with the Output Test Load (Figure 2). This parameter is guaranteed but is not production tested. 8. If OE = VIL during a R/W controlled write cycle, the write pulse width must be the larger of tWP or (tWZ + tDW ) to allow the I/O drivers to turn off data to be placed on the bus for the required tDW. If OE = VIH during an R/W controlled write cycle, this requirement does not apply and the write pulse can be as short as the specified tWP. 6.42 9 IDT7054S/L High-Speed 4K x 8 FourPort™ Static RAM Military, Industrial and Commercial Temperature Ranges Timing Waveform of Write with Port-to-Port Read(1, 2) tWC ADDR"A" MATCH tWP R/W"A" tDW DATAIN"A" tDH VALID ADDR"B" MATCH tWDD DATA"B" VALID tDDD 3241 drw 09 NOTES: 1. OE = VIL for the reading ports. 2. All timing is the same for left and right ports. Port "A" may be either of the four ports and Port "B" is any other port. Table I Read/Write Control Functional Description The IDT7054 provides four ports with separate control, address, and I/O pins that permit independent access for reads or writes to any location in memory. These devices have an automatic power down feature controlled by CE. The CE controls on-chip power down circuitry that permits the respective port to go into standby mode when not selected (CE = VIH). When a port is enabled, access to the entire memory array is permitted. Each port has its own Output Enable control (OE). In the read mode, the port’s OE turns on the output drivers when set LOW. READ/ WRITE conditions are illustrated in the table. Any Port(1) R/W CE OE D0-7 X H X Z Port Deselected: Power-Down X H X Z CEP1=CEP2=CEP3=CEP4 =VIH Power Down Mode ISB or ISB1 L L X DATAIN H L L DATAOUT X X H Z Function Data on port written into memory (2) Data in memory output on port Outputs Disabled 3241 tbl 11 NOTES: 1. "H" = VIH, "L" = VIL, "X" = Don’t Care, "Z "= High Impedance 2. For valid write operation, no more than one port can write to the same address location at the same time. 6.42 10 IDT7054S/L High-Speed 4K x 8 FourPort™ Static RAM Military, Industrial and Commercial Temperature Ranges Ordering Information IDT XXXX A 999 A A Device Type Power Speed Package Process/ Temperature Range Blank I(1) B Commercial (0°C to +70°C) Industrial (-40°C to +85°C) Military (-55°C to +125°C) Compliant to MIL-PRF-38535 QML G PRF 108-Pin Pin Grid Array (G108-1) 128-Pin Thin Quad Plastic Flatpack (PK128-1) 20 25 35 Commercial Only Speed in Commercial, Industrial & Military nanoseconds Commercial & Military L S Low Power Standard Power 7054 32K (4K x 8) FourPort RAM 3241 drw 10 NOTE: 1. Industrial temperature range is available. For other speeds, packages and powers contact your sales office. Datasheet Document History 1/18/99: 6/4/99: 9/1/99: 11/10/99: 5/23/00: 10/22/01: Initiated datasheet document history Converted to new format Cosmetic typographical corrections Added additional notes to pin configurations Changed drawing format Page 1 Corrected DSC number Removed Preliminary Replaced IDT logo Page 4 Increased storage temperature parameter Clarified TA parameter Page 5 DC Electrical parameters–changed wording from "open" to "disabled" Changed ±200mV to 0mV in notes Page 2 & 3 Added date revision for pin configurations Page 5, 7 & 8 Added Industrial temp to column heading for 25ns speed to DC & AC Electrical Characteristics Page 11 Added Industrial temp offering to 25ns ordering information Page 4, 5, 7 & 8 Removed Industrial temp footnote from all tables Page 6 Changed 5ns to 3ns in AC Test Conditions table Page 1 & 11 Replace TM logo with ® logo CORPORATE HEADQUARTERS 2975 Stender Way Santa Clara, CA 95054 for SALES: 800-345-7015 or 408-727-6116 fax: 408-492-8674 www.idt.com The IDT logo is a registered trademark of Integrated Device Technology, Inc. 6.42 11 for Tech Support: 831-754-4613 [email protected]