IDT74FCT2374AT/CT FAST CMOS OCTAL D REGISTER (3-STATE) INDUSTRIAL TEMPERATURE RANGE FAST CMOS OCTAL D REGISTER (3-STATE) IDT74FCT2374AT/CT FEATURES: DESCRIPTION: • • • • The FCT2374T is an 8-bit register built using an advanced dual metal CMOS technology. These registers consist of eight D-type flip-flops with a buffered common clock and buffered 3-state output control. When the output enable (OE) input is low, the eight outputs are enabled. When the OE input is high, the outputs are in the high-impedance state. Input data meeting the set-up and hold time requirements of the D inputs is transferred to the Q outputs on the low-to-high transition of the clock input. The FCT2374T has balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot and controlled output fall times-reducing the need for external series terminating resistors. FCT2374T parts are plug-in replacements for FCT374T parts. • • • • A and C grades Low input and output leakage ≤1µA (max.) CMOS power levels True TTL input and output compatibility: – VOH = 3.3V (typ.) – VOL = 0.3V (typ.) Meets or exceeds JEDEC standard 18 specifications Resistor outputs -15mA IOH, 12mA IOL Reduced system switching noise Available in QSOP package FUNCTIONAL BLOCK DIAGRAM D0 D1 D2 D3 D4 D5 D6 D7 CP CP D CP D CP D CP D CP D CP D CP D CP D Q Q Q Q Q Q Q Q Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 OE The IDT logo is a registered trademark of Integrated Device Technology, Inc. INDUSTRIAL TEMPERATURE RANGE JUNE 2006 1 © 2006 Integrated Device Technology, Inc. DSC-5492/6 IDT74FCT2374AT/CT FAST CMOS OCTAL D REGISTER (3-STATE) INDUSTRIAL TEMPERATURE RANGE PIN CONFIGURATION OE 1 20 ABSOLUTE MAXIMUM RATINGS(1) VCC 2 19 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 Q0 Q3 GND Q7 Symbol Description Max Unit VTERM(2) Terminal Voltage with Respect to GND –0.5 to +7 V VTERM(3) Terminal Voltage with Respect to GND –0.5 to VCC+0.5 V TSTG Storage Temperature –65 to +150 °C IOUT DC Output Current –60 to +120 mA NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed Vcc by +0.5V unless otherwise noted. 2. Inputs and Vcc terminals only. 3. Output and I/O terminals only. CAPACITANCE (TA = +25°C, F = 1.0MHz) Parameter(1) Symbol 9 12 Q4 10 11 CP Conditions Typ. Max. Unit CIN Input Capacitance VIN = 0V 6 10 pF COUT Output Capacitance VOUT = 0V 8 12 pF NOTE: 1. This parameter is measured at characterization but not tested. QSOP TOP VIEW PIN DESCRIPTION Pin Names Description Dx D flipflop data inputs CP Clock Pulse for the register. Enters data on LOW-toHIGH transition Qx 3-State Outputs (TRUE) Qx 3-State Outputs (INVERTED) OE 3-State Output Enable Input (Active LOW) FUNCTION TABLE(1) Function High-Z Load Register OE H H L L H H NOTE: 1. H = HIGH Voltage Level X = Don’t Care L = LOW Voltage Level Z = High Impedance NC = No Change ↑ = LOW-to-HIGH transition 2 Inputs CP L H ↑ ↑ ↑ ↑ Dx X X L H L H Outputs Qx Z Z L H Z Z Internal Qx NC NC H L H L IDT74FCT2374AT/CT FAST CMOS OCTAL D REGISTER (3-STATE) INDUSTRIAL TEMPERATURE RANGE DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE Following Conditions Apply Unless Otherwise Specified: Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5% Symbol Test Conditions(1) Parameter Min. Typ.(2) Max. Unit 2 — — V VIH Input HIGH Level Guaranteed Logic HIGH Level VIL Input LOW Level Guaranteed Logic LOW Level — — 0.8 V IIH Input HIGH Current(4) VCC = Max. VI = 2.7V — — ±1 µA IIL Input LOW Current(4) VCC = Max. VI = 0.5V — — ±1 µA IOZH High Impedance Output Current VCC = Max. VI = 2.7V — — ±1 µA IOZL (3-State Output Pins)(4) VI = 0.5V — — ±1 II Input HIGH Current(4) VCC = Max., VI = VCC (Max.) — — ±1 µA VIK Clamp Diode Voltage VCC = Min., IIN = –18mA — –0.7 –1.2 V VH Input Hysteresis — 200 — mV ICC Quiescent Power Supply Current — 0.01 1 mA Min. 16 -16 2.4 Typ.(2) 48 -48 3.3 Max. — — — Unit mA mA V — 0.3 0.5 V — VCC = Max. VIN = GND or VCC OUTPUT DRIVE CHARACTERISTICS Symbol IODL IODH VOH VOL Parameter Output LOW Current Output HIGH Current Output HIGH Voltage Output LOW Voltage Test Conditions(1) VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3) VCC = 5V, VIN = VIH or VIL, VOUT = 1.5V(3) VCC = Min IOH = –15mA VIN = VIH or VIL VCC = Min IOL = 12mA VIN = VIH or VIL NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. The test limit for this parameter is ±5μA at TA = -55°C. 3 IDT74FCT2374AT/CT FAST CMOS OCTAL D REGISTER (3-STATE) INDUSTRIAL TEMPERATURE RANGE POWER SUPPLY CHARACTERISTICS Test Conditions(1) Symbol Parameter ΔICC Quiescent Power Supply Current TTL Inputs HIGH VCC = Max. VIN = 3.4V(3) ICCD Dynamic Power Supply Current(4) VCC = Max. Outputs Open OE = GND Min. Typ.(2) Max. Unit — 0.5 2 mA VIN = VCC VIN = GND — 0.06 0.12 mA/ MHz VIN = VCC VIN = GND — 0.6 2.2 mA VIN = 3.4V VIN = GND — 1.1 4.2 VIN = VCC VIN = GND — 1.5 4(5) VIN = 3.4V VIN = GND — 3.8 13(5) One Input Toggling 50% Duty Cycle IC Total Power Supply Current(6) VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND fi = 5MHz 50% Duty Cycle One BitToggling VCC = Max. Outputs Open fCP = 10MHz 50% Duty Cycle OE = GND Eight Bits Toggling fi = 2.5MHz 50% Duty Cycle NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25°C ambient. 3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of ΔICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ΔICC DHNT + ICCD (fCP/2+ fiNi) ICC = Quiescent Current ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Output Frequency Ni = Number of Outputs at fi All currents are in milliamps and all frequencies are in megahertz. 4 IDT74FCT2374AT/CT FAST CMOS OCTAL D REGISTER (3-STATE) INDUSTRIAL TEMPERATURE RANGE SWITCHING CHARACTERISTICS OVER OPERATING RANGE(1) 74FCT2374AT Parameter tPLH Propagation Delay CL = 50 pF tPHL CP to Qx RL = 500Ω tPZH Output Enable Time 1.5 6.5 1.5 5.5 ns Output Disable Time 1.5 5.5 1.5 5 ns Symbol Min.(2) 2 74FCT2374CT Condition(1) Max. Min.(2) Max. Unit 6.5 2 5.2 ns tPZL tPHZ tPLZ tSU Set-up Time HIGH or LOW, Dx to CP 2 — 2 — ns tH Hold Time HIGH or LOW, Dx to CP 1.5 — 1.5 — ns tW CP Pulse Width HIGH or LOW(3) 5 — 5 — ns NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. This parameter is guaranteed but not tested. 5 IDT74FCT2374AT/CT FAST CMOS OCTAL D REGISTER (3-STATE) INDUSTRIAL TEMPERATURE RANGE TEST CIRCUITS AND WAVEFORMS V CC SWITCH POSITION 7.0V 500W V OUT VIN Pulse Generator D.U.T . 50pF RT Test Switch Open Drain Disable Low Enable Low Closed All Other Tests Open 500W DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator. CL Octal Link Test Circuits for All Outputs DATA INPUT tH tSU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tREM tSU 3V 1.5V 0V 3V 1.5V 0V LOW-HIGH-LOW PULSE 1.5V tW 3V 1.5V 0V HIGH-LOW-HIGH PULSE 1.5V 3V 1.5V 0V tH Pulse Width Octal Link Octal Link Set-Up, Hold, and Release Times ENABLE SAME PHASE INPUT TRANSITION tPLH tPHL OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V VOH 1.5V VOL DISABLE 3V CONTROL INPUT tPZL OUTPUT NORMALLY LOW 3V 1.5V 0V SWITCH CLOSED tPLZ 3.5V 1.5V tPZH OUTPUT NORMALLY HIGH SWITCH OPEN 1.5V 0V 3.5V 0.3V VOL tPHZ 0.3V VOH 1.5V 0V Octal Link 0V Octal Link Propagation Delay Enable and Disable Times NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns. 6 IDT74FCT2374AT/CT FAST CMOS OCTAL D REGISTER (3-STATE) INDUSTRIAL TEMPERATURE RANGE ORDERING INFORMATION XXXX IDT XX FCT Device Type Temp. Range XX Package Q QG Quarter-size Small Outline Package QSOP - Green 2374AT Octal D Register 2374CT 74 CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 – 40°C to +85°C for SALES: 800-345-7015 or 408-284-8200 fax: 408-284-2775 www.idt.com 7 for Tech Support: [email protected]