INA321 INA2321 SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 microPower, Single-Supply, CMOS Instrumentation Amplifier FEATURES APPLICATIONS D LOW QUIESCENT CURRENT: 40µA/channel D INDUSTRIAL SENSOR AMPLIFIERS: D D D D D D D D D Shut Down: < 1µA HIGH GAIN ACCURACY: G = 5, 0.02%, 2ppm/°C GAIN SET WITH EXTERNAL RESISTORS LOW OFFSET VOLTAGE: ±200µV HIGH CMRR: 94dB LOW BIAS CURRENT: 10pA BANDWIDTH: 500kHz, G = 5V/V RAIL-TO-RAIL OUTPUT SWING: (V+) − 0.02V WIDE TEMPERATURE RANGE: −55°C to +125°C SINGLE VERSION IN MSOP-8 PACKAGE AND DUAL VERSION IN TSSOP-14 PACKAGE Bridge, RTD, Thermistor, Position D PHYSIOLOGICAL AMPLIFIERS: D D D D D D D ECG, EEG, EMG A/D CONVERTER SIGNAL CONDITIONING DIFFERENTIAL LINE RECEIVERS WITH GAIN FIELD UTILITY METERS PCMCIA CARDS COMMUNICATION SYSTEMS TEST EQUIPMENT AUTOMOTIVE INSTRUMENTATION CMRR vs FREQUENCY 120 DESCRIPTION Configured internally for 5V/V gain, the INA321 offers exceptional flexibility with user-programmable external gain resistors. The INA321 reduces common-mode error over frequency and with CMRR remaining high up to 3kHz, line noise and line harmonics are rejected. The low-power design does not compromise on bandwidth or slew rate, making the INA321 ideal for driving sample Analog-to-Digital (A/D) converters as well as general-purpose applications. With high precision, low cost, and small packaging, the INA321 outperforms discrete designs, while offering reliability and performance. CMRR (dB) 100 The INA321 family is a series of rail-to-rail output, micropower CMOS instrumentation amplifiers that offer wide-range, single-supply, as well as bipolar-supply operation. The INA321 family provides low-cost, low-noise amplification of differential signals with micropower current consumption of 40µA. When shutdown, the INA321 has a quiescent current of less than 1µA. Returning to normal operations within microseconds, the shutdown feature makes the INA321 optimal for low-power battery or multiplexing applications. INA321 80 10x Im provement Nearest Competition 60 40 10 100 1k 10k Frequency (Hz) R1 160kΩ 40kΩ RG 40kΩ R2 160kΩ REF A1 A3 VIN− VOUT A2 VIN+ Gain = 5 + 5(R2/R1) V OUT = (VIN+ − VIN−) • Gain Shutdown V+ V− Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. Copyright 2000-2006, Texas Instruments Incorporated ! ! www.ti.com "#$ #"#$ www.ti.com SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 ELECTROSTATIC DISCHARGE SENSITIVITY ABSOLUTE MAXIMUM RATINGS(1) Supply Voltage, V+ to V− . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5V Signal Input Terminals Voltage(2) . . . (V−) − (0.5V) to (V+) + (0.5V) Current(2) . . . . . . . . . . . . . . . . . . . . . 10mA Output Short-Circuit(3) . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. Operating Temperature . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. (2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5V beyond the supply rails should be current limited to 10mA or less. (3) Short-circuit to ground, one amplifier per package. PACKAGE/ORDERING INFORMATION(1) PACKAGE-LEAD PACKAGE DESIGNATOR SPECIFIED TEMPERATURE RANGE PACKAGE MARKING ORDERING NUMBER TRANSPORT MEDIA, QUANTITY SINGLE INA321E MSOP-8 DGK −55°C to +125°C C21 INA321E/250 INA321E/2K5 Tape and Reel, 250 Tape and Reel, 2500 INA321EA MSOP-8 DGK −55°C to +125°C C21 INA321EA/250 INA321EA/2K5 Tape and Reel, 250 Tape and Reel, 3000 DUAL INA2321EA TSSOP-14 PW −55°C to +125°C INA2321EA INA2321EA/250 INA2321EA/2K5 Tape and Reel, 250 Tape and Reel, 2500 PRODUCT ″ ″ ″ ″ ″ ″ ″ ″ ″ ″ ″ ″ ″ ″ ″ (1) For the most current package and ordering information, see the Package Option Addendum located at the end of this data sheet. PIN CONFIGURATIONS Top View INA2321 INA321 RG 1 8 Shutdown VIN− 2 7 V+ VIN+ 3 6 VOUT V− 4 5 REF MSOP−8 (E, EA) RGA 1 14 Shutdown A VIN−A 2 13 VOUTA VIN+A 3 12 REFA V− 4 11 V+ VIN+B 5 10 REFB VIN−B 6 9 VOUTB RGB 7 8 Shutdown B Dual, TSSOP−14 (EA) 2 "#$ #"#$ www.ti.com SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 ELECTRICAL CHARACTERISTICS: VS = +2.7V to +5.5V BOLDFACE limits apply over the specified temperature range, TA = −555C to +1255C. At TA = +25°C, RL = 25kΩ, G = 25, and IA common = VS/2, unless otherwise noted. INA321EA INA2321EA INA321E PARAMETER CONDITIONS MIN TYP MAX ±0.2 ±0.5 MIN TYP MAX UNIT 1 mV INPUT Input Offset Voltage, RTI Over Temperature VS = +5V vs Temperature VOS dVOS/dT vs Power Supply PSRR 2.5 ±7 ±50 VS = +2.7V to +5.5V * ±200 ∗ ±220 Over Temperature Input Impedance Input Common-Mode Range CMRR Over Temperature mV µV/°C ∗ * ±0.4 1013 || 3 Long-Term Stability Common-Mode Rejection ∗ ±2.2 ∗ µV/V µV/V µV/month ∗ Ω || pF VS = 2.7V VS = 5V 0.35 1.5 ∗ ∗ V 0.55 3.8 ∗ ∗ V VS = 5V, VCM = 0.55V to 3.8V 90 VS = 5V, VCM = 0.55V to 3.8V VS = 2.7V, VCM = 0.35V to 1.5V 77 Crosstalk, Dual 94 80 ∗ dB 75 dB 94 ∗ dB 110 ∗ dB INPUT BIAS CURRENT Bias Current IB IOS en Offset Current NOISE, RTI ±0.5 ±10 ∗ ∗ pA ±0.5 ±10 ∗ ∗ pA RS = 0Ω 500 ∗ nV/√Hz f = 100Hz 190 ∗ nV/√Hz f = 1kHz 100 ∗ nV/√Hz f = 0.1Hz to 10Hz 20 ∗ 3 ∗ µVPP fA/√Hz Voltage Noise: f = 10Hz Current Noise: f = 1kHz GAIN(1) Gain Equation, Externally Set G>5 Range of Gain Nonlinearity 1000 ∗ ∗ V/V ±0.02 ±0.1 ∗ ∗ % G=5 ±2 ±10 * * ppm/°C G = 25, VS = 5V, VO = 0.05 to 4.95 ±0.001 ±0.010 ∗ ∗ % of FS ±0.002 ±0.015 * * % of FS Gain Error vs Temperature ∗ G = 5 + 5 (R2/R1) 5 Over Temperature OUTPUT Output Voltage Swing from Rail(2, 5) Over Temperature 50 25 See Typical Characteristic(3) +ISC −ISC ∗ ∗ * 50 Capacitance Load Drive Short-Circuit Current G ≥ 10 mV mV ∗ pF ∗ mA 8 16 NOTE: ∗ Specification is same as INA321E. (1) Does not include errors from external gain setting resistors. (2) Output voltage swings are measured between the output and power-supply rails. (3) See typical characteristic Percent Overshoot vs Load Capacitance. (4) See typical characteristic Shutdown Voltage vs Supply Voltage. (5) Output does not swing to positive rail if gain is less than 10. 3 "#$ #"#$ www.ti.com SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 ELECTRICAL CHARACTERISTICS: VS = +2.7V to +5.5V (continued) BOLDFACE limits apply over the specified temperature range, TA = −555C to +1255C. At TA = +25°C, RL = 25kΩ, G = 25, and IA common = VS/2, unless otherwise noted. INA321EA INA2321EA INA321E PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNIT FREQUENCY RESPONSE Bandwidth, −3dB BW G=5 500 ∗ kHz Slew Rate SR VS = 5V, G = 25 G = 5, CL = 50pF, VO = 2V step 0.4 ∗ V/µs Settling Time, 0.1% tS 0.01% Overload Recovery 50% Input Overload G = 25 8 ∗ µs 12 ∗ µs 2 ∗ µs POWER SUPPLY Specified Voltage Range +2.7 Operating Voltage Range Quiescent Current +5.5 IQ per Channel, VSD > 2.5(4) 40 ISD per Channel, VSD > 0.8(4) 0.01 Over Temperature Shutdown Quiescent Current ∗ ∗ V ∗ µA * µA ∗ µA ∗ +2.5 to +5.5 ∗ 60 70 ∗ 1 V TEMPERATURE RANGE Specified Range −55 +125 ∗ ∗ °C Operating/Storage Range −65 +150 ∗ ∗ °C Thermal Resistance qJA MSOP-8, TSSOP-14 Surface-Mount 150 NOTE: ∗ Specification is same as INA321E. (1) Does not include errors from external gain setting resistors. (2) Output voltage swings are measured between the output and power-supply rails. (3) See typical characteristic Percent Overshoot vs Load Capacitance. (4) See typical characteristic Shutdown Voltage vs Supply Voltage. (5) Output does not swing to positive rail if gain is less than 10. 4 ∗ °C/W "#$ #"#$ www.ti.com SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 TYPICAL CHARACTERISTICS At TA = +25°C, VS = 5V, VCM =1/2VS, RL = 25kΩ, and CL = 50pF, unless otherwise noted. COMMON−MODE REJECTION RATIO vs FREQUENCY GAIN vs FREQUENCY 120 80 70 60 100 Gain = 500 50 80 CMRR (dB) Gain = 100 Gain (dB) 40 Gain = 25 30 20 Gain = 5 10 0 60 40 20 −10 −20 0 10 100 1k 10k 100k 1M 10 10M 100 POWER−SUPPLY REJECTION RATIO vs FREQUENCY 6 Maximum Output Voltage (VPP) 90 80 PSRR (dB) 70 60 50 40 30 20 10 100k VS = 5.5V 5 VS = 5.0V 4 VS = 2.7V 3 2 1 0 0 10 1 100 1k 10k 100 100k Frequency (Hz) 1k 10 100 1 10 100 1k 10k 100k 1M 10M 10k 0.1 100k 0.1Hz TO 10Hz VOLTAGE NOISE 10µv/div 100 INoise (fA/√Hz) 10k 10 1k Frequency (Hz) NOISE vs FREQUENCY VNOISE (nV/√Hz) 10k MAXIMUM OUTPUT VOLTAGE vs FREQUENCY 100 1 1k Frequency (Hz) Frequency (Hz) 1s/div Frequency (Hz) 5 "#$ #"#$ www.ti.com SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, VCM =1/2VS, RL = 25kΩ, and CL = 50pF, unless otherwise noted. COMMON−MODE INPUT RANGE vs REFERENCE VOLTAGE OUTPUT SWING vs LOAD RESISTANCE 25 OutputReferred to Ground (V) 6 15 To Positive Rail 10 To Negative Rail 5 5 Outside of Normal Operation 4 3 REF Increasing 2 1 0 0 0 20k 40k 60k 80k 100k 1 0 RLOAD (Ω) QUIESCENT CURRENT AND SHUTDOWN CURRENT vs POWER SUPPLY 500 45 450 350 300 25 250 20 200 15 150 10 IQ (µA) 30 ISD (nA) IQ (µA) 400 IQ 35 100 ISD 5 50 0 0 2.5 3 3.5 4 3 4 5 QUIESCENT CURRENT AND SHUTDOWN CURRENT vs TEMPERATURE 50 40 2 Input Common−Mode Voltage (V) 4.5 5 60 55 50 45 40 35 30 25 20 15 10 5 0 600 500 300 200 100 ISD −75 5.5 400 IQ −50 −25 0 25 50 75 100 125 0 150 Temperature (_C) Supply Voltage (V) SHORT−CIRCUIT CURRENT vs TEMPERATURE SHORT−CIRCUIT CURRENT vs POWER SUPPLY 20 30 25 ISC+ 15 10 ISC (mA) ISC (mA) 20 ISC− ISC+ 15 10 5 ISC− 5 0 0 2.5 3 3.5 4 4.5 Supply Voltage (V) 6 5 5.5 −75 −50 −25 0 25 50 75 Temperature (_ C) 100 125 150 ISD (nA) Swing−to−Rail (mV) 20 "#$ #"#$ www.ti.com SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, VCM =1/2VS, RL = 25kΩ, and CL = 50pF, unless otherwise noted. SMALL−SIGNAL STEP RESPONSE (G = 100) 50mV/div 100mV/div SMALL−SIGNAL STEP RESPONSE (G = 5) 50µs/div SMALL−SIGNAL STEP RESPONSE (G = 5, CL = 1000pF) SMALL−SIGNAL STEP RESPONSE (G = 100, CL = 1000pF) 50mV/div 100mV/div 10µs/div 50µs/div SMALL−SIGNAL STEP RESPONSE (G = 100, CL = 5000pF) LARGE−SIGNAL STEP RESPONSE (G = 25, CL = 50pF) 1V/div 50mV/div 10µs/div 50µs/div 50µs/div 7 "#$ #"#$ www.ti.com SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, VCM =1/2VS, RL = 25kΩ, and CL = 50pF, unless otherwise noted. PERCENT OVERSHOOT vs LOAD CAPACITANCE SETTLING TIME vs GAIN 60 100 Output 2VPP Differential Input Drive Settling Time (µs) 80 Output 100mVPP Differential Input Drive 50 70 Overshoot (%) 90 0.01% 60 50 40 30 G=5 40 30 G = 25 20 0.1% 20 10 10 0 0 1 10 100 10 1000 100 10k Load Capacitance (pF) SHUTDOWN VOLTAGE vs SUPPLY VOLTAGE SHUTDOWN TRANSIENT BEHAVIOR 3 Operation in this Region is not Recommended 2.5 Normal Operation Mode VSD 2 1V/div Shutdown (V) 1k Gain (V/V) 1.5 1 VOUT Shutdown Mode 0.5 Part Draws Below 1µA Quiescent Current 0 2.3 3 3.5 4 4.5 5 5.5 50µs/div Supply Voltage (V) OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION OFFSET VOLTAGE PRODUCTION DISTRIBUTION 25 20 Percentage of Amplifiers (%) Percentage of Amplifiers (%) 18 20 15 10 5 16 14 12 10 8 6 4 2 Offset Voltage (mV) 8 Offset Voltage Drift (µV/_C) 20 18 16 14 12 8 10 6 4 2 0 −2 −4 −6 −8 −1 0 −1 2 −1 4 −1 6 −1 8 −2 0 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0 0.1 − 0.1 − 0.2 − 0.3 − 0.4 − 0.5 − 0.6 − 0.7 − 0.8 − 0.9 0 − 1.0 0 "#$ #"#$ www.ti.com SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 TYPICAL CHARACTERISTICS (continued) At TA = +25°C, VS = 5V, VCM =1/2VS, RL = 25kΩ, and CL = 50pF, unless otherwise noted. INPUT BIAS CURRENT vs TEMPERATURE 10k 0.8 1k Input Bias Current (pA) Slew Rate (V/µs) SLEW RATE vs TEMPERATURE 1 0.6 0.4 0.2 0 −75 −50 100 10 0 0.1 −25 0 25 50 75 100 125 150 − 75 − 50 − 25 0 Temperature (_C) CROSSTALK vs FREQUENCY 50 75 100 125 150 OUTPUT VOLTAGE SWING vs OUTPUT CURRENT 5 120 100 4 Output Voltage (V) Crosstalk (dB) 25 Temperature (_ C) 80 60 40 +125°C − 55_ C +25°C 3 2 +125°C − 55_ C +25°C 1 20 0 0 0.1 1 10 100 1k Frequency (Hz) 10k 100k 1M 0 2 4 6 8 10 12 14 16 18 20 22 24 Output Current (mA) 9 "#$ #"#$ www.ti.com SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 APPLICATIONS INFORMATION The INA321 is a modified version of the classic two op amp instrumentation amplifier, with an additional gain amplifier. Figure 1 shows the basic connections for the operation of the INA321 and INA2321. The power supply should be capacitively decoupled with 0.1µF capacitors as close to the INA321 as possible for noisy or high-impedance applications. The output is referred to the reference terminal, which must be at least 1.2V below the positive supply rail. OPERATING VOLTAGE The INA321 family is fully specified over a supply range of +2.7V to +5.5V, with key parameters assured over the temperature range of −55°C to +125°C. Parameters that vary significantly with operating conditions, such as load conditions or temperature, are shown in the Typical Characteristics. The INA321 may be operated on a single supply. Figure 2 shows a bridge amplifier circuit operated from a single +5V supply. The bridge provides a small differential voltage riding on an input common-mode voltage. G = 5 + 5 (R2 / R1 ) Short VOUT to RG for G = 5 R1 DESIRED GAIN (V/V) R2 RG 1 REF 5 160kΩ 40kΩ R2 R1 OPEN SHORT 100kΩ 100kΩ 10kΩ 90kΩ 10kΩ 190kΩ 5 10 50 100 160kΩ VIN− 2 VIN+ 3 40kΩ A1 A3 6 VO = ((VIN+) − (VIN −)) • G A2 Also drawn in simplified form: 8 Shutdown 4 7 VIN+ (For Single Supply) 0.1µF V+ 7 5 INA321 0.1µF REF V+ Shutdown 3 V− VIN− 2 8 6 1 4 V− RG Figure 1. Basic Connections +5V Bridge Sensor VIN+ 3 V+ 7 REF(1) 5 INA321 VIN− Shutdown 8 6 VOUT 1 2 4 V− RG NOTE: (1) REF should be adjusted for the desired output level, keeping in mind that the value of REF affects the common−mode input range. See Typical Characteristics. Figure 2. Bridge Amplifier of the INA321 10 VOUT "#$ #"#$ www.ti.com SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 SETTING THE GAIN The ratio of R2 to R1, or the impedance between pins 1, 5, and 6, determines the gain of the INA321. With an internally set gain of 5, the INA321 can be programmed for gains greater than 5 according to the following equation: Figure 3 shows how bias current path can be provided in the cases of microphone applications, thermistor applications, ground returns, and dc-coupled resistive bridge applications. G = 5 + 5 (R2/R1) The INA321 is designed to provide accurate gain, with gain error assured to be less than 0.1%. Setting gain with matching TC resistors will minimize gain drift. Errors from external resistors will add directly to the gain error, and may become dominant error sources. V+ VIN + 3 8 Microphone, Hydrophone, etc. REF 5 VIN− 2 INPUT COMMON-MODE RANGE 47kΩ The upper limit of the common-mode input range is set by the common-mode input range of the second amplifier, A2, to 1.2V below positive supply. Under most conditions, the amplifier operates beyond this point with reduced performance. The lower limit of the input range is bounded by the output swing of amplifier A1, and is a function of the reference voltage according to the following equation: VOA1 = 5/4 VCM — 1/4 VREF INA321 V+ VIN + RG Shutdown 3 7 5 INA321 8 Transformer REF 6 VOUT 1 VIN− 2 4 V− REFERENCE For optimal operation, VOA2 should be less than VDD − 1.2V. VOUT 4 V− VB(1) VOA2 = VREF + 5 (VIN+ − VIN−) 6 1 VB (1) (See Typical Characteristics for Input Common-Mode Range vs Reference Voltage). The reference terminal defines the zero output voltage level. In setting the reference voltage, the common-mode input of A3 should be considered according to the following equation: Shutdown 7 Bridge Amplifier Center−tap RG provides bias current return VEX V+ Bridge Sensor VIN + Shutdown 3 7 5 INA321 8 REF 6 VOUT 1 VIN− 2 4 The reference pin requires a low-impedance connection. As little as 160Ω in series with the reference pin will degrade the CMRR to 80dB. The reference pin may be used to compensate for the offset voltage (see Offset Trimming section). The reference voltage level also influences the common-mode input range (see Common-Mode Input Range section). V− RG Bridge resistance provides bias current return NOTE: (1) VB is bias voltage within common−mode range, dependent on REF. INPUT BIAS CURRENT RETURN With a high input impedance of 1013Ω, the INA321 is ideal for use with high-impedance sources. The input bias current of less than 10pA makes the INA321 nearly independent of input impedance and ideal for low-power applications. For proper operation, a path must be provided for input bias currents for both inputs. Without input bias current paths, the inputs will float to a potential that exceeds common-mode range and the input amplifier will saturate. Figure 3. Providing an Input Common-Mode Path When differential source impedance is low, the bias current return path can be connected to one input. With higher source impedance, two equal resistors will provide a balanced input. The advantages are lower input offset voltage due to bias current flowing through the source impedance and better high-frequency gain. 11 "#$ #"#$ www.ti.com SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 OUTPUT BUFFERING The INA321 is optimized for a load impedance of 10kΩ or greater. For higher output current the INA321 can be buffered using the OPA340, as shown in Figure 4. The OPA340 can swing within 50mV of the supply rail, driving a 600Ω load. The OPA340 is available in the tiny MSOP-8 package. low output impedance at high frequencies makes it suitable for directly driving Capacitive Digital-to-Analog (CDAC) input A/D converters, as shown in Figure 5. +5V VIN+ REF VIN− 0.1µF VIN + REF VIN− 3 5 INA321 6 6 VOUT ADS7818 or ADS7822 1 2 4 V− 12−Bits RG fS < 100kHz OPA340 VOUT 4 V− INA321 VOUT 1 2 5 Shutdown 0.1µF Shutdown 8 V+ 7 8 +5V V+ 7 3 RG Figure 4. Output Buffering Circuit. Able to drive loads as low as 600Ω. SHUTDOWN MODE The shutdown pin of the INA321 is nominally connected to V+. When the pin is pulled below 0.8V on a 5V supply, the INA321 goes into sleep mode within nanoseconds. For actual shutdown threshold, see the Typical Characteristic curve, Shutdown Voltage vs Supply Voltage. Drawing less than 1µA of current, and returning from sleep mode in microseconds, the shutdown feature is useful for portable applications. Once in sleep-mode, the amplifier has high output impedance, making the INA321 suitable for multiplexing. Figure 5. INA321 Directly Drives a Capacitive-Input, A/D Converter OFFSET TRIMMING The INA321 is laser-trimmed for low offset voltage. In the event that external offset adjustment is required, the offset can be adjusted by applying a correction voltage to the reference terminal. Figure 6 shows an optional circuit for trimming offset voltage. The voltage applied to the REF terminal is added to the output signal. The gain from REF to VOUT is +1. An op-amp buffer is used to provide low impedance at the REF terminal to preserve good common-mode rejection. V+ VIN+ REF(1) 5 VIN− 8 INA321 6 VOUT 1 2 4 RAIL-TO-RAIL OUTPUT V− A class AB output stage with common-source transistors is used to achieve rail-to-rail output for gains of 10 or greater. For resistive loads greater than 25kΩ, the output voltage can swing to within a few millivolts of the supply rail while maintaining low gain error. For heavier loads and over temperature, see the Typical Characteristic curve, Output Voltage Swing vs Output Current. The INA321’s Shutdown 7 3 OPA336 RG Adjustable Voltage NOTE: (1) REF should be adjusted for the desired output level. The value of REF affects the common−mode input range. Figure 6. Optional Offset Trimming Voltage 12 "#$ #"#$ www.ti.com SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 INPUT PROTECTION Device inputs are protected by ESD diodes that will conduct if the input voltages exceed the power supplies by more than 500mV. Momentary voltages greater than 500mV beyond the power supply can be tolerated if the current through the input pins is limited to 10mA. This is easily accomplished with input resistor RLIM, as shown in Figure 7. Many input signals are inherently current-limited to less than 10mA; therefore, a limiting resistor is not required. V+ RLIM 3 VIN+ IOVERLOAD 10mA max REF 5 7 INA321 VOUT 1 2 VIN− 6 4 RLIM V− Adjusted VOS = Maximum specified VOS + (power-supply variation) • PSRR + (common-mode variation) • CMRR VOS = 0.5mV + (1.7V • 200µV) + (0.65V • 30µV) = ±0.860mV However, the typical value will be smaller, as seen in the Typical Characteristics. FEEDBACK CAPACITOR IMPROVES RESPONSE Shutdown 8 Calculation of the worst-case expected offset would be as follows: RG Figure 7. Input Protection For optimum settling time and stability with high-impedance feedback networks, it may be necessary to add a feedback capacitor across the feedback resistor, RF, as shown in Figure 8. This capacitor compensates for the zero created by the feedback network impedance and the INA321’s RG-pin input capacitance (and any parasitic layout capacitance). The effect becomes more significant with higher impedance networks. Also, RX and CL can be added to reduce high-frequency noise. OFFSET VOLTAGE ERROR CALCULATION The offset voltage (VOS) of the INA321E is specified at a maximum of 500µV with a +5V power supply and the common-mode voltage at VS/2. Additional specifications for power-supply rejection and common-mode rejection are provided to allow the user to easily calculate worst-case expected offset under the conditions of a given application. Power-Supply Rejection Ratio (PSRR) is specified in µV/V. For the INA321, worst-case PSRR is 200µV/V, which means for each volt of change in power supply, the offset may shift up to 200µV. Common-Mode Rejection Ratio (CMRR) is specified in dB, which can be converted to µV/V using the following equation: V+ VIN + 7 3 Shutdown 8 INA321 REF 6 5 VOUT CIN CL 1 VIN− RX 2 4 RG V− RIN RF RIN • CIN = RF • CF CF CMRR (in µV/V) = 10[(CMRR in dB)/—20] • 106 For the INA321, the worst-case CMRR over the specified common-mode range is 90dB (at G = 25) or about 30µV/V. This means that for every volt of change in common-mode, the offset will shift less than 30µV. These numbers can be used to calculate excursions from the specified offset voltage under different application conditions. For example, an application might configure the amplifier with a 3.3V supply with 1V common-mode. This configuration varies from the specified configuration, representing a 1.7V variation in power supply (5V in the offset specification versus 3.3V in the application) and a 0.65V variation in common-mode voltage from the specified VS/2. Where CIN is equal to the INA321 input capacitance (approximately 3pF) plus any parastic layout capacitance. Figure 8. Feedback Capacitor Improves Dynamic Performance It is suggested that a variable capacitor be used for the feedback capacitor since input capacitance may vary between instrumentation amplifiers, and layout capacitance is difficult to determine. For the circuit shown in Figure 8, the value of the variable feedback capacitor should be chosen by the following equation: RIN • CIN = RF • CF where CIN is equal to the INA321’s RG-pin input capacitance (typically 3pF) plus the layout capacitance. The capacitor can be varied until optimum performance is obtained. 13 "#$ #"#$ www.ti.com SBOS168D − DECEMBER 2000 − REVISED JANUARY 2006 APPLICATION CIRCUITS Medical ECG Applications optional right leg drive. Filtering can be modified to suit application needs by changing the capacitor value of the output filter. Figure 9 shows the INA321 configured to serve as a low-cost ECG amplifier, suitable for moderate accuracy heart-rate applications such as fitness equipment. The input signals are obtained from the left and right arms of the patient. The common-mode voltage is set by two 2MΩ resistors. This potential, through a buffer, provides an Low-Power, Single-Supply Data Acquisition Systems Refer to Figure 5 to see the INA321 configured to drive an ADS7818. Functioning at frequencies of up to 500kHz, the INA321 is ideal for low-power data acquisition. VR OPA336 1.6nF 0.1µF V+ 100kΩ Left Arm VIN+ 3 Shield 100kΩ Right Arm REF 5 VIN− 2 Shutdown 7 8 INA321 1 V− 2MΩ 10kΩ OPA336 RG 1MΩ 2MΩ Shield Drive 10kΩ 390kΩ OPA336 100kΩ OPA336 VR Figure 9. Simplified ECG Circuit for Medical Applications 14 VOUT PUT VR 2kΩ VR = +2.5V 2kΩ 10kΩ 6 4 +5V 1MΩ 1MΩ Right Leg PACKAGE OPTION ADDENDUM www.ti.com 5-Apr-2006 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty INA2321EA/250 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM INA2321EA/250G4 ACTIVE TSSOP PW 14 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM INA2321EA/2K5 ACTIVE TSSOP PW 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM INA2321EA/2K5G4 ACTIVE TSSOP PW 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM INA321E/250 ACTIVE MSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA321E/250G4 ACTIVE MSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA321E/2K5 ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA321E/2K5G4 ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA321EA/250 ACTIVE MSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA321EA/250G4 ACTIVE MSOP DGK 8 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA321EA/2K5 ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR INA321EA/2K5G4 ACTIVE MSOP DGK 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 5-Apr-2006 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing INA2321EA/250 TSSOP INA2321EA/2K5 INA321E/250 SPQ Reel Reel Diameter Width (mm) W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant PW 14 250 180.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1 TSSOP PW 14 2500 330.0 12.4 7.0 5.6 1.6 8.0 12.0 Q1 MSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 INA321E/2K5 MSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 INA321EA/250 MSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 INA321EA/2K5 MSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 11-Mar-2008 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) INA2321EA/250 TSSOP PW 14 250 184.0 184.0 50.0 INA2321EA/2K5 TSSOP PW 14 2500 346.0 346.0 29.0 INA321E/250 MSOP DGK 8 250 184.0 184.0 50.0 INA321E/2K5 MSOP DGK 8 2500 346.0 346.0 29.0 INA321EA/250 MSOP DGK 8 250 184.0 184.0 50.0 INA321EA/2K5 MSOP DGK 8 2500 346.0 346.0 29.0 Pack Materials-Page 2 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. 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