Data Sheet No. PD60191 revD IR21091(S) & (PbF) HALF-BRIDGE DRIVER Product Summary Features • • • • • • • • • • • • Floating channel designed for bootstrap operation Fully operational to +600V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout for both channels 3.3V, 5V and 15V input logic compatible Cross-conduction prevention logic Matched propagation delay for both channels High side output in phase with IN input Logic and power ground +/- 5V offset. Internal 500ns dead-time, and programmable up to 5us with one external RDT resistor Lower di/dt gate driver for better noise immunity The dual function DT/SD pin input turns off both channels. Available in Lead-Free VOFFSET IO+/VOUT ton/off (typ.) Dead time 600V max. 120 mA / 250 mA 10 - 20V 680 & 170 ns 500 ns (programmable up to 5uS) Packages Description The IR21091(S) are high voltage, high speed power MOSFET and IGBT drivers with dependant high and 8 Lead SOIC 8 Lead PDIP low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver crossconduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts. Typical Connection up to 600V VCC VCC VB IN IN HO SD DT/SD VS COM LO TO LOAD IR21091(S) (Refer to Lead Assignments for correct configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1 IR21091(S) & (PbF) Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition VB High side floating absolute voltage VS Min. Max. -0.3 625 Units High side floating supply offset voltage VB - 25 VB + 0.3 VHO High side floating output voltage VS - 0.3 VB + 0.3 VCC Low side and logic fixed supply voltage -0.3 25 VLO Low side output voltage -0.3 VCC + 0.3 Programmable dead-time and shut-down pin voltage VSS - 0.3 VCC + 0.3 Logic input voltage VSS - 0.3 VCC + 0.3 DT/SD VIN dVS/dt PD Rth JA Allowable offset supply voltage transient Package power dissipation @ TA ≤ +25°C Thermal resistance, junction to ambient — 50 (8 Lead PDIP) — 1.0 (8 Lead SOIC) — 0.625 (8 Lead PDIP) — 125 (8 Lead SOIC) — 200 TJ Junction temperature — 150 TS Storage temperature -50 150 TL Lead temperature (soldering, 10 seconds) — 300 V V/ns W °C/W °C Recommended Operating Conditions The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS offset rating are tested with all supplies biased at 15V differential. Symbol Definition VB High side floating supply absolute voltage VS High side floating supply offset voltage Min. Max. VS + 10 VS + 20 Note 1 600 VB VHO High side floating output voltage VS VCC Low side and logic fixed supply voltage 10 20 VLO Low side output voltage 0 VCC VIN DT/SD TA Logic input voltage VSS VCC Programmable dead-time and shut-down pin voltage VSS VCC Ambient temperature -40 125 Units V °C Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for more details). 2 www.irf.com IR21091(S) & (PbF) Dynamic Electrical Characteristics VBIAS (VCC, VBS) = 15V, CL = 1000 pF, TA = 25°C, DT = VSS unless otherwise specified. Symbol Definition Min. Typ. — 750 950 VS = 0V Turn-off propagation delay — 200 280 VS = 0V or 600V Delay matching, HS & LS turn-on/off — 0 70 tr Turn-on rise time — 150 220 tf DT Turn-off fall time — Deadtime: LO turn-off to HO turn-on(DTLO-HO) & HO turn-off to LO turn-on (DTHO-LO) 400 4 Deadtime matching = DTLO - HO - DTHO-LO ton Turn-on propagation delay toff MT MDT tsd Shut down propagation delay Max. Units Test Conditions nsec 50 80 540 5 680 6 usec — — 0 0 60 600 nsec 215 — 615 VS = 0V VS = 0V RDT= 0 RDT = 200k RDT=0 RDT = 200k Static Electrical Characteristics VBIAS (VCC, VBS) = 15V, DT= VSS and TA = 25°C unless otherwise specified. The VIL , VIH and IIN parameters are referenced to VSS /COM and are applicable to the respective input leads: IN and DT. The VO, IO and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO. Symbol Definition Min. Typ. Max. Units Test Conditions VIH Logic “1” input voltage for HO & logic “0” for LO 2.9 — — VCC = 10V to 20V VIL Logic “0” input voltage for HO & logic “1” for LO — — 0.8 VCC = 10V to 20V VSD,TH DT/SD pin shutdown input threshold 11.5 13 14.5 VOH High level output voltage, VBIAS - VO — 0.8 1.4 VOL Low level output voltage, VO — 0.3 0.6 ILK Offset supply leakage current — — 50 IQBS Quiescent VBS supply current 20 60 150 IQCC Quiescent VCC supply current 0.4 1.0 1.6 IIN+ Logic “1” input bias current — 5 20 IIN- Logic “0” input bias current — 1 2 VCC and VBS supply undervoltage positive going 8.0 8.9 9.8 7.4 8.2 9.0 V IO = 20 mA IO = 20 mA µA VB = VS = 600V VIN = 0V or 5V mA VIN = 0V or 5V RDT = 0 VCCUV+ VBSUV+ VCCUV- µA IN = 5V, SD = 0V IN = 0V, SD = 5V threshold VCC and VBS supply undervoltage negative going VBSUV- threshold VCCUVH Hysteresis 0.3 0.7 — IO+ Output high short circuit pulsed vurrent 120 200 — IO- Output low short circuit pulsed current V VBSUVH www.irf.com 250 350 — mA VO = 0V, PW ≤ 10 µs VO =15V,PW ≤ 10 µs 3 IR21091(S) & (PbF) Functional Block Diagrams VB UV DETECT IR21091(S) HO R VSS/COM LEVEL SHIFT IN DT/SD HV LEVEL SHIFTER R PULSE FILTER S VS PULSE GENERATOR VCC DEADTIME UV DETECT VSS/COM LEVEL SHIFT 4 Q DELAY LO COM www.irf.com IR21091(S) & (PbF) Lead Definitions Symbol Description IN Logic input for high and low side gate driver outputs (HO and LO), in phase with HO DT/SD Programmable dead-time lead, referenced to VSS. Disables input/output logic when tied to VCC VB High side floating supply HO High side gate drive output VS High side floating supply return VCC Low side and logic fixed supply LO Low side gate drive output COM Low side return Lead Assignments 1 VCC VB 8 1 2 IN HO 7 3 DT/SD VS 6 COM LO 4 www.irf.com 5 VCC VB 8 2 IN HO 7 3 DT/SD VS 6 COM LO 5 4 8 Lead PDIP 8 Lead SOIC IR21091 IR21091(S) 5 IR21091(S) & (PbF) Case Outlines 01-6014 01-3003 01 (MS-001AB) 8 Lead PDIP D DIM B 5 A F OOT PRINT 6 8 7 6 5 H E 0.25 [.010] 1 2 3 A 4 6.46 [.255] MIN .0532 .0688 1.35 1.75 A1 .0040 3X 1.27 [.050] 8X 1.78 [.070] e1 MAX 0.25 .0098 0.10 b .013 .020 0.33 0.51 c .0075 .0098 0.19 0.25 D .189 .1968 4.80 5.00 E .1497 .1574 3.80 4.00 e .050 BAS IC e1 6X e MILLIMETERS MAX A 8X 0.72 [.028] INCHES MIN .025 BAS IC 1.27 BAS IC 0.635 BAS IC H .2284 .2440 5.80 6.20 K .0099 .0196 0.25 0.50 L .016 .050 0.40 1.27 y 0° 8° 0° 8° K x 45° A C y 0.10 [.004] 8X b 0.25 [.010] A1 8X L 8X c 7 C A B 4. OUT LINE CONFORMS T O JEDEC OUTLINE MS -012AA. NOT ES: 1. DIMENS IONING & T OLERANCING PE R ASME Y14.5M-1994. 2. CONT ROLLING DIMENSION: MILLIMET ER 3. DIMENS IONS ARE SHOWN IN MILLIME TE RS [INCHES]. 4. OUT LINE CONF ORMS T O JEDEC OUTLINE MS-012AA. 8 Lead SOIC 6 5 DIMENSION DOES NOT INCLUDE MOLD PROT RUS IONS. MOLD PROTRUSIONS NOT T O E XCEED 0.15 [.006]. 6 DIMENSION DOES NOT INCLUDE MOLD PROT RUS IONS. MOLD PROTRUSIONS NOT T O E XCEED 0.25 [.010]. 7 DIMENSION IS T HE LE NGTH OF LEAD FOR SOLDE RING TO A SUBS TRAT E. 01-6027 01-0021 11 (MS-012AA) www.irf.com IR21091(S) & (PbF) IN(LO) IN 50% 50% IN(HO) DT/SD ton toff tr HO 90% LO HO LO Figure 1. Input/Output Timing Diagram 10% 10% 50% IN DT/SD tsd 90% 90% HO LO 90% Figure 2. Switching Time Waveform Definitions 50% 50% tf HO LO Figure 3. Shutdown Waveform Definitions DT LO-HO 10% DT HO-LO 90% 10% MDT= DT LO-HO - DT HO-LO Figure 4. Deadtime Waveform Definitions IN (LO) 50% 50% IN (HO) LO HO 10% MT MT 90% LO HO Figure 5. Delay Matching Waveform Definitions www.irf.com 7 IR21091(S) & (PbF) Basic Part (Non-Lead Free) Lead-Free Part 8-Lead PDIP IR21091 order IR21091 8-Lead SOIC IR21091S order IR21091S 8-Lead PDIP IR21091 order IR21091PBF 8-Lead SOIC IR21091S order IR21091SPBF This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR’s Website. Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 7/19/2005 8 www.irf.com