IRF IR2102PBF

Data Sheet No. PD60043 Rev.O
IR2101(S)/IR2102(S) &(PbF)
HIGH AND LOW SIDE DRIVER
Features
Product Summary
• Floating channel designed for bootstrap operation
•
•
•
•
•
•
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Gate drive supply range from 10 to 20V
Undervoltage lockout
3.3V, 5V, and 15V logic input compatible
Matched propagation delay for both channels
Outputs in phase with inputs (IR2101) or out of
phase with inputs (IR2102)
Also available LEAD-FREE
VOFFSET
600V max.
IO+/-
130 mA / 270 mA
VOUT
10 - 20V
ton/off (typ.)
160 & 150 ns
Delay Matching
50 ns
Packages
Description
The IR2101(S)/IR2102(S) are high voltage, high speed
power MOSFET and IGBT drivers with independent
high and low side referenced output channels. Pro8-Lead SOIC
8-Lead PDIP
prietary HVIC and latch immune CMOS technologies
IR2101S/IR2102S
IR2101/IR2102
enable ruggedized monolithic construction. The logic
input is compatible with standard CMOS or LSTTL
output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum
driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in
the high side configuration which operates up to 600 volts.
Typical Connection
up to 600V
VCC
VCC
VB
HIN
HIN
HO
LIN
LIN
VS
COM
LO
TO
LOAD
IR2101
up to 600V
VCC
(Refer to Lead Assignments for correct pin
configuration). This/These diagram(s) show
electrical connections only. Please refer to
our Application Notes and DesignTips for
proper circuit board layout.
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VCC
VB
HIN
HIN
HO
LIN
LIN
VS
COM
LO
TO
LOAD
IR2102
1
IR2101(S)/IR2102(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
Definition
VB
High side floating supply voltage
VS
Min.
Max.
-0.3
625
Units
High side floating supply offset voltage
VB - 25
VB + 0.3
VHO
High side floating output voltage
VS - 0.3
VB + 0.3
VCC
Low side and logic fixed supply voltage
-0.3
25
VLO
Low side output voltage
-0.3
VCC + 0.3
VIN
Logic input voltage (HIN & LIN)
-0.3
VCC + 0.3
—
50
dVS/dt
PD
RthJA
Allowable offset supply voltage transient
Package power dissipation @ TA ≤ +25°C
Thermal resistance, junction to ambient
(8 lead PDIP)
—
1.0
(8 lead SOIC)
—
0.625
(8 lead PDIP)
—
125
(8 lead SOIC)
—
200
TJ
Junction temperature
—
150
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
—
300
V
V/ns
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol
Min.
Max.
VB
High side floating supply absolute voltage
Definition
VS + 10
VS + 20
VS
High side floating supply offset voltage
Note 1
600
VHO
High side floating output voltage
VS
VB
VCC
Low side and logic fixed supply voltage
10
20
VLO
Low side output voltage
0
VCC
VIN
Logic input voltage (HIN & LIN) (IR2101) & (HIN & LIN) (IR2102)
0
VCC
TA
Ambient temperature
-40
125
Units
V
°C
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).
2
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IR2101(S)/IR2102(S) & (PbF)
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, CL = 1000 pF and TA = 25°C unless otherwise specified.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
ton
Turn-on propagation delay
—
160
220
VS = 0V
toff
Turn-off propagation delay
—
150
220
VS = 600V
tr
Turn-on rise time
—
100
170
tf
Turn-off fall time
—
50
90
Delay matching, HS & LS turn-on/off
—
—
50
MT
ns
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol
VIH
Definition
Logic “1” input voltage (IR2101)
Logic “0” input voltage (IR2102)
VIL
Logic “0” input voltage (IR2101)
Min. Typ. Max. Units Test Conditions
3
—
VCC = 10V to 20V
—
V
—
—
VCC = 10V to 20V
0.8
Logic “1”input voltage (IR2102)
VOH
High level output voltage, VBIAS - VO
VOL
Low level output voltage, VO
ILK
Offset supply leakage current
IQBS
Quiescent VBS supply current
IQCC
Quiescent VCC supply current
IIN+
Logic “1” input bias current
IIN-
Logic “0” input bias current
—
—
100
—
—
100
—
—
50
VB = VS = 600V
—
30
55
VIN = 0V or 5V
—
150
270
—
3
10
mV
IO = 0A
IO = 0A
VIN = 0V or 5V
µA
VIN = 5V (IR2101)
VIN = 0V (IR2102)
—
—
1
VCCUV+
VCC supply undervoltage positive going
threshold
8
8.9
9.8
VCCUV-
VCC supply undervoltage negative going
threshold
7.4
8.2
9
Output high short circuit pulsed current
130
210
—
IO+
VIN = 0V (IR2101)
VIN = 5V (IR2102)
V
VO = 0V
mA
IO-
Output low short circuit pulsed current
270
360
—
VIN = Logic “1”
PW ≤ 10 µs
VO = 15V
VIN = Logic “0”
PW ≤ 10 µs
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3
IR2101(S)/IR2102(S) & (PbF)
Functional Block Diagram
VB
HV
LEVEL
SHIFT
HIN
Q
PULSE
FILTER
R
HO
S
PULSE
GEN
VS
UV
DETECT
VCC
LIN
LO
COM
IR2101
VB
HV
LEVEL
SHIFT
Vcc
HIN
PULSE
GEN
Vcc
UV
DETECT
Q
PULSE
FILTER
R
HO
S
VS
VCC
LIN
LO
COM
IR2102
4
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IR2101(S)/IR2102(S) & (PbF)
Lead Definitions
Symbol
Description
HIN
Logic input for high side gate driver output (HO), in phase (IR2101)
HIN
Logic input for high side gate driver output (HO), out of phase (IR2102)
LIN
Logic input for low side gate driver output (LO), in phase (IR2101)
LIN
Logic input for low side gate driver output (LO), out of phase (IR2102)
VB
High side floating supply
HO
High side gate drive output
VS
High side floating supply return
VCC
Low side and logic fixed supply
LO
Low side gate drive output
COM
Low side return
Lead Assignments
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8 Lead PDIP
8 Lead SOIC
IR2101
IR2101S
8 Lead PDIP
8 Lead SOIC
IR2102
IR2102S
5
IR2101(S)/IR2102(S) & (PbF)
HIN
LIN
50%
50%
50%
50%
HIN
LIN
HIN
LIN
HIN
LIN
ton
toff
tr
90%
HO
LO
HO
LO
Figure 1. Input/Output Timing Diagram
HIN
LIN
HIN
LIN
10%
tf
90%
10%
Figure 2. Switching Time Waveform Definitions
50%
50%
50%
50%
LO
HO
10%
MT
MT
90%
LO
HO
Figure 3. Delay Matching Waveform Definitions
6
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IR2101(S)/IR2102(S) & (PbF)
500
Turn-On Delay Time (ns)
Turn-On Delay Time (ns)
500
400
300
200
100
Max.
Typ.
0
-50
400
Max.
300
200
Typ.
100
0
-25
0
25
50
75
100
125
10
12
Temperature (°C)
Figure 6A. Turn-On Time vs Temperature
18
20
5 00
Turn-Off Delay Time (ns)
400
300
200
100
4 00
3 00
M ax .
2 00
1 00
T yp .
0
0
2
4
6
8
0
10 12 14 16 18 20
-50
-25
0
25
50
75
Temperature (°C)
Input Voltage (V)
1 00
1 25
Figure 7A. Turn-Off Time vs Temperature
Figure 6C. Turn-On Time vs Input Voltage
500
Turn-Off Delay Time (ns
500
Turn-Off Delay Time (ns)
16
Figure 6B. Turn-On Time vs Supply Voltage
500
Turn-On Delay Time (ns
14
VBIAS Supply Voltage (V)
400
Max.
300
200
Typ.
100
400
300
Max.
200
100
Typ.
0
0
10
12
14
16
VBIAS Supply Voltage (V)
18
20
Figure 7B. Turn-Off Time vs Supply Voltage
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0
2
4
6
8
10
12
14
16
18
20
Input Voltage (V)
Figure 7C. Turn-Off Time vs Input Voltage
7
IR2101(S)/IR2102(S) & (PbF)
500
Turn-On Rise Time (ns)
Turn-On Rise Time (ns)
500
400
300
200
M ax.
100
400
300
M ax.
200
100
Typ.
Typ.
0
0
-5 0
-2 5
0
25
50
75
100
125
10
12
Temperature (°C)
Figure 9A. Turn-On Rise Time vs Temperature
16
18
20
Figure 9B. Turn-On Rise Time vs Voltage
20 0
200
Turn-Off Fall Time (ns)
Turn-Off Fall Time (ns)
14
VBIAS Supply Voltage (V)
15 0
10 0
M ax.
50
150
M a x.
100
50
Typ.
Ty p.
0
0
-50
-25
0
25
50
75
10 0
12 5
10
12
Figure 10A. Turn-Off Fall Time vs Temperature
8
7
7
In pu t V olta g e (V )
Inp ut V oltage (V )
6
5
M in .
3
2
1
18
20
6
5
4
M in.
3
2
1
0
0
-50
-25
0
25
50
75
10 0
12 5
Temperature (°C)
Figure 12A. Logic "1" Input Voltage (IR2101)
Logic "0" Input Voltage (IR2102)
vs Temperature
8
16
Figure 10B. Turn-Off Fall Time vs Voltage
8
4
14
VBIAS Supply Voltage (V)
Temperature (°C)
10
12
14
16
18
20
Vcc Supply Voltage (V)
Figure 12B. Logic "1" Input Voltage (IR2101)
Logic "0" Input Voltage (IR2102)
vs Voltage
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4
4
3 .2
3.2
Input V o ltag e (V )
In p u t V o lta g e (V )
IR2101(S)/IR2102(S) & (PbF)
2 .4
1 .6
M ax.
0 .8
2.4
1.6
M ax .
0.8
0
0
-5 0
-2 5
0
25
50
75
100
10
125
12
Temperature (°C)
High Level Output Voltage (V)
High Level Output Voltage (V)
18
20
1
1
0 .8
0 .6
0 .4
M ax.
0 .2
0 .8
0 .6
0 .4
M ax.
0 .2
0
0
-5 0
-2 5
0
25
50
75
100
10
125
12
14
16
18
20
Vcc Supply Voltage (V)
Temperature (°C)
Figure 14B. High Level Output vs Voltage
Figure 14A. High Level Output
vs Temperature
1
Low Level Output Voltage (V)
1
Low Level Output Voltage (V)
16
Figure 13B. Logic "0" Input Voltage (IR2101)
Logic "1" Input Voltage (IR2102)
vs Voltage
Figure 13A. Logic "0" Input Voltage (IR2101)
Logic "1" Input Voltage (IR2102)
vs Temperature
0 .8
0 .6
0 .4
0 .2
14
Vcc Supply Voltage (V)
M ax.
0
0 .8
0 .6
0 .4
0 .2
M ax.
0
-5 0
-2 5
0
25
50
75
100
Temperature (°C)
Figure 15A. Low Level Output
vs Temperature
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125
10
12
14
16
18
20
Vcc Supply Voltage (V)
Figure 15B. Low level Output vs Voltage
9
500
500
400
300
200
100
M ax.
0
-5 0
-2 5
0
25
50
75
100
125
Offset Supply Leakage Current (µA)
Offset Supply Leakage Current (µA)
IR2101(S)/IR2102(S) & (PbF)
400
300
200
100
Max.
0
0
100
1 20
90
60
M ax .
30
T yp .
0
500
600
120
90
60
Max .
30
Ty p.
0
-50
-25
0
25
50
75
1 00
1 25
10
12
Temperature (°C)
14
16
18
20
VBS Floating Supply Voltage (V)
Figure 17B. VBS Supply Current
vs Voltage
Figure 17A. VBS Supply Current
vs Temperature
700
700
Vcc Supply Current (µA)
Vcc Supply Current (µA)
400
150
VBS Supply Current (µA)
VBS Supply Current (µA)
1 50
600
500
400
M ax.
200
100
300
Figure 16B. Offset Supply Current
vs Voltage
Figure 16A. Offset Supply Current
vs Temperature
300
200
VB Boost Voltage (V)
Temperature (°C)
Typ.
600
500
400
300
M ax.
200
100
Typ.
0
0
-5 0
-2 5
0
25
50
75
100
Temperature (°C)
Figure 18A. Vcc Supply Current
vs Temperature
10
125
10
12
14
16
18
20
Vcc Supply Voltage (V)
Figure 18B. Vcc Supply Current
vs Voltage
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IR2101(S)/IR2102(S) & (PbF)
30
Logic 1” Input Current (µA)
Logic 1” Input Current (µA)
30
25
20
15
10
M ax.
5
Typ.
25
20
15
10
M ax.
5
Typ.
0
0
-5 0
-2 5
0
25
50
75
100
125
10
12
Figure 19A. Logic"1" Input Current
vs Temperature
Logic "0" Input Current (uA)
Logic “0” Input Current (µA)
18
20
5
4
3
2
Max.
1
4
3
2
Max.
1
0
0
-50
-25
0
25
50
75
Temperature (°C)
100
10
125
Figure 20A. Logic "0" Input Current
vs Temperature
12
14
16
VCC Supply Voltage (V)
18
20
Figure 20B. Logic "0" Input Current
vs Voltage
11
11
M ax.
VCC UVLO Threshold - (V)
VCC UVLO Threshold +(V)
16
Figure 19B. Logic"1" Input Current
vs Voltage
5
10
9
14
Vcc Supply Voltage (V)
Temperature (°C)
Typ.
M in.
8
7
6
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 21A. Vcc Undervoltage Threshold(+)
vs Temperature
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10
Max.
9
Typ.
8
7
Min.
6
-50
-25
0
25
50
75
100
125
Temperature (°C)
Figure 21B. Vcc Undervoltage Threshold(-)
vs Temperature
11
IR2101(S)/IR2102(S) & (PbF)
500
Output Source Current (mA)
Output Source Current (mA)
500
400
300
Typ.
200
100
Min.
0
-50
400
300
200
Typ.
100
Min.
0
-25
0
25
50
75
Temperature (°C)
100
125
10
Figure 22A. Output Source Current
vs Temperature
20
70 0
6 00
Output Sink Current (mA)
Output Sink Current (mA)
14
16
18
VBIAS Supply Voltage (V)
Figure 22B. Output Source Current
vs Voltage
7 00
T yp .
5 00
4 00
3 00
M in .
2 00
1 00
0
60 0
50 0
40 0
Ty p.
30 0
20 0
M in.
10 0
0
-50
-25
0
25
50
75
1 00
Temperature (°C)
Figure 23A. Output Sink Current
vs Temperature
12
12
1 25
10
12
14
16
18
20
VBIAS Supply Voltage (V)
Figure 23B. Output Sink Current
vs Voltage
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IR2101(S)/IR2102(S) & (PbF)
Case outlines
01-6014
01-3003 01 (MS-001AB)
8 Lead PDIP
D
DIM
B
5
A
FOOTPRINT
8
6
7
6
5
H
E
1
6X
2
3
0.25 [.010]
4
e
A
6.46 [.255]
3X 1.27 [.050]
e1
0.25 [.010]
A1
.0688
1.35
1.75
A1 .0040
.0098
0.10
0.25
b
.013
.020
0.33
0.51
c
.0075
.0098
0.19
0.25
D
.189
.1968
4.80
5.00
.1574
3.80
4.00
E
.1497
e
.050 BASIC
e1
MAX
1.27 BASIC
.025 BASIC
0.635 BASIC
H
.2284
.2440
5.80
6.20
K
.0099
.0196
0.25
0.50
L
.016
.050
0.40
1.27
y
0°
8°
0°
8°
y
0.10 [.004]
8X L
8X c
7
C A B
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUTLINE C ONFORMS TO JEDEC OUTLINE MS-012AA.
8 Lead SOIC
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MIN
.0532
K x 45°
A
C
8X b
8X 1.78 [.070]
MILLIMETERS
MAX
A
8X 0.72 [.028]
INCHES
MIN
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-6027
01-0021 11 (MS-012AA)
13
IR2101(S)/IR2102(S) & (PbF)
LEADFREE PART MARKING INFORMATION
Part number
Date code
IRxxxxxx
YWW?
Pin 1
Identifier
?
P
MARKING CODE
Lead Free Released
Non-Lead Free
Released
IR logo
?XXXX
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
Basic Part (Non-Lead Free)
8-Lead PDIP IR2101 order IR2101
8-Lead SOIC IR2101S order IR2101S
8-Lead PDIP IR2102 order IR2102
8-Lead SOIC IR2102S order IR2102S
Leadfree Part
8-Lead PDIP IR2101 order IR2101PbF
8-Lead SOIC IR2101S order IR2101SPbF
8-Lead PDIP IR2102 order IR2102PbF
8-Lead SOIC IR2102S order IR2102SPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
This product has been qualified per industrial level
Data and specifications subject to change without notice. 4/2/2004
14
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