ETC IR2152S

Preliminary Data Sheet No. PD60035J
IR2152
(NOTE: For new designs, we
recommend IR’s new products IR2154 and IR21541)
SELF-OSCILLATING HALF-BRIDGE DRIVER
Features
Product Summary
• Floating channel designed for bootstrap operation
•
•
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
Undervoltage lockout
Programmable oscillator frequency
f=
1
1.4 × (RT + 75Ω) × CT
• Matched propagation delay for both channels
• Low side output in phase with RT
VOFFSET
600V max.
Duty Cycle
50%
IO+/-
100 mA / 210 mA
VOUT
10 - 20V
Deadtime (typ.)
1.2 µs
Packages
Description
The IR2152 is a high voltage, high speed, selfoscillating power MOSFET and IGBT driver with both
high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies
enable ruggedized monolithic construction. The front
end features a programmable oscillator which is similar to the 555 timer. The output drivers feature a high
pulse current buffer stage and an internal deadtime
designed for minimum driver cross-conduction. Propagation delays for the two channels are matched to simplify use in 50% duty cycle applications. The floating
channel can be used to drive an N-channel power
MOSFET or IGBT in the high side configuration that
operates off a high voltage rail up to 600 volts.
8 Lead PDIP
8 Lead SOIC
Typical Connection
up to 600V
VCC
VB
RT
HO
CT
VS
COM
LO
TO
LOAD
(Refer to Lead Assignment diagram for correct pin configuration)
1
IR2152
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured
under board mounted and still air conditions.
Symbol
Definition
Min.
Max.
Units
VB
High side floating supply voltage
-0.3
625
VS
High side floating supply offset voltage
VB - 25
VB + 0.3
VHO
High side floating output voltage
VS - 0.3
VB + 0.3
VLO
Low side output voltage
-0.3
VCC + 0.3
VRT
RT voltage
-0.3
VCC + 0.3
VCT
CT voltage
-0.3
VCC + 0.3
ICC
Supply current (note 1)
—
25
IRT
RT output vurrent
-5
5
dVs/dt
PD
RTHJA
Allowable offset supply voltage transient
Package power dissipation @ TA ≤ +25°C
Thermal resistance, junction to ambient
—
50
(8 Lead DIP)
—
1.0
(8 Lead SOIC)
—
0.625
(8 Lead DIP)
—
125
(8 Lead SOIC)
—
200
150
TJ
Junction temperature
—
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
—
300
V
mA
V/ns
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol
High Side Floating Supply Absolute Voltage
Min.
Max.
VS + 10
VS + 20
Units
VS
High Side Floating Supply Offset Voltage
—
600
VHO
High Side Floating Output Voltage
VS
VB
VLO
Low Side Output Voltage
0
VCC
ICC
Supply Current (Note 1)
—
5
mA
TA
Ambient Temperature
-40
125
°C
Note 1:
2
Definition
VB
V
Because of the IR2152’s application specificity toward off-line supply systems, this IC contains a zener clamp
structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. Therefore, the IC
supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value
resistor connected between the chip VCC and the rectified line voltage and a local decoupling capacitor from
VCC to COM) and allowing the internal zener clamp circuit to determine the nominal supply voltage. Therefore, this circuit should not be driven by a DC, low impedance power source of greater than VCLAMP.
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IR2152
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 12V, C L = 1000 pF and TA = 25°C unless otherwise specified.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
tr
Turn-on rise time
—
80
120
tf
Turn-off fall time
—
40
70
0.50
1.20
2.25
µs
48
50
52
%
DT
D
Deadtime
RT duty cycle
ns
Static Electrical Characteristics
VBIAS (VCC, VBS) = 12V, CL = 1000 pF, CT = 1 nF and TA = 25°C unless otherwise specified. The VIN, VTH and IIN
parameters are referenced to COM. The VO and I O parameters are referenced to COM and are applicable to the
respective output leads: HO or LO.
Symbol
Definition
Min. Typ. Max. Units Test Conditions
Oscillator frequency
19.4
94
100
106
VCC zener shunt clamp voltage
14.4
15.6
16.8
VCT+
2/3 VCC threshold
7.8
8.0
8.2
VCT-
1/3 VCC threshold
3.8
4.0
4.2
CT undervoltage lockout, VCC - CT
—
20
50
2.5V<VCC<VCCUV+
RT high level output voltage, VCC - RT
—
0
100
IRT = -100 µA
—
200
300
IRT = -1 mA
—
20
50
IRT = 100 µA
—
200
300
RT undervoltage lockout
—
0
100
2.5V<VCC<VCCUV+
VOH
High level output voltage, VBIAS - VO
—
—
100
IO = 0A
VOL
Low level output voltage, VO
—
—
100
IO = 0A
ILK
Offset supply leakage current
—
—
50
VB = VS = 600V
IQBS
Quiescent VBS supply current
—
10
50
IQCC
Quiescent VCC supply current
—
400
950
CT input current
—
0.001
1.0
VCCUV+
VCC supply undervoltage positive going
threshold
7.7
8.4
9.2
VCCUV-
VCC supply undervoltage negative going
threshold
7.4
8.1
8.9
VCCUVH
fOSC
VCLAMP
VCTUV
VRT+
VRTVRTUV
ICT
RT low level output voltage
20.0
20.6
VCC supply undervoltage lockout hysteresis
200
500
—
IO+
Output high short circuit pulsed current
100
125
—
IO-
Output low short circuit pulsed current
210
250
—
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kHz
RT = 35.7 kΩ
RT = 7.04 kΩ
ICC = 5 mA
V
mV
IRT = 1 mA
µA
V
mV
mA
VO = 0V
VO = 15V
3
IR2152
Functional Block Diagram
VB
UV
DETECT
HV
LEVEL
SHIFT
RT
R
+
R
R
Q
S
Q
R
HO
S
PULSE
GEN
VS
V CC
15.6V
+
CT
DEAD
TIME
Q
PULSE
FILTER
DEAD
TIME
R
LO
DELAY
COM
Lead Definitions
Symbol Description
RT
CT
Oscillator timing resistor input,in phase with HO for normal IC operation
Oscillator timing capacitor input, the oscillator frequency according to the following equation:
f=
VB
HO
VS
VCC
LO
COM
1
1.4 × (RT + 75Ω) × CT
where 75Ω is the effective impedance of the RT output stage
High side floating supply
High side gate drive output
High side floating supply return
Low side and logic fixed supply
Low side gate drive output
Low side return
Lead Assignments
4
8 Lead PDIP
8 Lead SOIC
IR2152
IR2152S
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IR2152
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8 Lead PDIP
01-3003 01
8 Lead SOIC
01-0021 08
5
IR2152
VCCUV+
VCLAMP
VCC
RT (LO)
50%
50%
CT
RT (HO)
RT
tf
tr
90%
HO
LO
HO
LO
Figure 1. Input/Output Timing Diagram
10%
90%
10%
Figure 2. Switching Time Waveform Definitions
RT
50%
50%
90%
LO
10%
DT
HO
90%
10%
Figure 3. Deadtime Waveform Definitions
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
http://www.irf.com/
Data and specifications subject to change without notice. 3/29/2001
6
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