Data Sheet No. PD94119 IRU1010 1A LOW DROPOUT POSITIVE ADJUSTABLE REGULATOR DESCRIPTION FEATURES Guaranteed < 1.3V Dropout at Full Load Current Fast Transient Response 1% Voltage Reference Initial Accuracy Built-In Thermal Shutdown Available in SOT-223, D-Pak, Ultra Thin-Pak TM and 8-Pin SOIC Surface-Mount Packages APPLICATIONS VGA & Sound Card Applications Low Voltage High Speed Termination Applications Standard 3.3V Chip Set and Logic Applications The IRU1010 is a low dropout, three-terminal adjustable regulator with minimum of 1A output current capability. This product is specifically designed to provide well regulated supply for low voltage IC applications such as high speed bus termination and low current 3.3V logic supply. The IRU1010 is also well suited for other applications such as VGA and sound cards. The IRU1010 is guaranteed to have <1.3V dropout at full load current making it ideal to provide well regulated outputs of 2.5V to 3.6V with 4.75V to 7V input supply. TYPICAL APPLICATION D1 5V C1 10uF VIN 3 IRU1010 VOUT 2 2.85V / 1A R1 121 Adj 1 R2 154 C2 22uF Figure 1 - Typical application of IRU1010 in a 5V to 2.85V SCSI termination regulator. PACKAGE ORDER INFORMATION TJ (°C) 0 To 150 Rev. 1.7 02/03/03 2-PIN PLASTIC TO-252 (D-Pak) IRU1010CD 2-PIN PLASTIC Ultra Thin-PakTM (P) IRU1010CP www.irf.com 8-PIN PLASTIC SOIC (S) IRU1010CS 3-PIN PLASTIC SOT-223 (Y) IRU1010CY 1 IRU1010 ABSOLUTE MAXIMUM RATINGS Input Voltage (V IN) .................................................... Power Dissipation ..................................................... Storage Temperature Range ...................................... Operating Junction Temperature Range ..................... 7V Internally Limited -65°C To 150°C 0°C To 150°C PACKAGE INFORMATION 2-PIN PLASTIC TO-252 (D-Pak) 2-PIN ULTRA THIN-PAKTM (P) FRONT VIEW 8-PIN PLASTIC SOIC (S) FRONT VIEW 3 VIN TOP VIEW 3 Tab is VOUT V IN Tab is V OUT 1 1 Adj θJA=708C/W for 0.5" Sq pad 3-PIN PLASTIC SOT-223 (Y) Adj θJA=708C/W for 0.5" Sq pad TOP VIEW VIN 1 8 VOUT NC 2 7 VOUT NC 3 6 VOUT Adj 4 5 Tab is VOUT VOUT θJA=558C/W for 1" Sq pad 3 VIN 2 VOUT 1 Adj θJA=908C/W for 0.4" Sq pad ELECTRICAL SPECIFICATIONS Unless otherwise specified, these specifications apply over CIN=1mF, COUT=10mF, and TJ=0 to 1508C. Typical values refer to TJ=258C. PARAMETER Reference Voltage Line Regulation Load Regulation (Note 1) Dropout Voltage (Note 2) Current Limit Minimum Load Current (Note 3) Thermal Regulation Ripple Rejection Adjust Pin Current Adjust Pin Current Change Temperature Stability Long Term Stability RMS Output Noise SYM VREF DVo IADJ TEST CONDITION Io=10mA, TJ=258C, (V IN-Vo)=1.5V Io=10mA, (V IN-Vo)=1.5V Io=10mA, 1.3V<(V IN-Vo)<7V VIN=3.3V, VADJ=0, 10mA<Io<1A Note 2 , Io=1A VIN=3.3V, DVo=100mV VIN=3.3V, V ADJ=0V 30ms Pulse, VIN-Vo=3V, Io=1A f=120Hz, Co=25mF Tantalum, Io=0.5A, VIN-Vo=3V Io=10mA, VIN-Vo=1.5V, TJ=258C, Io=10mA, VIN-Vo=1.5V Io=10mA, VIN-Vo=1.5V, TJ=258C VIN=3.3V, VADJ=0V, Io=10mA TJ=1258C, 1000Hrs TJ=258C, 10Hz<f<10KHz Note 1: Low duty cycle pulse testing with Kelvin connections is required in order to maintain accurate data. Note 2: Dropout voltage is defined as the minimum differential voltage between VIN and VOUT required to maintain regulation at VOUT. It is measured when the output voltage drops 1% below its nominal value. 2 MIN 1.238 1.225 TYP 1.250 1.250 1.1 MAX 1.262 1.275 0.2 0.4 1.3 5 0.01 10 0.02 1.1 60 70 55 0.2 0.5 0.3 0.003 UNITS V % % V A mA %/W dB 120 5 1 mA mA % % %Vo Note 3: Minimum load current is defined as the minimum current required at the output in order for the output voltage to maintain regulation. Typically, the resistor dividers are selected such that it automatically maintains this current. www.irf.com Rev. 1.7 02/03/03 IRU1010 PIN DESCRIPTIONS PIN # PIN SYMBOL PIN DESCRIPTION 1 Adj 2 VOUT The output of the regulator. A minimum of 10mF capacitor must be connected from this pin to ground to insure stability. 3 VIN The input pin of the regulator. Typically a large storage capacitor is connected from this pin to ground to insure that the input voltage does not sag below the minimum dropout voltage during the load transient response. This pin must always be 1.3V higher than V OUT in order for the device to regulate properly. A resistor divider from this pin to the VOUT pin and ground sets the output voltage. BLOCK DIAGRAM VIN 3 2 VOUT + 1.25V + CURRENT LIMIT THERMAL SHUTDOWN 1 Adj Figure 2 - Simplified block diagram of the IRU1010. APPLICATION INFORMATION Introduction The IRU1010 adjustable Low Dropout (LDO) regulator is a three-terminal device which can easily be programmed with the addition of two external resistors to any voltages within the range of 1.25 to 5.5V. This regulator, unlike the first generation of the three-terminal regulators such as LM117 that required 3V differential between the input and the regulated output, only needs 1.3V differential to maintain output regulation. This is a key requirement for today’s low voltage IC applications that typically need 3.3V supply and are often generated from the 5V supply. Other applications such as high speed Rev. 1.7 02/03/03 memory termination need to switch the load current from zero to full load in tens of nanoseconds at their pins, which translates to an approximately 300 to 500ns current step at the regulator. In addition, the output voltage tolerances are sometimes tight and they include the transient response as part of the specification. The IRU1010 is specifically designed to meet the fast current transient needs as well as providing an accurate initial voltage, reducing the overall system cost with the need for fewer output capacitors. www.irf.com 3 IRU1010 Output Voltage Setting The IRU1010 can be programmed to any voltages in the range of 1.25V to 5.5V with the addition of R1 and R2 external resistors according to the following formula: ( VOUT = VREF3 1+ R2 R1 )+I 3R2 ADJ Where: VREF = 1.25V Typically IADJ = 50mA Typically R1 and R2 as shown in Figure 3: to the load side, the effective resistance between the regulator and the load is gained up by the factor of (1+ R2/R1), or the effective resistance will be RP(eff) =RP3(1+ R2/R1). It is important to note that for high current applications, this can represent a significant percentage of the overall load regulation and one must keep the path from the regulator to the load as short as possible to minimize this effect. PARASITIC LINE RESISTANCE RP VIN VOUT VIN IRU1010 VI N Vout V OUT V IN Adj RL R1 IRU1010 Adj R2 V REF IADJ = 50uA R1 R2 Figure 4 - Schematic showing connection for best load regulation. Figure 3 - Typical application of the IRU1010 for programming the output voltage. The IRU1010 keeps a constant 1.25V between the output pin and the adjust pin. By placing a resistor R1 across these two pins a constant current flows through R1, adding to the IADJ current and into the R2 resistor producing a voltage equal to the (1.25/R1)3R2+IADJ3R2 which will be added to the 1.25V to set the output voltage. This is summarized in the above equation. Since the minimum load current requirement of the IRU1010 is 10mA, R1 is typically selected to be 121V resistor so that it automatically satisfies the minimum current requirement. Notice that since IADJ is typically in the range of 50mA it only adds a small error to the output voltage and should only be considered when a very precise output voltage setting is required. For example, in a typical 3.3V application where R1=121V and R2=200V the error due to IADJ is only 0.3% of the nominal set point. Load Regulation Since the IRU1010 is only a three-terminal device, it is not possible to provide true remote sensing of the output voltage at the load. Figure 4 shows that the best load regulation is achieved when the bottom side of R2 is connected to the load and the top side of R1 resistor is connected directly to the case or the VOUT pin of the regulator and not to the load. In fact, if R1 is connected 4 Stability The IRU1010 requires the use of an output capacitor as part of the frequency compensation in order to make the regulator stable. Typical designs for microprocessor applications use standard electrolytic capacitors with a typical ESR in the range of 50 to 100mV and an output capacitance of 500 to 1000mF. Fortunately as the capacitance increases, the ESR decreases resulting in a fixed RC time constant. The IRU1010 takes advantage of this phenomena in making the overall regulator loop stable. For most applications a minimum of 100mF aluminum electrolytic capacitor such as Sanyo MVGX series, Panasonic FA series as well as the Nichicon PL series insures both stability and good transient response. Thermal Design The IRU1010 incorporates an internal thermal shutdown that protects the device when the junction temperature exceeds the maximum allowable junction temperature. Although this device can operate with junction temperatures in the range of 1508C, it is recommended that the selected heat sink be chosen such that during maximum continuous load operation the junction temperature is kept below this number. The next example for a SCSI terminator application shows the steps in sellecting the proper regulator in a surface-mount package. (See IRU1015 for non-surface-mount packages) www.irf.com Rev. 1.7 02/03/03 IRU1010 Assuming the following specifications: To set the output DC voltage, we need to select R1 and R2: VIN = 5V VF = 0.5V VOUT = 2.85V IOUT(MAX) = 0.8A TA = 358C 4) Assuming R1 = 121V, 1%: R2 = Where: VF is the forward voltage drop of the D1 diode as shown in Figure 5. -1 3121 = 154.8V ( VV -1) 3R =( 2.85 1.25 ) OUT 1 REF Select R2 = 154V, 1%. D1 The steps for selecting the right package with proper board area for heatsinking to keep the junction temperature below 1358C is given as: 5V C1 10uF C2 22uF IRU1010 Adj 1) Calculate the maximum power dissipation using: 2.85V V OUT V IN R1 121 1% PD = IOUT 3 (V IN - VF - VOUT) R2 154 1% PD = 0.8 3 (5 - 0.5 - 2.85) = 1.32W 2) Calculate the maximum uJA(MAX) = θJA allowed for our example: TJ - TA 135 - 35 = = 75.68C/W PD 1.32 Figure 5 - Final Schematic for half of the GTL+ termination regulator. 3) Select a package from the datasheet with lower than the one calculated in the previous step. θJA Selecting TO-252 (D-Pak) with at least 0.5" square of 0.062" FR4 board using 1 oz. copper has 70° C/W which is lower than the calculated number. Layout Consideration The output capacitors must be located as close to the VOUT terminal of the device as possible. It is recommended to use a section of a layer of the PC board as a plane to connect the V OUT pin to the output capacitors to prevent any high frequency oscillation that may result due to excessive trace inductance. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 02/01 Rev. 1.7 02/03/03 www.irf.com 5 IRU1010 (D) TO-252 Package 2-Pin K A C B L M 78 458 D J N E O P Q R G F S H R1 SYMBOL MIN MAX A 6.477 6.731 B 5.004 5.207 C 0.686 0.838 D 7.417 8.179 E 9.703 10.084 F 0.635 0.889 2.286 BSC G H 4.521 4.623 J &1.52 &1.62 K 2.184 2.388 L 0.762 0.864 M 1.016 1.118 N 5.969 6.223 O 1.016 1.118 P 0 0.102 Q 0.534 0.686 R R0.31 TYP R1 R0.51 TYP S 0.428 0.588 C L NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS. 6 www.irf.com Rev. 1.7 02/03/03 IRU1010 (P) Ultra Thin-PakTM 2-Pin A A1 E U K V B H M L P G D G1 N C R C L SYMBOL A A1 B C D E G G1 H K L M N P R U V MIN MAX 5.91 6.17 5.54 5.79 6.02 6.27 1.70 2.03 0.63 0.79 0.17 0.33 2.16 2.41 4.45 4.70 9.42 9.68 0.76 1.27 0.02 0.13 0.89 1.14 0.25 0.25 0.94 1.19 28 68 2.92 3.30 5.08 NOM NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS. Rev. 1.7 02/03/03 www.irf.com 7 IRU1010 (S) SOIC Package 8-Pin Surface Mount, Narrow Body H A B C E DETAIL-A PIN NO. 1 L D DETAIL-A 0.386 0.015 x 458 T K I F J G 8-PIN SYMBOL A B C D E F G H I J K L T MIN MAX 4.80 4.98 1.27 BSC 0.53 REF 0.36 0.46 3.81 3.99 1.52 1.72 0.10 0.25 78 BSC 0.19 0.25 5.80 6.20 08 88 0.41 1.27 1.37 1.57 NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS. 8 www.irf.com Rev. 1.7 02/03/03 IRU1010 (Y) SOT-223 Package 3-Pin SYMBOL A A1 B B1 C D E e e1 H Q Q1 Q2 S T D B E e H S MIN 1.498 0.02 2.895 0.637 0.239 6.299 3.30 2.209 4.496 6.70 08 78 78 0.838 1.092 MAX 1.702 0.11 3.15 0.85 0.381 6.706 3.708 2.953 4.699 7.30 108 168 168 1.05 1.30 NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS. e1 Q1 T B1 Rev. 1.7 02/03/03 A Q C A1 Q2 www.irf.com 9 IRU1010 PACKAGE SHIPMENT METHOD PKG DESIG PACKAGE DESCRIPTION PIN COUNT PARTS PER TUBE PARTS PER REEL T&R Orientation D TO-252, (D-Pak) 2 75 2500 Fig A P Ultra Thin-Pak TM 2 75 2500 Fig B S SOIC, Narrow Body 8 95 2500 Fig C Y SOT-223 3 80 2500 Fig D 1 1 1 1 Feed Direction Figure A 1 1 1 1 Feed Direction Figure B 1 1 1 1 Feed Direction Figure D Feed Direction Figure C IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information Data and specifications subject to change without notice. 02/01 10 www.irf.com Rev. 1.7 02/03/03