TECHNICAL DATA KK4017B Counter/Divider The KK4017B is 5-stage Johnson counter having 10 decoded outputs. Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal. Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise and fall times. The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. A high RESET signal clears the counter to its zero count. Use of the Johnson counter configuration permits high-speed operation, 2-input decode-gating and spike-free decoded outputs. Anti-lock gating is provided, thus assuring proper counting sequence. The decoded outputs are normally low and go high only at their respective decoded time slot. Each decoded output remains high for one full clock cycle. A CARRY-OUT signal completes one cycle every 10 clock input cycles. • Operating Voltage Range: 3.0 to 18 V • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C • Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply N SUFFIX PLASTIC 16 1 DW SUFFIX SOIC 16 1 ORDERING INFORMATION KK4017BN Plastic KK4017BD SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Clock L X X PIN 16 =VCC PIN 8 = GND Clock Enable X H X Reset L L H Output State no change no change reset counter Q0=H, Q1-Q9=L, C0=H Advance to next state L L X L no change X L no change H L Advance to next state Carry Out=H for Q0,Q1,Q2,Q3 or Q4=H Carry Out = L otherwise, X=don’t care 1 KK4017B MAXIMUM RATINGS* Symbol Parameter Value Unit -0.5 to 20 V VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) -0.5 to VCC 0.5 V DC Output Voltage (Referenced to GND) -0.5 to VCC 0.5 V VOUT IIN DC Input Current, per Pin ±10 mA PD Power Dissipation in Still Air, Plastic DIP** SOIC Package** 750 500 mW PD Power Dissipation per Output Transistor 100 mW -65 to 150 °C 260 °C Tstg TL Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) * Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. **Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C SOIC Package: : - 7 mW/°C from 65° to 125°C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Min Max Unit 3.0 18 V 0 VCC V -55 125 °C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. 2 KK4017B DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) VCC V ≥-55°C 25°C ≤125 °C Unit VOUT=0.5 V or VCC - 0.5 V VOUT=1.0 V or VCC - 1.0 V VOUT=1.5 V or VCC - 1.5 V 5.0 10 15 3.5 7 11 3.5 7 11 3.5 7 11 V Maximum Low Level Input Voltage VOUT=0.5 V or VCC - 0.5 V VOUT=1.0 V or VCC - 1.0 V VOUT=1.5 V or VCC - 1.5 V 5.0 10 15 1.5 3 4 1.5 3 4 1.5 3 4 V Minimum High-Level Output Voltage VIN=GND or VCC 5.0 10 15 5.0 10 15 4.95 9.95 14.95 4.5 9.0 13.5 4.95 9.95 14.95 4.5 9.0 13.5 4.95 9.95 14.95 4.5 9.0 13.5 V 0.05 0.05 0.05 0.5 1.0 1.5 0.05 0.05 0.05 0.5 1.0 1.5 0.05 0.05 0.05 0.5 1.0 1.5 V VIL=1.5V, VIH=3.5V, IO=1µA VIL=3.0V, VIH=7.0V, IO=1µA VIL=4.0V, VIH=11V, IO=1µA 5.0 10 15 5.0 10 15 Symbol Parameter VIH Minimum High-Level Input Voltage VIL VOH Test Conditions VIL=1.5V, VIH=3.5V, IO=-1µA VIL=3.0V, VIH=7.0V, IO=-1µA VIL=4.0V, VIH=11V, IO=-1µA VOL Guaranteed Limit Maximum Low-Level Output Voltage VIN=GND or VCC IIN Maximum Input Leakage Current VIN= GND or VCC 18 ±0.1 ±0.1 ±1.0 µA ICC Maximum Quiescent Supply Current (per Package) VIN= GND or VCC 5.0 10 15 20 1.0 2.0 4.0 20 1.0 2.0 4.0 20 30 60 120 600 µA IOL Minimum Output Low (Sink) Current VIN= GND or VCC VOL=0.4 V VOL=0.5 V VOL=1.5 V 5.0 10 15 0.64 1.6 4.2 0.51 1.3 3.4 0.36 0.9 2.4 Minimum Output VIN= GND or VCC High (Source) Current VOH=4.6 V VOH=2.5 V VOH=9.5 V VOH=13.5 V 5.0 5.0 10 15 -0.64 –2.0 –1.8 –4.2 -0.51 –1.6 –1.3 –3.4 -0.36 –1.15 –0.9 –2.4 IOH mA mA 3 KK4017B AC ELECTRICAL CHARACTERISTICS (CL=50pF, RL=200kΩ, Input tr=tf=20 ns) VCC Guaranteed Limit V ≥-55°C 25°C ≤125°C Unit Maximum Clock Frequency 5.0 10 15 2.5 5 5.5 2.5 5 5.5 2.0 4.0 5.0 MHz tPLH, tPHL Maximum Propagation Delay, Clock to Decode Output (Figure 1) 5.0 10 15 650 270 170 650 270 170 800 350 250 ns tPLH, tPHL Maximum Propagation Delay, Clock to Carry Output (Figure 1) 5.0 10 15 600 250 160 600 250 160 750 300 200 ns tTLH, tTHL Maximum Output Transition Time, Carry Output or Decode Output (Figure 1) 5.0 10 15 200 100 80 200 100 80 300 150 120 ns tPLH, tPHL Maximum Propagation Delay, Reset to Carry Output or Decode Output (Figure 1) 5.0 10 15 530 230 170 530 230 170 700 300 250 ns Symbol fmax CIN Parameter Maximum Input Capacitance - 5 pF TIMING REQUIREMENTS (VCC=5.0V±10%, CL=50pF, Input tr=tf=20 ns, RL=200kΩ ) VCC Symbol Parameter Guaranteed Limit V ≥-55°C 25°C ≤125°C Unit 200 90 60 200 90 60 300 150 100 ns tw Minimum Pulse Width, Clock (Figure 1) 5.0 10 15 tr, tf Maximum Input Rise and Fall Times, Clock (Figure 1) 5.0 10 15 tw Minimum Pulse Width, Reset (Figure 1) 5.0 10 15 260 110 60 260 110 60 400 180 100 ns trem Minimum Removal Time, Reset (Figure 1) 5.0 10 15 400 280 150 400 280 150 550 400 200 ns tSU Minimum Setup Time, Clock Inhibit to Clock (Figure 1) 5.0 10 15 230 100 70 230 100 70 300 150 100 ns µs UNLIMITED 4 KK4017B 1/f max t su 50% CLOCK CLOCK INHIBIT tf tw VCC 90% 90% 50% 50% 10% 10% 50% 50% 50% GND tr t rem 50% GND tw VCC 50% RESET 50% 50% DECODE Q0 OR 90% CARRY OUTPUT 10% 50% 50% GND VCC t PHL t PLH DECODE Q1-Q9 OUTPUT VCC GND t PHL t PLH 90% 10% 50% t VCC GND Figure 1. Switching Waveforms Timing diagram 5 KK4017B EXPANDED LOGIC DIAGRAM 6 KK4017B N SUFFIX PLASTIC (MS - 001BB) A 9 16 Dimensions, mm B 1 8 F C -T- SEATING PLANE N K M J H D MIN MAX A 18.67 19.69 B 6.10 7.11 C L G Symbol 0.25 (0.010) M T NOTES: 1. imensions “A”, “B” do not include mold flash or protrusions. Maximum mold flash or protrusions 0.25 mm (0.010) per side. 5.33 D 0.36 0.56 F 1.14 1.78 G 2.54 H 7.62 J 0° 10° K 2.92 3.81 L 7.62 8.26 M 0.20 0.36 N 0.38 D SUFFIX SOIC (MS - 012AC) A 16 9 H Dimensions, mm B 1 G P 8 R x 45 C -TK D SEATING PLANE J F 0.25 (0.010) M T C M NOTES: 1.Dimensions A and B do not include mold flash or protrusion. 2.Maximum mold flash or protrusion 0.15 mm (0.006) per side for A, for B - 0.25 mm (0.010) per side. M Symbol. MIN MAX A 9.80 10.0 B 3.80 4.00 C 1.35 1.75 D 0.33 0.51 F 0.40 1.27 G 1.27 H 5.72 J 0° 8° K 0.10 0.25 M 0.19 0.25 P 5.80 6.20 R 0.25 0.50 7