TI LMH0344

LMH0344
www.ti.com
SNLS233L – APRIL 2007 – REVISED APRIL 2013
3 Gbps HD/SD SDI Adaptive Cable Equalizer
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FEATURES
DESCRIPTION
•
The LMH0344 3 Gbps HD/SD SDI Adaptive Cable
Equalizer is designed to equalize data transmitted
over cable (or any media with similar dispersive loss
characteristics). The equalizer operates over a wide
range of data rates from 125 Mbps to 2.97 Gbps and
supports SMPTE 424M, SMPTE 292M, SMPTE
344M, and SMPTE 259M.
1
2
•
•
•
•
•
•
•
•
•
•
•
•
•
•
SMPTE 424M, SMPTE 292M, SMPTE 344M, and
SMPTE 259M Compliant
Supports DVB-ASI at 270 Mbps
Wide Range of Data Rates: 125 Mbps to 2.97
Gbps
Equalizes up to 120 Meters of Belden 1694A at
2.97 Gbps, up to 140 Meters of Belden 1694A
at 1.485 Gbps, or up to 400 Meters of Belden
1694A at 270 Mbps
Equalizes 0-120m of Belden 1694A at 2.97
Gbps With 0.3 UI Maximum Output Jitter
Manual Bypass and Output Mute With a
Programmable Threshold
Single-Ended or Differential Input
50Ω Differential Outputs (Internal 50Ω Pullups)
Single 3.3V Supply Operation
280 mW Typical Power Consumption
16-Pin WQFN or 25-Ball CS-BGA Package
Industrial Temperature Range: −40°C to +85°C
HBM ESD Rating: 8 kV
WQFN Version Footprint Compatible With the
LMH0044 and LMH0074
Replaces the Gennum GS2974A or GS2974B
The LMH0344 implements DC restoration to correctly
handle pathological data conditions. The equalizer
may be driven in either a single ended or differential
configuration.
Additional features include separate carrier detect
and output mute pins which may be tied together to
mute the output when no signal is present. A
programmable mute reference is provided to mute the
output at a selectable level of signal degradation.
For applications which use the RGBα data patterns,
the LMH0394 cable equalizer will provide better
performance.
The device is available in two space–saving
packages: a 4 X 4 mm 16-pin WQFN and even more
space-efficient 3 x 3 mm 25-ball CS-BGA package.
APPLICATIONS
•
•
•
SMPTE 424M, SMPTE 292M, SMPTE 344M, and
SMPTE 259M Serial Digital Interfaces
Serial Digital Data Equalization and Reception
Data Recovery Equalization
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2013, Texas Instruments Incorporated
LMH0344
SNLS233L – APRIL 2007 – REVISED APRIL 2013
www.ti.com
Typical Application
LMH0344 3G SDI
Adaptive Cable
Equalizer
Coaxial Cable
75:
1.0 PF
SDO
SDI
SDI
3.9 nH
LMH0341 3G SDI
Deserializer
RXIN0
RXIN0
TXOUT
TXOUT
Reclocked
Loopthrough
SDO
1.0 PF
MUTE
75:
RX[4:0]
MUTEREF
37.4:
CD
5-bit LVDS
+ clk
AEC-
AEC+
BYPASS
To FPGA
RXCLK
MUTE
MUTEREF
1.0 PF
BYPASS
CD
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)
Supply Voltage
4.0V
−0.3V to VCC+0.3V
Input Voltage (all inputs)
−65°C to +150°C
Storage Temperature Range
Junction Temperature
+125°C
Lead Temperature
+260°C
(Soldering 4 Sec)
Package Thermal Resistance
θJA 16-pin WQFN
+40°C/W
θJC 16-pin WQFN
+4.5°C/W
θJA 25-ball CS-BGA
ESD Rating
8 kV
MM
400V
CDM
(1)
+58.1°C/W
HBM
2 kV
Absolute Maximum Ratings are those parameter values beyond which the life and operation of the device cannot be ensured. The
stating herein of these maximums shall not be construed to imply that the device can or should be operated at or beyond these values.
The table of Electrical Characteristics specifies acceptable device operating conditions.
Recommended Operating Conditions
Supply Voltage (VCC – VEE)
3.3V ±5%
Input Coupling Capacitance
1.0 µF
AEC Capacitor (Connected between AEC+ and AEC-)
1.0 µF
−40°C to +85°C
Operating Free Air Temperature (TA)
2
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SNLS233L – APRIL 2007 – REVISED APRIL 2013
DC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol
Parameter
VCMIN
Input Common Mode Voltage
VSDI
Input Voltage Swing
VCMOUT
Output Common Mode Voltage
VSDO
Output Voltage Swing
Conditions
(1) (2)
.
Reference
Min
Typ
720
800
SDI, SDI
At LMH0344 input (3)
SDO, SDO
mVP−P
750
mVP-P
1.3
V
0.6
V
MUTEREF
CD
V
V
100Ω load, differential
Carrier not present
950
VCC –
VSDO/2
MUTEREF Range
CD Output Voltage
Units
1.9
(4)
MUTEREF DC Voltage (floating)
Max
2.4
V
Carrier present
MUTE Input Voltage
Min to mute outputs
0.4
MUTE
V
Max to force outputs active
ICC
(1)
(2)
(3)
(4)
V
2.0
Supply Current
85
0.8
V
100
mA
Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are stated
referenced to VEE = 0 Volts.
Typical values are stated for VCC = +3.3V and TA = +25°C.
Specification is ensured by characterization.
This specification is for 0m cable only.
AC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified
Symbol
Parameter
BRMIN
Minimum Input Data Rate
BRMax
Maximum Input Data Rate
Conditions
Reference
(1)
.
Min
SDI, SDI
Typ
Jitter for Various Cable Lengths 270 Mbps, Belden 1694A,
0-400 meters (2)
270 Mbps, Belden 1694A,
0-400 meters (3)
Mbps
0.2
UI
UI
0.08
2.97 Gbps, Belden 1694A,
0-120 meters (2)
0.18
SDO, SDO
UI
UI
0.3
2.97 Gbps, Belden 1694A,
0-120 meters (3)
20% – 80% (4)
Mbps
2970
0.25
1.485 Gbps, Belden 1694A,
0-140 meters (3)
Output Rise Time, Fall Time
Units
0.07
1.485 Gbps, Belden 1694A,
0-140 meters (2)
tr,tf
Max
125
UI
UI
60
130
ps
Mismatch in Rise/Fall Time
(4)
2
15
ps
tOS
Output Overshoot
(4)
1
5
%
ROUT
Output Resistance
single-ended
RLIN
Input Return Loss
5 MHz - 1.5 GHz (5)
50
SDI, SDI
1.5 GHz - 3.0 GHz (5)
Ω
15
dB
10
dB
RIN
Input Resistance
single-ended
1.3
kΩ
CIN
Input Capacitance
single-ended
1
pF
(1)
(2)
(3)
(4)
(5)
Typical values are stated for VCC = +3.3V and TA = +25°C.
Based on characterization data over the full range of recommended operating conditions of the device. Jitter is measured in accordance
with SMPTE RP 184, SMPTE RP 192, and the applicable serial data transmission standard: SMPTE 424M, SMPTE 292M, or SMPTE
259M.
Measured with Pseudo Matrix Pathological test signal.
Specification is ensured by characterization.
Input return loss is dependent on board design. The LMH0344 exceeds this specification on the SD344 evaluation board with a return
loss network consisting of an 8.2 nH inductor in parallel with a 0.5 pF capacitor in parallel with the 75Ω series resistor on the input.
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LMH0344
SNLS233L – APRIL 2007 – REVISED APRIL 2013
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Typical Performance Characteristics
Figure 1. After Equalization: 120m of Belden 1694A with
2.97 Gbps PRBS
4
Figure 2. After Equalization: 120m of Belden 1694A with
2.97 Gbps Pseudo Matrix Pathological
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LMH0344
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SNLS233L – APRIL 2007 – REVISED APRIL 2013
2
SDI
3
VEE
4
CD
MUTE
VCC
14
13
LMH0344SQ
(top view)
AEC+
5
6
7
8
MUTEREF
SDI
15
BYPASS
1
16
AEC-
VEE
VCC
CONNECTION DIAGRAM
12
VEE
11
SDO
10
SDO
9
VEE
The exposed die attach pad is a negative electrical terminal for this device. It should be connected to the negative
power supply voltage.
Figure 3. 16-Pin WQFN
See Package Number RUM
A
B
C
D
E
1
2
3
4
5
VCC
CD
VCC
VCC
NC
A1
A2
A3
A4
A5
VEE
VCC
MUTE
VEE
NC
B1
B2
B3
B4
B5
SDI
NC
NC
NC
SDO
C1
C2
C3
C4
C5
SDI
VEE
BYPASS
NC
SDO
D1
D2
D3
D4
D5
NC
AEC+
AEC-
MUTEREF
VEE
E1
E2
E3
E4
E5
LMH0344GR
(top view)
Figure 4. 25-Ball CS-BGA
See Package Number NYA
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LMH0344
SNLS233L – APRIL 2007 – REVISED APRIL 2013
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PIN DESCRIPTIONS
WQFN Pin
CS-BGA Ball
Name
Description
2
C1
SDI
Serial data true input.
3
D1
SDI
Serial data complement input.
5
E2
AEC+
AEC loop filter external capacitor (1µF) positive connection.
6
E3
AEC-
AEC loop filter external capacitor (1µF) negative connection.
7
D3
BYPASS
Bypasses equalization and DC restoration when high. No equalization occurs in this
mode.
8
E4
MUTEREF
Mute reference. Sets the threshold for CD and (with CD tied to MUTE) determines the
maximum cable to be equalized before muting. MUTEREF may be either unconnected
or connected to ground for maximum equalization.
10
D5
SDO
Serial data complement output.
11
C5
SDO
Serial data true output.
14
B3
MUTE
Output mute. To disable the mute function and enable the output, MUTE must be tied
to GND or a low level signal. To force the outputs to a muted state, tie to VCC. CD may
be tied to this pin to inhibit the output when no input signal is present. MUTE has no
function in BYPASS mode.
15
A2
CD
Carrier detect. CD is high when no signal is present. CD has no function in BYPASS
mode.
13, 16
A1, A3, A4, B2 VCC
Positive power supply (+3.3V).
DAP, 1, 4, 9,
12
B1, B4, D2, E5 VEE
Negative power supply (ground).
—
A5, B5, C2,
NC
C3, C4, D4, E1
No connect.
BLOCK DIAGRAM
BYPASS
Output
Driver
SDI
SDI
DC
Restoration/
Level Control
Equalizer
Filter
Energy
Detect
SDO
SDO
Energy
Detect
6
Automatic
Equalization
Control
Carrier
Detect/
Mute
CD
MUTE
MUTEREF
AEC+
6
AEC-
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LMH0344
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SNLS233L – APRIL 2007 – REVISED APRIL 2013
DEVICE OPERATION
BLOCK DESCRIPTION
The Equalizer Filter block is a multi-stage adaptive filter. If Bypass is high, the equalizer filter is disabled.
The DC Restoration / Level Control block receives the differential signals from the equalizer filter block. This
block incorporates a self-biasing DC restoration circuit to fully DC restore the signals. If Bypass is high, this
function is disabled.
The signals before and after the DC Restoration / Level Control block are used to generate the Automatic
Equalization Control (AEC) signal. This control signal sets the gain and bandwidth of the equalizer filter. The
loop response in the AEC block is controlled by an external 1µF capacitor placed across the AEC+ and AECpins.
The Carrier Detect / Mute block generates the carrier detect signal and controls the mute function of the output.
This block utilizes the CD and MUTE signals along with Mute Reference (MUTEREF).
The Output Driver produces SDO and SDO.
MUTE REFERENCE (MUTEREF)
The mute reference sets the threshold for CD and (with CD tied to MUTE) determines the amount of cable to
equalize before automatically muting the outputs. This is set by applying a voltage inversely proportional to the
length of cable to equalize. The applied voltage must be greater than the MUTEREF floating voltage (typically
1.3V) in order to change the CD threshold. As the applied MUTEREF voltage is increased, the amount of cable
that can be equalized before carrier detect is de-asserted and the outputs are muted is decreased. MUTEREF
may be left unconnected or connected to ground for maximum equalization before muting.
CARRIER DETECT (CD) AND MUTE
Carrier detect CD indicates if a valid signal is present at the LMH0344 input. If MUTEREF is used, the carrier
detect threshold will be altered accordingly. CD provides a high voltage when no signal is present at the
LMH0344 input. CD is low when a valid input signal is detected.
MUTE can be used to manually mute or enable SDO and SDO. Applying a high input to MUTE will mute the
LMH0344 outputs by forcing the output to a logic zero. Applying a low input will force the outputs to be active.
CD and MUTE may be tied together to automatically mute the output when no input signal is present.
INPUT INTERFACING
The LMH0344 accepts either differential or single-ended input. The input must be AC coupled. Transformer
coupling is not supported.
The LMH0344 correctly handles equalizer pathological signals for standard definition and high definition serial
digital video, as described in SMPTE RP 178 and RP 198, respectively.
OUTPUT INTERFACING
The SDO and SDO outputs are internally loaded with 50Ω. They produce a 750 mVP-P differential output, or a
375 mVP-P single-ended output.
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LMH0344
SNLS233L – APRIL 2007 – REVISED APRIL 2013
www.ti.com
REVISION HISTORY
Changes from Revision K (April 2013) to Revision L
•
8
Page
Changed layout of National Data Sheet to TI format ............................................................................................................ 7
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PACKAGE OPTION ADDENDUM
www.ti.com
15-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LMH0344GR/NOPB
ACTIVE
csBGA
NYA
25
1000
Green (RoHS
& no Sb/Br)
CU SNAGCU
Level-1-260C-UNLIM
-40 to 85
344G
LMH0344GRE/NOPB
ACTIVE
csBGA
NYA
25
250
Green (RoHS
& no Sb/Br)
CU SNAGCU
Level-1-260C-UNLIM
-40 to 85
344G
LMH0344GRX/NOPB
ACTIVE
csBGA
NYA
25
3500
Green (RoHS
& no Sb/Br)
CU SNAGCU
Level-1-260C-UNLIM
-40 to 85
344G
LMH0344SQ/NOPB
ACTIVE
WQFN
RUM
16
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
L0344
LMH0344SQE/NOPB
ACTIVE
WQFN
RUM
16
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
L0344
LMH0344SQX/NOPB
ACTIVE
WQFN
RUM
16
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
L0344
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
15-Apr-2013
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
LMH0344GR/NOPB
csBGA
NYA
25
LMH0344GRE/NOPB
csBGA
NYA
LMH0344GRX/NOPB
csBGA
NYA
LMH0344SQ/NOPB
WQFN
LMH0344SQE/NOPB
LMH0344SQX/NOPB
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
1000
178.0
12.4
3.3
3.3
1.6
8.0
12.0
Q1
25
250
178.0
12.4
3.3
3.3
1.6
8.0
12.0
Q1
25
3500
330.0
12.4
3.3
3.3
1.6
8.0
12.0
Q1
RUM
16
1000
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
WQFN
RUM
16
250
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
WQFN
RUM
16
4500
330.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMH0344GR/NOPB
csBGA
NYA
25
1000
210.0
185.0
35.0
LMH0344GRE/NOPB
csBGA
NYA
25
250
210.0
185.0
35.0
LMH0344GRX/NOPB
csBGA
NYA
25
3500
367.0
367.0
35.0
LMH0344SQ/NOPB
WQFN
RUM
16
1000
210.0
185.0
35.0
LMH0344SQE/NOPB
WQFN
RUM
16
250
210.0
185.0
35.0
LMH0344SQX/NOPB
WQFN
RUM
16
4500
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
NYA0025A
GRA25A (Rev A)
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MECHANICAL DATA
RUM0016A
SQB16A (Rev A)
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