LINER LT1351CS8

LT1351
250µA, 3MHz, 200V/µs
Operational Amplifier
U
DESCRIPTION
FEATURES
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The LT ®1351 is a low power, high speed, high slew rate
operational amplifier with outstanding AC and DC performance. The LT1351 features lower supply current, lower
input offset voltage, lower input bias current and higher
DC gain than devices with comparable bandwidth. The
circuit combines the slewing performance of a current
feedback amplifier in a true operational amplifier with
matched high impedance inputs. The high slew rate ensures that the large-signal bandwidth is not degraded. The
amplifier is a single gain stage with outstanding settling
characteristics which make the circuit an ideal choice for
data acquisition systems. The output drives a 1kΩ load to
±13V with ±15V supplies and a 500Ω load to ±3.4V on ±5V
supplies. The amplifier is also stable with any capacitive
load which makes it useful in buffer or cable driver
applications.
3MHz Gain Bandwidth
200V/µs Slew Rate
250µA Supply Current
Available in Tiny MSOP Package
C-LoadTM Op Amp Drives All Capacitive Loads
Unity-Gain Stable
Power Saving Shutdown Feature
Maximum Input Offset Voltage: 600µV
Maximum Input Bias Current: 50nA
Maximum Input Offset Current: 15nA
Minimum DC Gain, RL = 2k: 30V/mV
Input Noise Voltage: 14nV/√Hz
Settling Time to 0.1%, 10V Step: 700ns
Settling Time to 0.01%, 10V Step: 1.25µs
Minimum Output Swing into 1k: ±13V
Minimum Output Swing into 500Ω: ±3.4V
Specified at ±2.5V, ±5V and ±15V
The LT1351 is a member of a family of fast, high performance amplifiers using this unique topology and employing Linear Technology Corporation’s advanced
complementary bipolar processing. For dual and quad
amplifier versions of the LT1351 see the LT1352/LT1353
data sheet. For higher bandwidth devices with higher
supply current see the LT1354 through LT1365 data sheets.
Singles, duals and quads of each amplifier are available.
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APPLICATIONS
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Battery-Powered Systems
Wideband Amplifiers
Buffers
Active Filters
Data Acquisition Systems
Photodiode Amplifiers
, LTC and LT are registered trademarks of Linear Technology Corporation.
C-Load is a trademark of Linear Technology Corporation.
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TYPICAL APPLICATION
Instrumentation Amplifier
R1
50k
R2
5k
–
LT1351
–
VIN
+
R5
1.1k
Large-Signal Response
R4
50k
R3
5k
–
LT1351
VOUT
+
+
GAIN = [R4/R3][1 + (1/2)(R2/R1 + R3/R4) + (R2 + R3)/R5] = 102
TRIM R5 FOR GAIN
TRIM R1 FOR COMMON MODE REJECTION
BW = 30kHz
1351 TA01
AV = –1
1351 TA02
1
LT1351
W W
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ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V + to V –) .............................. 36V
Differential Input Voltage (Transient Only, Note 1) ... ±10V
Input Voltage .......................................................... ±VS
Output Short-Circuit Duration (Note 2) ........... Indefinite
Operating Temperature Range ................ – 40°C to 85°C
Specified Temperature Range (Note 6) .....– 40°C to 85°C
Maximum Junction Temperature (See Below)
Plastic Package ................................................ 150°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
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W
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PACKAGE/ORDER INFORMATION
TOP VIEW
NULL
–IN
+IN
V–
1
2
3
4
8
7
6
5
NULL
V+
VOUT
SHDN
MS8 PACKAGE
8-LEAD PLASTIC MSOP
ORDER PART
NUMBER
LT1351CMS8
MS8 PART MARKING
TJMAX = 150°C, θJA = 250°C/ W
LTBT
ORDER PART
NUMBER
TOP VIEW
NULL 1
8
NULL
– IN 2
7
V+
+IN 3
6
VOUT
V– 4
5
SHDN
N8 PACKAGE
8-LEAD PDIP
LT1351CN8
LT1351CS8
S8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
1351
TJMAX = 150°C, θJA = 130°C/ W (N8)
TJMAX = 150°C, θJA = 190°C/ W (S)
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
VOS
Input Offset Voltage
IOS
TA = 25°C, VCM = 0V unless otherwise noted.
CONDITIONS
TYP
MAX
UNITS
±15V
±5V
±2.5V
0.2
0.2
0.3
0.6
0.6
0.8
mV
mV
mV
Input Offset Current
±2.5V to ±15V
5
15
nA
IB
Input Bias Current
±2.5V to ±15V
20
50
nA
en
Input Noise Voltage
f = 10kHz
±2.5V to ±15V
14
nV/√Hz
in
Input Noise Current
f = 10kHz
±2.5V to ±15V
0.5
pA/√Hz
RIN
Input Resistance
VCM = ±12V
Differential
600
20
MΩ
MΩ
CIN
Input Capacitance
±15V
3
pF
Positive Input Voltage Range
±15V
±5V
±2.5V
13.5
3.5
1.0
V
V
V
Negative Input Voltage Range
±15V
±5V
±2.5V
CMRR
Common Mode Rejection Ratio
VCM = ±12V
VCM = ±2.5V
VCM = ±0.5V
PSRR
Power Supply Rejection Ratio
VS = ±2.5V to ±15V
2
VSUPPLY
±15V
±15V
±15V
±5V
±2.5V
MIN
300
12.0
2.5
0.5
– 13.5
– 3.5
– 1.0
– 12.0
– 2.5
– 0.5
V
V
V
80
78
68
94
86
77
dB
dB
dB
90
106
dB
LT1351
ELECTRICAL CHARACTERISTICS
TA = 25°C, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VSUPPLY
MIN
TYP
AVOL
Large-Signal Voltage Gain
VOUT
IOUT
VOUT = ±12V, RL = 5k
VOUT = ±10V, RL = 2k
VOUT = ±10V, RL = 1k
VOUT = ±2.5V, RL = 5k
VOUT = ±2 .5V, RL = 2k
VOUT = ±2.5V, RL = 1k
VOUT = ±1V, RL = 5k
±15V
±15V
±15V
±5V
±5V
±5V
±2.5V
40
30
20
30
25
15
20
80
60
40
60
50
30
40
Output Swing
RL = 5k, VIN = ±10mV
RL = 2k, VIN = ±10mV
RL = 1k, VIN = ±10mV
RL = 1k, VIN = ±10mV
RL= 500Ω, VIN = ±10mV
RL = 5k, VIN = ±10mV
±15V
±15V
±15V
±5V
±5V
±2.5V
13.5
13.4
13.0
3.5
3.4
1.3
14.0
13.8
13.4
4.0
3.8
1.7
±V
±V
±V
±V
±V
±V
Output Current
VOUT = ±13V
VOUT = ±3.4V
±15V
±5V
13.0
6.8
13.4
7.6
mA
mA
ISC
Short-Circuit Current
VOUT = 0V, VIN = ±3V
±15V
30
45
mA
SR
Slew Rate
AV = – 1, RL = 5k (Note 3)
±15V
±5V
120
30
200
50
V/µs
V/µs
Full-Power Bandwidth
10V Peak (Note 4)
3V Peak (Note 4)
±15V
±5V
3.2
2.6
MHz
MHz
GBW
Gain Bandwidth
f = 200kHz, RL = 10k
±15V
± 5V
± 2.5V
3.0
2.7
2.5
MHz
MHz
MHz
t r , tf
Rise Time, Fall Time
AV = 1, 10% to 90%, 0.1V
±15V
±5V
46
53
ns
ns
Overshoot
AV = 1, 0.1V
±15V
±5V
13
16
%
%
Propagation Delay
50% VIN to 50% VOUT, 0.1V
±15V
±5V
41
52
ns
ns
ts
Settling Time
10V Step, 0.1%, AV = – 1
10V Step, 0.01%, AV = – 1
5V Step, 0.1%, AV = – 1
5V Step, 0.01%, AV = – 1
±15V
±15V
±5V
±5V
700
1250
950
1400
ns
ns
ns
ns
RO
Output Resistance
AV = 1, f = 20kHz
±15V
1.5
Ω
ISHDN
Shutdown Input Current
SHDN = VEE + 0.1V
SHDN = VCC
±15V
±15V
– 10
0.1
250
220
10
330
300
SHDN = VEE + 0.1V
±15V
±5V
±5V
µA
µA
µA
TYP
MAX
UNITS
IS
Supply Current
2.0
1.8
MAX
UNITS
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
2
µA
µA
0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
VOS
Input Offset Voltage
Input VOS Drift
CONDITIONS
VSUPPLY
MIN
±15V
±5V
±2.5V
(Note 5)
±2.5V to ±15V
0.8
0.8
1.0
3
mV
mV
mV
8
µV/°C
IOS
Input Offset Current
±2.5V to ±15V
20
nA
IB
Input Bias Current
±2.5V to ±15V
75
nA
3
LT1351
ELECTRICAL CHARACTERISTICS
0°C ≤ TA ≤ 70°C, VCM = 0V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
VSUPPLY
MIN
CMRR
Common Mode Rejection Ratio
VCM = ±12V
VCM = ±2.5V
VCM = ±0.5V
±15V
±5V
±2.5V
78
77
67
dB
dB
dB
PSRR
Power Supply Rejection Ratio
VS = ±2.5V to ±15V
89
dB
AVOL
Large-Signal Voltage Gain
VOUT = ±12V, RL = 5k
VOUT = ±10V, RL = 2k
VOUT = ±2.5V, RL = 5k
VOUT = ±2 .5V, RL = 2k
VOUT = ±2.5V, RL = 1k
VOUT = ±1V, RL = 5k
±15V
±15V
±5V
±5V
±5V
±2.5V
25
20
20
15
10
15
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
VOUT
Output Swing
RL = 5k, VIN = ±10mV
RL = 2k, VIN = ±10mV
RL = 1k, VIN = ±10mV
RL = 1k, VIN = ±10mV
RL= 500Ω, VIN = ±10mV
RL = 5k, VIN = ±10mV
±15V
±15V
±15V
±5V
±5V
±2.5V
13.4
13.3
12.0
3.4
3.3
1.2
±V
±V
±V
±V
±V
±V
IOUT
Output Current
VOUT = ±12V
VOUT = ±3.3V
±15V
±5V
12.0
6.6
mA
mA
ISC
Short-Circuit Current
VOUT = 0V, VIN = ±3V
±15V
24
mA
SR
Slew Rate
AV = – 1, RL = 5k (Note 3)
±15V
±5V
100
21
V/µs
V/µs
GBW
Gain Bandwidth
f = 200kHz, RL = 10k
±15V
± 5V
1.8
1.6
MHz
MHz
ISHDN
Shutdown Input Current
SHDN = VEE + 0.1V
SHDN = VCC
±15V
±15V
SHDN = VEE + 0.1V
±15V
±5V
±5V
IS
Supply Current
TYP
MAX
– 20
3
UNITS
µA
µA
380
355
µA
µA
µA
MAX
UNITS
1.0
1.0
1.2
mV
mV
mV
20
– 40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted (Note 6).
SYMBOL
PARAMETER
VOS
Input Offset Voltage
CONDITIONS
VSUPPLY
MIN
TYP
±15V
±5V
±2.5V
8
µV/°C
IOS
Input Offset Current
±2.5V to ±15V
30
nA
IB
Input Bias Current
±2.5V to ±15V
100
nA
CMRR
Common Mode Rejection Ratio
VCM = ±12V
VCM = ±2.5V
VCM = ±0.5V
PSRR
Power Supply Rejection Ratio
VS = ±2.5V to ±15V
AVOL
Large-Signal Voltage Gain
VOUT = ±12V, RL = 5k
VOUT = ±10V, RL = 2k
VOUT = ±2.5V, RL = 5k
VOUT = ±2 .5V, RL = 2k
VOUT = ±2.5V, RL = 1k
VOUT = ±1V, RL = 5k
Input VOS Drift
4
(Note 5)
±2.5V to ±15V
±15V
±5V
±2.5V
±15V
±15V
±5V
±5V
±5V
±2.5V
3
76
76
66
dB
dB
dB
87
dB
20
15
15
10
8
10
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
LT1351
ELECTRICAL CHARACTERISTICS
– 40°C ≤ TA ≤ 85°C, VCM = 0V unless otherwise noted (Note 6).
SYMBOL
PARAMETER
CONDITIONS
VSUPPLY
MIN
VOUT
Output Swing
RL = 5k, VIN = ±10mV
RL = 2k, VIN = ±10mV
RL = 1k, VIN = ±10mV
RL = 1k, VIN = ±10mV
RL= 500Ω, VIN = ±10mV
RL = 5k, VIN = ±10mV
±15V
±15V
±15V
±5V
±5V
±2.5V
13.3
13.2
10.0
3.3
3.2
1.1
±V
±V
±V
±V
±V
±V
IOUT
Output Current
VOUT = ±10V
VOUT = ±3.2V
±15V
±5V
10.0
6.4
mA
mA
ISC
Short-Circuit Current
VOUT = 0V, VIN = ±3V
±15V
20
mA
SR
Slew Rate
AV = – 1, RL = 5k (Note 3)
±15V
±5V
50
15
V/µs
V/µs
GBW
Gain Bandwidth
f = 200kHz, RL = 10k
±15V
± 5V
1.6
1.4
MHz
MHz
ISHDN
Shutdown Input Current
SHDN = VEE + 0.1V
SHDN = VCC
±15V
±15V
SHDN = VEE + 0.1V
±15V
±5V
±5V
IS
Supply Current
Note 1: Differential inputs of ±10V are appropriate for transient operation
only, such as during slewing. Large, sustained differential inputs will cause
excessive power dissipation and may damage the part. See Input
Considerations in the Applications Information section of this data sheet
for more details.
Note 2: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indefinitely.
Note 3: Slew rate is measured between ±8V on the output with ±12V
input for ±15V supplies and ±2V on the output with ±3V input for ±5V
supplies.
TYP
MAX
UNITS
µA
µA
– 30
5
µA
µA
µA
390
380
30
Note 4: Full-power bandwidth is calculated from the slew rate
measurement: FPBW = (Slew Rate)/2πVP.
Note 5: This parameter is not 100% tested.
Note 6: The LT1351 is designed, characterized and expected to meet these
extended temperature limits, but is not tested at – 40°C and at 85°C.
Guaranteed I grade parts are available; consult factory.
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage
and Temperature
Input Common Mode Range
vs Supply Voltage
V+
350
30
TA = 25°C
∆VOS = 1mV
–0.5
125°C
250
25°C
200
– 55°C
150
TA = 25°C
VS = ±15V
–1.0
INPUT BIAS CURRENT (nA)
COMMON MODE RANGE (V)
300
SUPPLY CURRENT (µA)
Input Bias Current
vs Input Common Mode Voltage
–1.5
–2.0
2.0
1.5
1.0
20
IB =
IB+ + IB–
2
10
0
–10
0.5
100
V–
0
10
5
15
SUPPLY VOLTAGE (± V)
20
1351 G01
0
15
10
5
SUPPLY VOLTAGE (± V)
20
1351 G02
–20
–15
10
–5
0
5
–10
INPUT COMMON MODE VOLTAGE (V)
15
1351 G03
5
LT1351
U W
TYPICAL PERFORMANCE CHARACTERISTICS
100
VS = ±15V
IB+ + IB–
IB =
2
INPUT VOLTAGE NOISE (nV/√Hz)
32
Open-Loop Gain vs Resistive Load
28
24
20
16
12
8
110
10
TA = 25°C
TA = 25°C
VS = ±15V
AV = 101
RS = 100k
INPUT CURRENT NOISE (pA/√Hz)
INPUT BIAS CURRENT (nA)
36
Input Noise Spectral Density
en
1
10
in
VS = ±15V
100
OPEN-LOOP GAIN (dB)
Input Bias Current vs Temperature
40
VS = ±5V
90
80
70
4
50
25
0
75
TEMPERATURE (°C)
100
125
1
10
1k
100
FREQUENCY (Hz)
1351 G04
Output Voltage Swing
vs Load Current
V+
97
96
95
RL = 1k
–2
–3
TA = 25°C
VIN = ±10mV
3
RL = 1k
2
1
94
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
RL = 2k
0
5
10
10
8
2
0
–2
–4
10mV
–8
125
1351 G10
6
1mV
VS = ±15V
AV = 1
OUTPUT
FILTER:
1.6MHz
LPF
–10
100
– 40°C
– 40°C
25°C
85°C
15
0.7 0.8 0.9
20
6
1mV
4
–6
30
25°C
85°C
1.0
8
1 1.1 1.2 1.3 1.4 1.5 1.6
SETTLING TIME (µs)
1351 G11
OUTPUT STEP (V)
SOURCE
50
25
75
0
TEMPERATURE (°C)
1.5
10
10mV
35
25
–50 –25
2.0
– 40°C 85°C
Settling Time vs Output Step
(Inverting)
6
40
–2.0
25°C
1351 G09
55
OUTPUT STEP (V)
OUTPUT SHORT-CIRCUIT CURRENT (mA)
VS = ±15V
45
– 40°C
–1.5
Settling Time vs Output Step
(Noninverting)
SINK
85°C
1351 G08
Output Short-Circuit Current
vs Temperature
50
25°C
–1.0
V–
–20 –15 –10 – 5 0
10
5
OUTPUT CURRENT (mA)
20
15
SUPPLY VOLTAGE (V)
VS = ±5V
VIN = 10mV
0.5
V–
125
1351 G07
60
– 0.5
RL = 2k
–1
98
10k
1351 G06
V+
OUTPUT VOLTAGE SWING (V)
OPEN-LOOP GAIN (dB)
99
1k
LOAD RESISTANCE (Ω)
Output Voltage Swing
vs Supply Voltage
VS = ±15V
VO = ±12V
RL = 5k
100
10
1351 G05
Open-Loop Gain vs Temperature
100
60
0.1
10k
1
OUTPUT VOLTAGE SWING (V)
0
–50 –25
4
2
10mV
1mV
0
–2
–4
–6
–8
10mV
VS = ±15V
AV = –1
RG = RF = 2k
CF = 5pF
RL = 2k
1mV
–10
0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5
SETTLING TIME (µs)
1351 G12
LT1351
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Gain and Phase vs Frequency
120
VS = ±5V
100
60
VS = ±5V
40
30
GAIN
20
20
10
0
0
–20
–10
–40
100M
1k
10k
100k
1M
FREQUENCY (Hz)
10M
8
100
80
VS = ±15V
PHASE (DEG)
40
TA = 25°C
VS = ±15V
6
AV = 100
AV = 10
10
1
0.1
10k
1k
100k
1M
FREQUENCY (Hz)
4.00
VS = ±5V
46
3
3.75
PHASE MARGIN
44
10M
42
3.25
40
38
2.00
–50 –25
5
TA = 25°C
AV = 1
RL = 5k
3
2
1
0
–1
VS = ±5V
34
–3
32
–4
±15V
±5V
±2.5V
–2
3.75
44
3.50
42
3.25
40
3.00
38
36
2.75
GAIN BANDWIDTH
2.50
34
32
2.25
30
2.00
0
15
10
5
SUPPLY VOLTAGE (± V)
20
1351 G19
POWER SUPPLY REJECTION RATIO (dB)
46
PHASE MARGIN
PHASE MARGIN (DEG)
GAIN BANDWIDTH (MHz)
120
48
4.00
–2
±15V
±5V
±2.5V
–5
10k
10M
100k
1M
FREQUENCY (Hz)
10M
1351 G18
Common Mode Rejection Ratio
vs Frequency
Power Supply Rejection Ratio
vs Frequency
50
TA = 25°C
–1
1351 G17
Gain Bandwidth and Phase Margin
vs Supply Voltage
4.25
0
–3
100k
1M
FREQUENCY (Hz)
1351 G16
4.50
TA = 25°C
AV = –1
RL = RG = 5k
–4
–5
10k
30
125
4
1
36
100
10M
Frequency Response
vs Supply Voltage (AV = – 1)
2
VS = ±15V
50
25
0
75
TEMPERATURE (°C)
100k
1M
FREQUENCY (Hz)
1351 G15
GAIN (dB)
GAIN BANDWIDTH (MHz)
3.50
GAIN (dB)
4
PHASE MARGIN (DEG)
5
48
2.25
–10
10k
Frequency Response
vs Supply Voltage (AV = 1)
50
2.50
C = 10pF
–2
1351 G14
VS = ±15V
2.75
0
–8
0.01
4.25
3.00
C = 1000pF
2
–4
Gain Bandwidth and Phase Margin
vs Temperature
GAIN BANDWIDTH
C = 5000pF
C = 500pF
C = 100pF
–6
1351 G13
4.50
TA = 25°C
VS = ±15V
AV = –1
RFB = RG = 5k
4
AV = 1
GAIN (dB)
VS = ±15V
10
1000
TA = 25°C
VS = ±15V
100
80
– PSRR = +PSRR
60
40
20
0
10
100
1k
10k 100k
FREQUENCY (Hz)
1M
10M
1351 G20
120
COMMON MODE REJECTION RATIO (dB)
PHASE
50
GAIN (dB)
TA = 25°C
AV = –1
RF = RG = 5k
OUTPUT IMPEDANCE (Ω)
70
60
Frequency Response
vs Capacitive Load
Output Impedance vs Frequency
100
TA = 25°C
VS = ±15V
80
60
40
20
0
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
1351 G21
7
LT1351
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Slew Rate vs Supply Voltage
TA = 25°C
AV = –1
RF = RG = 5k
SR = (SR+ + SR – )/2
Slew Rate vs Input Level
150
VS = ±15V
150
100
VS = ±5V
50
50
TA = 25°C
VS = ±15V
AV = –1
RFB = RG = 5k
SR = (SR+ + SR – )/2
175
SLEW RATE (V/µs)
100
200
AV = –1
RF = RG = RL = 5k
SR = (SR+ + SR – )/2
200
SLEW RATE (V/µs)
150
SLEW RATE (V/µs)
Slew Rate vs Temperature
250
200
125
100
75
50
25
0
0
0
–50 –25
15
5
10
SUPPLY VOLTAGE (±V)
50
0
75
25
TEMPERATURE (°C)
1351 G22
AV = 1
20
15
10
5
AV = 1
10
100
1k
10k
FREQUENCY (Hz)
0
10k
100k
100k
FREQUENCY (Hz)
90
4
3
3RD HARMONIC
– 60
–70
2ND HARMONIC
70
60
50
Capacitive Load Handling
90
80
VSHDN = VEE + 0.2
VSHDN = VEE + 0.1
40
30
FREQUENCY (Hz)
1351 G28
0
–50 –25
1M
100
TA = 25°C
VS = ±15V
RL = 5k
70
AV = 1
60
50
40
AV = –1
30
20
VSHDN = VEE
10
10
1M
100k
FREQUENCY (Hz)
1351 G27
VS = ±15V
20
– 80
VS = ± 5V
RL = 5k
THD = 1%
0
10k
1M
80
SUPPLY CURRENT (µA)
HARMONIC DISTORTION (dB)
100
– 50
AV = –1
5
Shutdown Supply Current
vs Temperature
VS = ±15V
AV = 1
RL = 5k
VO = 2VP-P
AV = 1
6
1351 G26
2nd and 3rd Harmonic Distortion
vs Frequency
8
7
1
1351 G25
– 90
100k
8
2
VS = ±15V
RL = 5k
THD = 1%
OVERSHOOT (%)
0.001
OUTPUT VOLTAGE (VP-P)
OUTPUT VOLTAGE (VP-P)
TOTAL HARMONIC DISTORTION (%)
AV = –1
24
9
25
0.01
20
10
AV = –1
0.1
8
16
12
INPUT LEVEL (VP-P)
Undistorted Output Swing
vs Frequency (±5V)
30
TA = 25°C
VS = ±15V
RL = 5k
VO = 2VP-P
4
0
1351 G24
Undistorted Output Swing
vs Frequency (±15V)
1
– 40
0
125
1351 G23
Total Harmonic Distortion
vs Frequency
– 30
100
50
25
0
75
TEMPERATURE (°C)
100
125
1351 G29
0
10p
100p
1n
10n
0.1µ
CAPACITIVE LOAD (F)
1µ
1351 G30
LT1351
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TYPICAL PERFORMANCE CHARACTERISTICS
Small-Signal Transient
(AV = 1)
Small-Signal Transient
(AV = – 1)
1351 G31
Small-Signal Transient
(AV = – 1, CL = 1000pF)
1351 G32
Large-Signal Transient
(AV = 1)
Large-Signal Transient
(AV = – 1)
1351 G34
1351 G33
Large-Signal Transient
(AV = 1, CL = 10,000pF)
1351 G35
1351 G36
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APPLICATIONS INFORMATION
The LT1351 may be inserted directly into many high
speed amplifier applications improving both DC and AC
performance, provided that the nulling circuitry is removed. The suggested nulling circuit for the LT1351 is
shown in Figure 1.
V+
3
0.1µF
+
7
LT1351
2
6
4
–
8
1
0.1µF
100k
V–
1351 F01
Figure 1. Offset Nulling
Layout and Passive Components
The LT1351 amplifier is easy to apply and tolerant of less
than ideal layouts. For maximum performance (for example fast settling time) use a ground plane, short lead
lengths and RF-quality bypass capacitors (0.01µF to 0.1µF).
For high drive current applications use low ESR bypass
capacitors (1µF to 10µF tantalum). For details see Design
Note 50.
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input can combine with
the input capacitance to form a pole which can cause
peaking or even oscillations. For feedback resistors greater
than 10k, a parallel capacitor of value, CF > (RG)(CIN/RF)
should be used to cancel the input pole and optimize
dynamic performance. For applications where the DC
9
LT1351
U
W
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APPLICATIONS INFORMATION
noise gain is one and a large feedback resistor is used, CF
should be greater than or equal to CIN. An example would
be an I-to-V converter as shown in the Typical Applications
section.
Capacitive Loading
The LT1351 is stable with any capacitive load. As the
capacitive load increases, both the bandwidth and phase
margin decrease so there will be peaking in the frequency
domain and in the transient response. Graphs of Frequency Response vs Capacitive Load, Capacitive Load
Handling and the transient response photos clearly show
these effects.
Shutdown
The LT1351 has a Shutdown pin for conserving power.
When this pin is open or 2V above the negative supply the
part operates normally. When pulled down to V – the
supply current will drop to about 10µA. The current out of
the Shutdown pin is also typically 10µA. In shutdown the
amplifier output is not isolated from the inputs so the
LT1351 cannot be used in multiplexing applications using
the shutdown feature.
A level shift application is shown in the Typical Applications section so that a ground-referenced logic signal can
control the Shutdown pin.
Input Considerations
Circuit Operation
Each of the LT1351 inputs is the base of an NPN and
a PNP transistor whose base currents are of opposite
polarity and provide first-order bias current cancellation.
Because of variation in the matching of NPN and PNP
beta, the polarity of the input bias current can be positive
or negative. The offset current does not depend on
NPN/PNP beta matching and is well controlled. The use of
balanced source resistance at each input is recommended
for applications where DC accuracy must be maximized.
The LT1351 circuit topology is a true voltage feedback
amplifier that has the slewing behavior of a current
feedback amplifier. The operation of the circuit can be
understood by referring to the simplified schematic.
The inputs can withstand transient differential input voltages up to 10V without damage and need no clamping or
source resistance for protection. Differential inputs, however, generate large supply currents (tens of mA) as
required for high slew rates. If the device is used with
sustained differential inputs, the average supply current
will increase, excessive power dissipation will result and
the part may be damaged. The part should not be used as
a comparator, peak detector or other open-loop application with large, sustained differential inputs. Under
normal, closed-loop operation, an increase of power
dissipation is only noticeable in applications with large
slewing outputs and is proportional to the magnitude of
the differential input voltage and the percent of the time
that the inputs are apart. Measure the average supply
current for the application in order to calculate the power
dissipation.
10
The inputs are buffered by complementary NPN and PNP
emitter followers which drive R1, a 1k resistor. The input
voltage appears across the resistor generating currents
which are mirrored into the high impedance node and
compensation capacitor CT. Complementary followers
form an output stage which buffers the gain node from
the load. The output devices Q19 and Q22 are connected
to form a composite PNP and composite NPN.
The bandwidth is set by the input resistor and the
capacitance on the high impedance node. The slew rate
is determined by the current available to charge the
capacitance. This current is the differential input voltage
divided by R1, so the slew rate is proportional to the
input. Highest slew rates are therefore seen in the lowest
gain configurations. For example, a 10V output step in a
gain of 10 has only a 1V input step whereas the same
output step in unity gain has a 10 times greater input step.
The curve of Slew Rate vs Input Level illustrates this
relationship.
Capacitive load compensation is provided by the RC, CC
network which is bootstrapped across the output stage.
When the amplifier is driving a light load the network has
no effect. When driving a capacitive load (or a low value
LT1351
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APPLICATIONS INFORMATION
resistive load) the network is incompletely bootstrapped
and adds to the compensation at the high impedance
node. The added capacitance slows down the amplifier
and a zero is created by the RC combination, both of
which improve the phase margin. The design ensures
that even for very large load capacitances the total phase
lag can never exceed 180 degrees (zero phase margin)
and the amplifier remains stable.
W
W
SI PLIFIED SCHE ATIC
V+
R2
Q11
Q10
Q12
C1
R3
Q21
Q20
R6
Q9
–IN
Q7 R1 Q3
1k
Q5
Q17
Q1
Q2
Q6
Q8
Q19
RC
CC
+IN
OUTPUT
Q18
Q4
R7
Q22
Q13
C2
CT
Q15
Q14
Q16
Q23
Q24
R4
V–
R5
1351 SS
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TYPICAL APPLICATIONS
20kHz, 4th Order Butterworth Filter
4.64k
5.49k
470pF
220pF
4.64k
13.3k
VIN
2200pF
–
5.49k
11.3k
LT1351
+
4700pF
–
LT1351
VOUT
+
1351 TA03
11
LT1351
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TYPICAL APPLICATIONS
Shutdown Circuit
3
+
6
LT1351
2
1N4148
1M
SHDN
G
S
SST177
D
–
G
1M
5
S
SST177
D
V–
1351 TA04
DAC I-to-V Converter
10pF
DAC
INPUTS
12
5k
–
LT1351
565A TYPE
V
VOS + IOS (5kΩ) + OUT < 0.5LSB
AVOL
12
VOUT
+
5k
1351 TA05
LT1351
U
PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 ± 0.004*
(3.00 ± 0.102)
8
7 6
5
0.118 ± 0.004**
(3.00 ± 0.102)
0.192 ± 0.004
(4.88 ± 0.10)
1
2 3
0.040 ± 0.006
(1.02 ± 0.15)
0.007
(0.18)
4
0.034 ± 0.004
(0.86 ± 0.102)
0° – 6° TYP
0.021 ± 0.006
(0.53 ± 0.015)
SEATING
PLANE 0.012
(0.30)
0.0256
REF
(0.65)
TYP
0.006 ± 0.004
(0.15 ± 0.102)
MSOP (MS8) 1197
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
13
LT1351
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PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.400*
(10.160)
MAX
8
7
6
5
1
2
3
4
0.255 ± 0.015*
(6.477 ± 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
(
+0.035
0.325 –0.015
8.255
+0.889
–0.381
)
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
0.100 ± 0.010
(2.540 ± 0.254)
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
14
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175) 0.020
MIN (0.508)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
N8 1197
LT1351
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PACKAGE DESCRIPTION
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 – 0.197*
(4.801 – 5.004)
8
7
6
5
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
1
0.010 – 0.020
× 45°
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
2
3
4
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
0.014 – 0.019
(0.355 – 0.483)
0.050
(1.270)
TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
SO8 0996
15
LT1351
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TYPICAL APPLICATION
Low Power Sample-and-Hold
–
–
LTC201
LT1351
VIN
+
LT1351
+
VOUT
2000pF
DROOP: 20nA/2000pF = 10mV/ms
ACQUISITION TIME: 10V, 0.1% = 2µs
CHARGE INJECTION ERROR: 8pC/2000pF = 4mV
1351 TA06
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1352/LT1353
Dual/Quad 250µA, 3MHz, 200V/µs Op Amp
Good DC Precision, Stable with All Capacitive Loads
LT1354
1mA, 12MHz, 400V/µs Op Amp
Good DC Precision, Stable with All Capacitive Loads
16
Linear Technology Corporation
1351fa LT/TP 0498 REV A 2K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 1996