LTC2914 Quad UV/OV Positive/Negative Voltage Monitor DESCRIPTIO U FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Monitors Four Voltages Simultaneously Adjustable UV and OV Trip Values Guaranteed Threshold Accuracy: ±1.5% of Monitored Voltage over Temperature Input Glitch Rejection Monitors up to Two Negative Voltages Buffered 1V Reference Output Adjustable Reset Timeout with Timeout Disable 70µA Quiescent Current Open-Drain OV and UV Outputs Guaranteed OV and UV for VCC ≥ 1V Available in 16-Lead SSOP and 16-Lead (5mm × 3mm) DFN Packages U APPLICATIO S ■ ■ Polarity selection and a buffered reference allow monitoring up to two separate negative voltages. A three-state input pin allows setting the polarity of two inputs without requiring any external components. Glitch filtering ensures reliable reset operation without false or noisy triggering. The LTC2914 provides a precise, versatile, space-conscious, micropower solution for voltage monitoring. Desktop and Notebook Computers Network Servers Core, I/O Voltage Monitors , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. U ■ The LTC®2914 is a quad input voltage monitor intended for monitoring multiple voltages in a variety of applications. Dual inputs for each monitored voltage allow monitoring four separate undervoltage (UV) conditions and four separate overvoltage (OV) conditions. All monitors share a common undervoltage output and a common overvoltage output. The LTC2914-1 has latching capability for the overvoltage output. The LTC2914-2 has functionality to disable both the overvoltage and undervoltage outputs. TYPICAL APPLICATIO Quad UV/OV Supply Monitor,10% Tolerance, 5V, 3.3V, 2.5V, 1.8V Input Threshold Voltage vs Temperature 0.1µF 44.2k 1k 4.53k 0.505 VCC VH1 SEL VL1 VH2 OV 0.504 27.4k LTC2914-1 1k VL2 4.53k SYSTEM 19.6k VH3 1k UV REF LATCH 12.4k 4.53k 0.502 0.501 0.500 0.499 0.498 0.497 0.495 –50 1k VL4 GND 0.503 0.496 VL3 VH4 4.53k THRESHOLD VOLTAGE, VOUT (V) P0WER SUPPLIES 5V 3.3V 2.5V 1.8V TMR –25 25 50 0 TEMPERATURE (°C) 75 100 2914 G01 CTMR 22nF 2914 TA01a TIMEOUT = 200ms 2914f 1 LTC2914 W W U W ABSOLUTE AXI U RATI GS (Notes 1, 2) Terminal Voltages VCC (Note 3)............................................. –0.3V to 6V OV, UV ................................................... –0.3V to 16V TMR ..........................................–0.3V to (VCC + 0.3V) VLn, VHn, LATCH, DIS, SEL .................. –0.3V to 7.5V Terminal Currents IVCC ....................................................................10mA Reference Load Current (IREF) ...........................±1mA IUV, IOV ...............................................................10mA Operating Temperature Range LTC2914C ................................................ 0°C to 70°C LTC2914I ............................................. –40°C to 85°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10 sec) SSOP ................................................................ 300°C U W U PACKAGE/ORDER I FOR ATIO TOP VIEW TOP VIEW VH1 1 16 VCC VL1 2 15 TMR VH2 3 VL2 4 14 SEL 17 13 LATCH VH3 5 12 UV VL3 6 11 OV VH4 VL4 10 REF 7 9 8 GND VH1 1 16 VCC VL1 2 15 TMR VH2 3 14 SEL VL2 4 13 LATCH VH3 5 12 UV VL3 6 11 OV VH4 7 10 REF VL4 8 9 DHC PACKAGE 16-LEAD (5mm ´ 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 43.5°C/W EXPOSED PAD (PIN 17) PCB GND CONNECTION OPTIONAL GND GN PACKAGE 16-LEAD PLASTIC SSOP TJMAX = 150°C, θJA = 110°C/W TOP VIEW TOP VIEW VH1 1 16 VCC VL1 2 15 TMR VH2 3 VL2 4 VH3 VL3 VH4 VL4 5 6 7 8 14 SEL 17 13 DIS 12 UV 11 OV 10 REF 9 GND DHC PACKAGE 16-LEAD (5mm ´ 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 43.5°C/W EXPOSED PAD (PIN 17) PCB GND CONNECTION OPTIONAL VH1 1 16 VCC VL1 2 15 TMR VH2 3 14 SEL VL2 4 13 DIS VH3 5 12 UV VL3 6 11 OV VH4 7 10 REF VL4 8 9 GND GN PACKAGE 16-LEAD PLASTIC SSOP ORDER PART NUMBER DHC PART MARKING* LTC2914CDHC-1 LTC2914IDHC-1 29141 29141 ORDER PART NUMBER GN PART MARKING LTC2914CGN-1 LTC2914IGN-1 29141 2914I1 ORDER PART NUMBER DHC PART MARKING* LTC2914CDHC-2 LTC2914IDHC-2 29142 29142 ORDER PART NUMBER GN PART MARKING LTC2914CGN-2 LTC2914IGN-2 29142 2914I2 TJMAX = 150°C, θJA = 110°C/W Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for parts specified with wider operating temperature ranges. 2914f 2 LTC2914 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, VLn = 0.45V, VHn = 0.55V, LATCH = VCC, SEL = VCC, DIS = Open unless otherwise noted. (Note 2) SYMBOL PARAMETER CONDITIONS VSHUNT VCC Shunt Regulator Voltage ICC = 5mA ● ICC = 2mA to 10mA ● MIN TYP MAX 6.2 6.6 6.9 UNITS V 300 mV ΔVSHUNT VCC Shunt Regulator Load Regulation VCC Supply Voltage (Note 3) VCCR(MIN) Minimum VCC Output Valid DIS = 0V ● VCC(UVLO) Supply Undervoltage Lockout VCC Rising, DIS = 0V ● 1.9 2 2.1 V ΔVCC(UVHYST) Supply Undervoltage Lockout Hysteresis DIS = 0V ● 5 25 50 mV ICC Supply Current VCC = 2.3V to 6V ● 70 100 µA IVREF = ±1mA ● 0.985 1 1.015 ● 492 500 508 mV ● 50 125 500 µs ±15 nA 12.5 ms VREF Reference Output Voltage VUOT Undervoltage/Overvoltage Voltage Threshold tUOD Undervoltage/Overvoltage Voltage Threshold to Output Delay IVHL VHn, VLn Input Current ● VHn = VUOT – 5mV or VLn = VUOT + 5mV 200 2.3 ● tUOTO UV/OV Time-Out Period ● 6 VLATCH(IH) OV Latch Clear Input High ● 1.2 VLATCH(IL) OV Latch Clear Threshold Input Low ● CTMR = 1nF 8.5 V 1 V V V ● 0.8 V ±1 µA ILATCH LATCH Input Current VDIS(IH) DIS Input High VDIS(IL) DIS Input Low 0.8 V IDIS DIS Input Current VDIS > 0.5V ● 1 2 3 µA ITMR(UP) TMR Pull-Up Current VTMR = 0V ● –1.3 –2.1 –2.8 µA ITMR(DOWN) TMR Pull-Down Current VTMR = 1.6V ● 1.3 2.1 2.8 VTMR(DIS) Timer Disable Voltage Referenced to VCC ● –180 –270 VOH Output Voltage High UV/OV VCC = 2.3V, IUV/OV = –1µA ● 1 VCC = 2.3V, IUV/OV = 2.5mA VCC = 1V, IUV = 100µA ● ● VOL Output Voltage Low UV/OV VLATCH > 0.5V VSHUNT ● 1.2 V ● µA mV V 0.1 0.01 0.3 0.15 V V Three-State Input SEL VIL Low Level Input Voltage ● VIH High Level Input Voltage ● 1.4 ● 0.7 VZ Pin Voltage when Left in Hi-Z State ISEL SEL High, Low Input Current ISEL(MAX) Maximum SEL Input Current ISEL = ±10µA SEL Tied to Either VCC or GND Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into pins are positive; all voltages are referenced to GND unless otherwise noted. 0.4 V V 1.1 V ● 0.9 ±25 µA ● ±30 µA Note 3: VCC maximum pin voltage is limited by input current. Since the VCC pin has an internal 6.5V shunt regulator, a low impedance supply that exceeds 6V may exceed the rated terminal current. Operation from higher voltage supplies requires a series dropping resistor. See Applications Information. 2914f 3 LTC2914 WU W TI I G DIAGRA S VHn Monitor Timing VHn VLn Monitor Timing VUOT tUOD UV VUOT VLn tUOTO tUOD 1V OV tUOTO 1V 2914 TD01 2914 TD02 VHn Monitor Timing (TMR Pin Strapped to VCC) VHn VLn Monitor Timing (TMR Pin Strapped to VCC) VUOT tUOD UV VUOT VLn tUOD tUOD 1V OV tUOD 1V 2914 TD03 2914 TD04 NOTE: WHEN AN INPUT IS CONFIGURED AS A NEGATIVE SUPPLY MONITOR, VHn WILL TRIGGER AN OV CONDITION AND VLn WILL TRIGGER A UV CONDITION U W TYPICAL PERFOR A CE CHARACTERISTICS Specifications are at TA = 25°C, VCC = 3.3V unless otherwise noted. 105 0.504 100 0.503 95 90 0.502 85 0.501 0.500 0.499 65 0.497 60 0.496 55 75 100 2914 G01 6.7 10mA VCC = 3.3V 6.6 5mA 6.5 2mA 75 70 25 50 0 TEMPERATURE (°C) VCC = 6V 80 0.498 –25 6.8 VCC (V) 0.505 0.495 –50 VCC Shunt Voltage vs Temperature Supply Current vs Temperature ICC (µA) THRESHOLD VOLTAGE, VOUT (V) Input Threshold Voltage vs Temperature 50 –50 1mA VCC = 2.3V 6.4 200µA 6.3 –25 0 25 50 TEMPERATURE (°C) 75 100 2914 G02 6.2 –50 –25 0 25 50 TEMPERATURE (°C) 75 100 2914 G03 2914f 4 LTC2914 U W TYPICAL PERFOR A CE CHARACTERISTICS Specifications are at TA = 25°C, VCC = 3.3V unless otherwise noted. Buffered Reference Voltage vs Temperature VCC Shunt Voltage vs ICC 6.75 Transient Duration vs Comparator Overdrive 1.005 700 VCC (V) 6.55 25°C 6.45 –40°C 85°C 6.35 TYPICAL TRANSIENT DURATION (µs) REFERENCE VOLTAGE, VREF (V) 1.004 6.65 1.003 1.002 1.001 1.000 0.999 0.998 0.997 0.996 6.25 –2 0 2 6 4 ICC (mA) 8 10 12 0.995 –50 –25 25 50 0 TEMPERATURE (°C) 2914 G04 200 VCC = 6V 100 VCC = 2.3V UV Output Voltage vs VCC UV Output Voltage vs VCC 5 VHn = 0.55V SEL = VCC VCC 11 4 10 9 8 UV VOLTAGE (V) 0.6 UV VOLTAGE (V) UV/OV TIMEOUT PERIOD, tUOTO (ms) 300 2914 G06 0.8 CTMR = 1nF 0.4 UV WITH 10k PULL-UP 3 2 0.2 1 UV WITHOUT 10k PULL-UP 7 6 –50 0 25 50 TEMPERATURE (°C) –25 75 0 100 0.2 0.6 0.8 0.4 SUPPLY VOLTAGE, VCC (V) 0 2914 G07 1.0 VHn = 0.45V SEL = VCC 4 125°C UV/OV, VOL (V) UV AT 150mV 25°C –40°C 0.6 0.4 UV AT 50mV 1 0 0.2 0 1 3 4 2 SUPPLY VOLTAGE, VCC (V) 5 2914 G10 3 4 2 SUPPLY VOLTAGE, VCC (V) 0 5 10000 0.8 2 1 Reset Timeout Period vs Capacitance UV/OV Voltage Output Low vs Output Sink Current 3 0 2914 G09 UV/OV TIMEOUT PERIOD, tUOTO (ms) 5 0 1.0 2914 G08 UV, ISINK vs VCC PULL-DOWN CURRENT, IUV (mA) RESET OCCURS ABOVE CURVE 400 2914 G05 Reset Timeout Period vs Temperature 12 500 0 0.1 1 10 100 COMPARATOR OVERDRIVE PAST THRESHOLD (%) 100 75 600 0 5 10 15 20 IUV/OV (mA) 25 30 2914 G11 1000 100 10 1 0.1 1 10 100 TMR PIN CAPACITANCE, CTMR (nF) 1000 2914 G12 2914f 5 LTC2914 U U U PI FU CTIO S DIS (Pin 13, LTC2914-2): Output Disable Input. Disables the OV and UV output pins. When DIS is pulled high, the OV and UV pins are not asserted except during a UVLO condition. Pin has a weak (2µA) internal pull-down to GND. Leave pin open if unused. Exposed Pad (Pin 17, DFN Package): Exposed Pad may be left open or connected to device ground. GND (Pin 9): Device Ground LATCH (Pin 13, LTC2914-1): OV Latch Clear/Bypass Input. When pulled low, 0V is latched when asserted. When pulled high, OV latch is cleared. While held high, OV has the same delay and output characteristics as UV. OV (Pin 11): Overvoltage Logic Output. Asserts low when any positive polarity input voltage is above threshold or any negative polarity input voltage is below threshold. Latched low (LTC2914-1). Held low for an adjustable delay time after all inputs are valid (LTC2914-2). Pin has a weak pull-up to VCC and may be pulled above VCC using an external pull-up. Leave pin open if unused. REF (Pin 10): Buffered Reference Output. 1V reference used for the offset of negative-monitoring applications. The buffered reference sources and sinks up to 1mA. The reference drives capacitive loads up to 1nF. Larger capacitive loads may cause instability. Leave pin open if unused. SEL (Pin 14): Input Polarity Select Three-State Input. Connect to VCC, GND or leave unconnected in open state to select one of three possible input polarity combinations (refer to Table 1). TMR (Pin 15): Reset Delay Timer. Attach an external capacitor (CTMR) of at least 10pF to GND to set a reset delay time of 9ms/nF. A 1nF capacitor will generate an 8.5ms reset delay time. Tie pin to VCC to bypass timer. UV (Pin 12): Undervoltage Logic Output. Asserts low when any positive polarity input voltage is below threshold or any negative polarity input voltage is above threshold. Held low for an adjustable delay time after all voltage inputs are valid. Pin has a weak pull-up to VCC and may be pulled above VCC using an external pull-up. Leave pin open if unused. VCC (Pin 16): Supply Voltage. Bypass this pin to GND with a 0.1µF (or greater) capacitor. Operates as a direct supply input for voltages up to 6V. Operates as a shunt regulator for supply voltages greater than 6V and must have a resistance between the pin and the supply to limit input current to no greater than 10mA. When used without a current-limiting resistance, pin voltage must not exceed 6V. VH1/VH2 (Pin 1/Pin 3): Voltage High Inputs 1 and 2. When the voltage on this pin is below 0.5V, an undervoltage condition is triggered. Tie pin to VCC if unused. VH3/VH4 (Pin 5/Pin 7): Voltage High Inputs 3 and 4. The polarity of the input is selected by the state of the SEL pin (refer to Table 1). When the monitored input is configured as a positive voltage, an undervoltage condition is triggered when the pin is below 0.5V. When the monitored input is configured as a negative voltage, an overvoltage condition is triggered when the pin is below 0.5V. Tie pin to VCC if unused. VL1/VL2 (Pin 2/Pin 4): Voltage Low Inputs 1 and 2. When the voltage on this pin is above 0.5V, an overvoltage condition is triggered. Tie pin to GND if unused. VL3/VL4 (Pin 6/Pin 8): Voltage Low Inputs 3 and 4. The polarity of the input is selected by the state of the SEL pin (refer to Table 1). When the monitored input is configured as a positive voltage, an overvoltage condition is triggered when the pin is above 0.5V. When the monitored input is configured as a negative voltage, an undervoltage condition is triggered when the pin is above 0.5V. Tie pin to GND if unused. 2914f 6 LTC2914 W BLOCK DIAGRA 16 15 VCC 1 2 3 4 5 VH1 VL1 VH2 VL2 VH3 TMR – + VCC 400k OSCILLATOR UV – + 12 UV PULSE GENERATOR – + VCC UVLO + – – + 2V 400k VCC OV PULSE GENERATOR DISABLE UVLO OV 11 – + OV LATCH CLEAR/BYPASS 6 7 VL3 VH4 – + + – VL4 REF 13 1V 2µA GND 1V BUFFER DIS LTC2914-2 – + 0.5V 10 13 1V LTC2914-1 – + + – 8 LATCH 9 THREE-STATE POLARITY DECODER SEL 14 2914 -1 BD 2914f 7 LTC2914 U U W U APPLICATIO S I FOR ATIO Voltage Monitoring The LTC2914 is a low power quad voltage monitoring circuit with four undervoltage and four overvoltage inputs. A timeout period that holds OV or UV asserted after all faults have cleared is adjustable using an external capacitor and is externally disabled. The three-state input pin SEL is connected to GND, VCC or left unconnected during normal operation. When the pin is left unconnected, the maximum leakage allowed from the pin is ±10µA to ensure it remains in the open state. Table 1 shows the three possible selections of polarity based on the SEL pin connection. Each voltage monitor has two inputs (VHn and VLn) for detecting undervoltage and overvoltage conditions. When configured to monitor a positive voltage Vn using the 3-resistor circuit configuration shown in Figure 1, VHn is connected to the high-side tap of the resistive divider and VLn is connected to the low-side tap of the resistive divider. If an input is configured as a negative voltage monitor, the outputs UVn and OVn in Figure 1 are swapped internally. Vn is then connected as shown in Figure 2. Note, VHn is still connected to the high-side tap and VLn is still connected to the low-side tap. Table 1. Voltage Polarity Programming (VUOT = 0.5V Typical) Polarity Selection The following 3-step design procedure allows selecting appropriate resistances to obtain the desired UV and OV trip points for the positive voltage monitor circuit in Figure 1 and the negative voltage monitor circuit in Figure 2. V3 INPUT V4 INPUT VCC Positive Positive VH3 < VUOT → UV VL3 > VUOT → OV VH4 < VUOT → UV VL4 > VUOT → OV Open GND Positive Negative VH3 < VUOT → UV VL3 > VUOT → OV VH4 < VUOT → OV VL4 > VUOT → UV Negative Negative VH3 < VUOT → OV VL3 > VUOT → UV VH4 < VUOT → OV VL4 > VUOT → UV 3-Step Design Procedure LTC2914 + REF – The three-state polarity-select pin (SEL) selects one of three possible polarity combinations for the input thresholds, as described in Table 1. When an input is configured for negative supply monitoring, VHn is configured to trigger an overvoltage condition and VLn is configured to trigger an undervoltage condition. With this configuration, an OV condition occurs when the supply voltage is more negative than the configured threshold and a UV condition occurs when the voltage is less negative than the configured threshold. SEL + – 1V Vn RC LTC2914 VHn + + – RB RA – UVn + + – RB 0.5V + OVn 0.5V – – VLn – VHn OVn VLn + UVn RC RA 2914 F02 2914 F01 Vn Figure 1. 3-Resistor Positive UV/OV Monitoring Configuration Figure 2. 3-Resistor Negative UV/OV Monitoring Configuration 2914f 8 LTC2914 U U W U APPLICATIO S I FOR ATIO For positive supply monitoring, Vn is the desired nominal operating voltage, In is the desired nominal current through the resistive divider, VOV is the desired overvoltage trip point and VUV is the desired undervoltage trip point. 1. Find RA to set the OV trip point of the monitor. For negative supply monitoring, to compensate for the 1V reference, 1V must be subtracted from Vn, VOV and VUV before using each in the following equations. 2. Find RB to set the UV trip point of the monitor. 1. Choose RA to obtain the desired OV trip point RA is chosen to set the desired trip point for the overvoltage monitor. V R A = 0.5V • n In VOV (1) 2. Choose RB to obtain the desired UV trip point RA = 0.5V • 5V ≈ 45.3k 10µA 5.5V RB = 0.5V • 5V – 45.3k ≅ 10.2k 10µA 4.5V 3. Determine RC to complete the design. RC = 5V – 45.3k − 10.2k ≈ 442k 10µA Negative Voltage Monitor Example Once RA is known, RB is chosen to set the desired trip point for the undervoltage monitor. A negative voltage monitor application is shown in Figure 4. The monitored voltage is a –5V ±10% supply. Nominal current in the resistive divider is 10µA. For the negative case, 1V is subtracted from Vn, VOV and VUV. V RB = 0.5V • n – RA In VUV 1. Find RA to set the OV trip point of the monitor. (2) RA = 0.5V • –5V – 1V ≈ 46.4k 10µA –5.5V – 1V 3. Choose RC to Complete the Design Once RA and RB are known, RC is determined by: RC = Vn – RA – RB In 2. Find RB to set the UV trip point of the monitor. (3) If any of the variables Vn, In, VUV or VOV change, then each step must be recalculated. RB = 0.5V • 5V – 1V − 46.4k ≅ 8.45k 10µA 4.5V – 1V 3. Determine RC to complete the design. RC = –5V – 1V − 46.4k − 8.45k ≈ 549k 10µA Positive Voltage Monitor Example A positive voltage monitor application is shown in Figure 3. The monitored voltage is a 5V ±10% supply. Nominal current in the resistive divider is 10µA. V1 5V ±10% VCC 5V VCC REF RC 442k RA 46.4k VCC VH1 RB 10.2k VCC 5V OV LTC2914 UV VL1 RA 45.3k SEL GND 2914 F03 Figure 3. Positive Supply Monitor OV LTC2914 VH3 UV VL3 SEL RB 8.45k RC 549k V3 –5V ±10% GND 2914 F04 Figure 4. Negative Supply Monitor 2914f 9 LTC2914 U W U U APPLICATIO S I FOR ATIO Power-Up/Power-Down As soon as VCC reaches 1V during power-up, the UV output asserts low and the OV output weakly pulls to VCC. The LTC2914 is guaranteed to assert UV low and OV high under conditions of low VCC, down to VCC = 1V. Above VCC = 2V (2.1V maximum) the VH and VL inputs take control. ⎛ RC • 0.99 ⎞ VUV(MIN) = 0.5V • 0.985 • ⎜ 1+ ⎟ ⎝ (RA + RB ) • 1.01⎠ and ⎛ RC • 1.01 ⎞ VUV(MAX ) = 0.5V • 1.015 • ⎜ 1+ ⎟ ⎝ (RA + RB ) • 0.99 ⎠ Once all VH inputs and VCC become valid an internal timer is started. After an adjustable delay time, UV weakly pulls high. For a desired trip point of 4.55V, Threshold Accuracy Therefore, Reset threshold accuracy is important in a supply-sensitive system. Ideally, such a system resets only if supply voltages fall outside the exact thresholds for a specified margin. All LTC2914 inputs have a relative threshold accuracy of ±1.5% over the full operating temperature range. For example, when the LTC2914 is programmed to monitor a 5V input with a 10% tolerance, the desired UV trip point is 4.5V. Because of the ±1.5% relative accuracy of the LTC2914, the UV trip point is between 4.433V and 4.567V which is 4.5V ±1.5%. Likewise, the accuracy of the resistances chosen for RA, RB and RC affect the UV and OV trip points as well. Using the example just given, if the resistances used to set the UV trip point have 1% accuracy, the UV trip range is between 4.354V and 4.650V. This is illustrated in the following calculations. The UV trip point is given as: ⎛ RC ⎞ VUV = 0.5V ⎜ 1+ ⎝ RA + RB ⎟⎠ RC =8 RA + RB VUV(MIN) = 0.5V • 0.985 • ⎛ 1+ 8 0.99 ⎞ = 4.354V ⎝ 1.01⎠ and VUV(MAX ) = 0.5V • 1.015 • ⎛ 1+ 8 1.01⎞ = 4.6500 V ⎝ 0.99 ⎠ Glitch Immunity In any supervisory application, noise riding on the monitored DC voltage causes spurious resets. To solve this problem without adding hysteresis, which causes a new error term in the trip voltage, the LTC2914 lowpass filters the output of the first stage comparator at each input. This filter integrates the output of the comparator before asserting the UV or OV logic. A transient at the input of the comparator of sufficient magnitude and duration triggers the output logic. The Typical Performance Characteristics section shows a graph of the Transient Duration vs Comparator Overdrive. The two extreme conditions, with a relative accuracy of 1.5% and resistance accuracy of 1%, result in: 2914f 10 LTC2914 U W U U APPLICATIO S I FOR ATIO UV/OV Timing Undervoltage Lockout The LTC2914 has an adjustable timeout period (tUOTO) that holds OV or UV asserted after all faults have cleared. This assures a minimum reset pulse width allowing a settling time delay for the monitored voltage after it has entered the valid region of operation. When VCC falls below 2V, the LTC2914 asserts an undervoltage lockout (UVLO) condition. During UVLO, UV is asserted and pulled low while OV is cleared and blocked from asserting. When VCC rises above 2V, UV follows the same timing procedure as an undervoltage condition on any input. When any VH input drops below its designed threshold, the UV pin asserts low. When all inputs recover above their designed thresholds, the UV output timer starts. If all inputs remain above their designed thresholds when the timer finishes, the UV pin weakly pulls high. However, if any input falls below its designed threshold during this time-out period, the timer resets and restarts when all inputs are above the designed thresholds. The OV output behaves as the UV output when LATCH is high (LTC2914-1). Selecting the UV/OV Timing Capacitor The UV and OV timeout period (tUOTO) for the LTC2914 is adjustable to accommodate a variety of applications. Connecting a capacitor, CTMR, between the TMR pin and ground sets the timeout period. The value of capacitor needed for a particular timeout period is: CTMR = tUOTO • 115 • 10–9 (F/s) The Reset Timeout Period vs Capacitance graph found in the Typical Performance Characteristics shows the desired delay time as a function of the value of the timer capacitor that must be used. The TMR pin must have a minimum of 10pF or be tied to VCC. For long timeout periods, the only limitation is the availability of a large value capacitor with low leakage. Capacitor leakage current must not exceed the minimum TMR charging current of 1.3µA. Tying the TMR pin to VCC bypasses the timeout period. Shunt Regulator The LTC2914 has an internal shunt regulator. The VCC pin operates as a direct supply input for voltages up to 6V. Under this condition, the quiescent current of the device remains below a maximum of 100µA. For VCC voltages higher than 6V, the device operates as a shunt regulator and must have a resistance RZ between the supply and the VCC pin to limit the current to no greater than 10mA. When choosing this resistance value, choose an appropriate location on the I-V curve shown in the Typical Performance Characteristics section to accommodate variations in VCC due to changes in current through RZ. UV and OV Output Characteristics The DC characteristics of the UV and OV pull-up and pull-down strength are shown in the Typical Performance Characteristics section. Each pin has a weak internal pull-up to VCC and a strong pull-down to ground. This arrangement allows these pins to have open-drain behavior while possessing several other beneficial characteristics. The weak pull-up eliminates the need for an external pull-up resistor when the rise time on the pin is not critical. On the other hand, the open-drain configuration allows for wired-OR connections and is useful when more than one signal needs to pull down on the output. VCC of 1V guarantees a maximum VOL = 0.15V at UV. 2914f 11 LTC2914 U W U U APPLICATIO S I FOR ATIO At VCC = 1V, the weak pull-up current on OV is barely turned on. Therefore, an external pull-up resistor of no more than 100k is recommended on the OV pin if the state and pull-up strength of the OV pin is crucial at very low VCC. Note however, by adding an external pull-up resistor, the pull-up strength on the OV pin is increased. Therefore, if it is connected in a wired-OR connection, the pull-down strength of any single device must accommodate this additional pull-up strength. OV Latch (LTC2914-1) With the LATCH pin held low, the OV pin latches low when an OV condition is detected. The latch is cleared by raising the LATCH pin high. If an OV condition clears while LATCH is held high, the latch is bypassed and the OV pin behaves the same as the UV pin with a similar timeout period at the output. If LATCH is pulled low while the timeout period is active, the OV pin latches as before. Disable (LTC2914-2) Output Rise and Fall Time Estimation The UV and OV outputs have strong pull-down capability. The following formula estimates the output fall time (90% to 10%) for a particular external load capacitance (CLOAD): tFALL ≈ 2.2 • RPD • CLOAD where RPD is the on-resistance of the internal pull-down transistor, typically 50Ω at VCC > 1V and at room temperature (25°C). CLOAD is the external load capacitance on the pin. Assuming a 150pF load capacitance, the fall time is 16.5ns. The LTC2914-2 allows disabling the UV and OV outputs via the DIS pin. Pulling DIS high forces both outputs to remain weakly pulled high, regardless of any faults that occur on the inputs. However, if a UVLO condition occurs, UV asserts and pulls low, but the timeout function is bypassed. UV pulls high as soon as the UVLO condition is cleared. DIS has a weak 2µA (typical) internal pull-down current guaranteeing normal operation with the pin left open. The rise time on the UV and OV pins is limited by a 400k pull-up resistance to VCC. A similar formula estimates the output rise time (10% to 90%) at the UV and OV pins: tRISE ≈ 2.2 • RPU • CLOAD where RPU is the pull-up resistance. 2914f 12 LTC2914 U TYPICAL APPLICATIO S Quad UV/OV Supply Monitor, 10% Tolerance, 5V, 3.3V, 2.5V, 1.8V 5V 3.3V 2.5V 1.8V P0WER SUPPLIES CBYP 0.1µF 16 RC1 44.2k RB1 1k 1 RC2 27.4k 2 VCC SEL VH1 LTC2914-1 VL1 3 VH2 RA1 4.53k RB2 1k RA2 4.53k 4 10 RC3 19.6k RB3 1k 5 RC4 12.4k6 7 RA3 4.53k RB4 1k 8 RA4 4.53k OV 14 11 SYSTEM UV 12 VL2 REF 13 VH3 LATCH VL3 VH4 VL4 GND TMR 9 15 2914 TA02 CTMR 22nF TIMEOUT = 200ms Dual Positive and Dual Negative UV/OV Supply Monitor, 10% Tolerance, 5V, 3.3V, –5V, –3.3V 5V P0WER SUPPLIES 3.3V CBYP 0.1µF 16 RC1 44.2k RB1 1k 1 RC2 27.4k 2 3 RA1 4.53k RB2 1k 4 10 RA2 4.53k RA3 4.64k RB3 845Ω 5 RA4 4.64k 6 7 RC3 54.9k RB4 768Ω 8 RC4 37.4k –3.3V VCC VH1 VL1 VH2 OV LTC2914-1 VL2 UV 11 12 REF SYSTEM VH3 13 LATCH VL3 VH4 VL4 GND 9 SEL 14 TMR 15 CTMR 2.2nF TIMEOUT = 20ms –5V 2914 TA03 2914f 13 LTC2914 Triple UV/OV Supply Monitor Powered from 48V, 10% Tolerance, 48V, 5V, 2.5V 48V P0WER SUPPLIES RZ 8.25k 5V 2.5V CBYP 0.1µF 16 RC1 475k RB1 1k 1 RC2 44.2k 2 3 RA1 4.53k RB2 1k RA2 4.53k 4 RC3 19.6k RB3 1k 10 5 6 7 RA3 4.53k 8 VCC SEL VH1 15 TMR 11 OV VL1 VH2 LTC2914-1 UV VL2 REF VH3 14 SYSTEM 12 13 LATCH VL3 VH4 VL4 GND 9 2914 TA04 2914f 14 LTC2914 U PACKAGE DESCRIPTIO DHC Package 16-Lead Plastic DFN (5mm × 3mm) (Reference LTC DWG # 05-08-1706) R = 0.115 TYP 5.00 ±0.10 (2 SIDES) R = 0.20 TYP 0.65 ±0.05 3.50 ±0.05 1.65 ±0.05 2.20 ±0.05 (2 SIDES) 9 3.00 ±0.10 1.65 ± 0.10 (2 SIDES) (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) PIN 1 NOTCH PACKAGE OUTLINE 0.25 ± 0.05 0.50 BSC 0.40 ± 0.10 16 (DHC16) DFN 1103 8 1 0.25 ± 0.05 0.50 BSC 0.75 ±0.05 0.200 REF 4.40 ±0.05 (2 SIDES) 4.40 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE GN Package 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641) .189 – .196* (4.801 – 4.978) .045 ±.005 16 15 14 13 12 11 10 9 .254 MIN .009 (0.229) REF .150 – .165 .229 – .244 (5.817 – 6.198) .0165 ± .0015 .150 – .157** (3.810 – 3.988) .0250 BSC RECOMMENDED SOLDER PAD LAYOUT 1 .015 ± .004 × 45° (0.38 ± 0.10) .007 – .0098 (0.178 – 0.249) .0532 – .0688 (1.35 – 1.75) 2 3 4 5 6 7 8 .004 – .0098 (0.102 – 0.249) 0° – 8° TYP .016 – .050 (0.406 – 1.270) NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) .008 – .012 (0.203 – 0.305) TYP .0250 (0.635) BSC GN16 (SSOP) 0204 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 2914f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC2914 U TYPICAL APPLICATIO Quad UV/OV Supply Monitor with LED Undervoltage and Overvoltage Indicator and Manual Undervoltage Reset Button, 10% Tolerance, 12V, 5V, 3.3V, 2.5V P0WER SUPPLIES 12V 5V 3.3V 2.5V 0.1µF 44.2k 1k VCC VH1 SEL VL1 VH2 OV 510Ω 510Ω LED LED 27.4k 4.53k 1k LTC2914-1 VL2 4.53k SYSTEM 19.6k UV REF VH3 LATCH 2.05M 1k VL3 VH4 4.53k 100k 10k VL4 GND TMR 2914 TA06 CTMR 22nF TIMEOUT = 200ms MANUAL RESET BUTTON (NORMALLY OPEN) RELATED PARTS PART NUMBER LTC1326/ LTC1326-2.5 LTC1726-2.5/ LTC1726-5 LTC1727-2.5/ LTC1727-5 LTC1728-1.8/ LTC1728-3.3 LTC1728-2.5/ LTC1728-5 LTC1985-1.8 LTC2900 LTC2901 LTC2902 LTC2903 LTC2904 LTC2905 LTC2906 LTC2907 LTC2908 LTC2909 DESCRIPTION Micropower Precision Triple Supply Monitor for 5V/2.5V, 3.3V and ADJ Micropower Triple Supply Monitor for 2.5V/5V, 3.3V and ADJ Micropower Triple Supply Monitor with Open-Drain Reset COMMENTS 4.725V, 3.118V, 1V Threshold (±0.75%) Adjustable RESET and Watchdog Time-Outs Individual Monitor Outputs in MSOP Micropower Triple Supply Monitor with Open-Drain Reset 5-Lead SOT-23 Package Micropower Triple Supply Monitor with Open-Drain Reset 5-Lead SOT-23 Package Micropower Triple Supply Monitor with Push-Pull Reset Programmable Quad Supply Monitor 5-Lead SOT-23 Package Adjustable RESET, 10-Lead MSOP and 3mm x 3mm 10-Lead DFN Package Programmable Quad Supply Monitor Adjustable RESET and Watchdog Timer, 16-Lead SSOP Package Programmable Quad Supply Monitor Adjustable RESET and Tolerance, 16-Lead SSOP Package, Margining Functions Precision Quad Supply Monitor 6-Lead SOT-23 Package, Ultralow Voltage Reset Three-State Programmable Precision Dual Supply Monitor Adjustable Tolerance, 8-Lead SOT-23 Package Three-State Programmable Precision Dual Supply Monitor Adjustable RESET and Tolerance, 8-Lead SOT-23 Package Precision Dual Supply Monitor 1 Selectable and 1 Adjustable Separate VCC Pin, RST/RST Outputs Precision Dual Supply Monitor 1 Selectable and 1 Adjustable Separate VCC, Adjustable Reset Timer Precision Six Supply Monitor 8-Lead TSOT-23 and 3mm × 2mm DFN Packages Precision Dual Input UV, OV and Negative Voltage Monitor Separate VCC Pin, Adjustable Reset Timer, 8-Lead TSOT-23 and 3mm × 2mm DFN Packages 2914f 16 Linear Technology Corporation LT 0606 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2006