LINER LTM8033

LTM4606
Ultralow EMI 28VIN, 6A
DC/DC µModule Regulator
Features
Description
Complete Low EMI Switch Mode Power Supply
Wide Input Voltage Range: 4.5V to 28V
6A DC Typical, 8A Peak Output Current
0.6V to 5V Output Voltage Range
EN55022 Class B Certified
Output Voltage Tracking and Margining
PLL Frequency Synchronization
±1.75% Total DC Error
Power Good Output
Current Foldback Protection (Disabled at Start-Up)
Parallel/Current Sharing
Ultrafast Transient Response
Current Mode Control
Up to 93% Efficiency at 5VIN , 3.3VOUT
Programmable Soft-Start
Output Overvoltage Protection
–55°C to 125°C Operating Temperature Range
(LTM4606MPV)
n Small Surface Mount Footprint, Low Profile Package
(15mm × 15mm × 2.8mm)
The LTM®4606 is a complete EN55022 Class B certified
noise high voltage 6A switching mode DC/DC power supply.
Included in the package are the switching controller, power
FETs, inductor, and all support components. The on-board
input filter and noise cancellation circuits achieve low noise
operation, thus effectively reducing the electromagnetic
interference (EMI). Operating over an input voltage range
of 4.5V to 28V, the LTM4606 supports an output voltage
range of 0.6V to 5V, set by a single resistor. This high efficiency design delivers 6A continuous current (8A peak).
Only bulk input and output capacitors are needed to finish
the design.
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Applications
n
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ASICs or FPGA Transceivers
Telecom, Servers and Networking Equipment
Industrial Equipment
RF Equipment
L, LT, LTC, LTM, Linear Technology, the Linear logo, µModule and PolyPhase are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
Furthermore, the µModule® regulator can be synchronized
with an external clock for reducing undesirable frequency
harmonics and allows PolyPhase® operation for high load
currents.
The LTM4606 is offered in a space saving and thermally
enhanced 15mm × 15mm × 2.8mm LGA package, which
enables utilization of unused space on the bottom of
PC boards for high density point of load regulation. The
LTM4606 is Pb-free and RoHS compliant.
Typical Application
Radiated Emission Scan at 12VIN, 2.5VOUT/6A
50
Ultralow Noise 2.5V/6A Power Supply with 4.5V to 28V Input
4.5V TO 28V
ON/OFF
CIN
10µF
35V
CERAMIC
x2
40
CLOCK SYNC
TRACK/SS
CONTROL
10µF
35V
VIN
PLLIN
VOUT
PGOOD
RUN LTM4606
COMP
INTVCC
DRVCC
fSET
TRACK/SS
VD
SGND
2.5V AT 6A
47pF
VFB
FCB
MARG0
MARG1
MPGM
PGND
RFB
19.1k
MARGIN
CONTROL
392k
5% MARGIN
4606 TA01a
COUT
SIGNAL AMPLITUDE (dBµV/m)
n
High switching frequency and an adaptive on-time current
mode architecture enables a very fast transient response
to line and load changes without sacrificing stability. The
device supports output voltage tracking and output voltage margining.
30
20
10
0
–10
–20
–30
30
226.2
422.4
618.6
814.8
1010
128.1
324.3
520.5
716.7
912.9
FREQUENCY (MHz)
4606 TA01b
4606fb
1
LTM4606
Absolute Maximum Ratings
Pin Configuration
(Note 1)
TOP VIEW
fSET
MARG0
MARG1
DRVCC
VFB
PGOOD
SGND
NC
NC
NC
FCB
DRVCC, VOUT................................................. –0.3V to 6V
PLLIN, FCB, TRACK/SS, MPGM, MARG0,
MARG1, PGOOD, RUN ...............–0.3V to INTVCC + 0.3V
VFB, COMP................................................. –0.3V to 2.7V
VIN, VD........................................................ –0.3V to 28V
Internal Operating Temperature Range (Note 2)
E and I Grades.................................... –40°C to 125°C
MP Grade............................................ –55°C to 125°C
Junction Temperature............................................ 125°C
Storage Temperature Range................... –45°C to 125°C
MPGM
COMP
RUN
TRACK/SS
PLLIN
INTVCC
12
11
10
SGND
9
VD
8
7
6
5
4
3
2
1
A
B
C
D
VIN
BANK 1
E
F
G
PGND
BANK 2
H
J
K
L
M
VOUT
BANK 3
LGA PACKAGE
133-LEAD (15mm × 15mm × 2.8mm)
TJMAX = 125°C, θJA = 15°C/W, θJCbottom = 6°C/W, θJCtop = 16°C/W
θJA DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS
WEIGHT = 1.7g
order information
LEAD FREE FINISH
TRAY
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTM4606EV#PBF
LTM4606EV#PBF
LTM4606V
133-Lead (15mm × 15mm × 2.8mm) LGA
–40°C to 125°C
LTM4606IV#PBF
LTM4606IV#PBF
LTM4606V
133-Lead (15mm × 15mm × 2.8mm) LGA
–40°C to 125°C
LTM4606MPV#PBF
LTM4606MPV#PBF
LTM4606MPV
133-Lead (15mm × 15mm × 2.8mm) LGA
–55°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
Electrical Characteristics
The l denotes the specifications which apply over the specified internal
operating temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted. Per typical
application (front page) configuration, RFB = 40.2k.
SYMBOL
PARAMETER
CONDITIONS
VIN(DC)
Input DC Voltage
VOUT(DC)
Output Voltage, Total Variation with
Line and Load
CIN = 10µF x2, COUT = 200µF; FCB = 0
VIN = 5V to 28V, IOUT = 0A to 6A, (Note 4)
VIN(UVLO)
Undervoltage Lockout Threshold
IINRUSH(VIN)
Input Inrush Current at Start-Up
MIN
l
4.5
l
1.474
TYP
MAX
UNITS
28
V
1.5
1.526
V
IOUT = 0A
3.2
4
V
IOUT = 0A, CIN = 10µF x2, COUT = 200µF,
VOUT = 1.5V
VIN = 5V
VIN = 12V
0.6
0.7
Input Specifications
A
A
4606fb
2
LTM4606
Electrical
Characteristics
The
l denotes the specifications which apply over the specified internal
operating temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted. Per typical
application (front page) configuration, RFB = 40.2k.
SYMBOL
PARAMETER
CONDITIONS
IQ(VIN)
Input Supply Bias Current
VIN = 5V, VOUT = 1.5V, Switching Continuous
VIN = 12V, VOUT = 1.5V, Switching Continuous
Shutdown, RUN = 0, VIN = 12V
IS(VIN)
Input Supply Current
INTVCC
VIN = 12V, RUN > 2V
MIN
TYP
MAX
27
25
22
VIN = 12V, VOUT = 1.5V, IOUT = 6A
VIN = 5V, VOUT = 1.5V, IOUT = 6A
mA
mA
µA
0.96
2.18
No Load
4.7
5
UNITS
A
A
5.3
V
6
A
0.3
%
0.3
%
Output Specifications
IOUT(DC)
Output Continuous Current Range
VIN = 12V, VOUT = 1.5V (Note 4)
DVOUT(LINE)/VOUT
Line Regulation Accuracy
VOUT = 1.5V, FCB = 0V, VIN = 4.5V to 28V,
IOUT = 0A
DVOUT(LOAD)/VOUT
Load Regulation Accuracy
VOUT = 1.5V, FCB = 0V, IOUT = 0A to 6A
VIN = 12V (Note 4)
VIN(AC)
VOUT(AC)
Input Ripple Voltage
Output Ripple Voltage
0
0.05
l
l
IOUT = 0A, CIN = 10µF X5R Ceramic x3 and
100µF Electrolytic
VIN = 5V, VOUT = 1.5V
VIN = 12V, VOUT = 1.5V
2
3
mVP-P
mVP-P
IOUT = 0A, COUT = 22µF X5R Ceramic x3 and
100µF X5R Ceramic
VIN = 5V, VOUT = 1.5V
VIN = 12V, VOUT = 1.5V
8
11
mVP-P
mVP-P
fS
Output Ripple Voltage Frequency
IOUT = 5A, VIN = 12V, VOUT = 1.5V
900
kHz
DVOUT(START)
Turn-On Overshoot,
TRACK/SS = 10nF
COUT = 200µF, VOUT = 1.5V, IOUT = 0A
VIN = 12V
VIN = 5V
20
20
mV
mV
tSTART
Turn-On Time, TRACK/SS = Open
COUT = 200µF; VOUT = 1.5V, IOUT = 1A
Resistive Load
VIN = 5V
VIN = 12V
0.5
0.5
ms
ms
35
mV
25
µs
10
10
A
A
DVOUT(LS)
Peak Deviation for Dynamic Load
Load: 0% to 50% to 0% of Full Load
COUT = 22µF Ceramic, 470µF x2
VIN = 12V
VOUT = 1.5V
tSETTLE
Settling Time for Dynamic Load Step Load: 0% to 50% to 0% of Full Load,
VIN = 12V
VIN = 12V
IOUT(PK)
Output Current Limit
COUT = 200µF
VIN = 5V, VOUT = 1.5V
VIN = 12V, VOUT = 1.5V
VFB
Voltage at VFB Pin
IOUT = 0A, VOUT = 1.5V
VRUN
RUN Pin On/Off Threshold
ISS / TRACK
Soft-Start Charging Current
VFCB
Forced Continuous Threshold
IFCB
Forced Continuous Pin Current
VFCB = 0V
Control Section
VSS/TRACK = 0V
l
0.591
0.6
0.609
V
1
1.5
1.9
V
–1
–1.5
–2
µA
0.57
0.6
0.63
V
–1
–2
µA
tON(MIN)
Minimum On Time
(Note 3)
50
100
ns
tOFF(MIN)
Minimum Off Time
(Note 3)
250
400
ns
RPLLIN
PLLIN Input Resistor
50
kW
4606fb
3
LTM4606
Electrical
Characteristics
The
l denotes the specifications which apply over the specified internal
operating temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted. Per typical
application (front page) configuration, RFB = 40.2k.
SYMBOL
PARAMETER
CONDITIONS
IDRVCC
Current into DRVCC Pin
VOUT = 1.5V, IOUT = 1A
RFBHI
Resistor Between VOUT and VFB Pins
RUNMAX
Volts From RUN to GND Maximum
MIN
TYP
15
25
mA
60.098
60.4
60.702
kW
5.1V Zener Clamp
MAX
UNITS
5
V
Margin Section
MPGM
Margin Reference Voltage Sets a
Current
1.18
V
MARG0, MARG1
Voltage Thresholds
1.4
V
PGOOD
DVFBH
PGOOD Upper Threshold
VFB Rising
7
10
13
%
DVFBL
PGOOD Lower Threshold
VFB Falling
–7
–10
–13
%
DVFB(HYS)
PGOOD Hysteresis
VFB Returning
1.5
VPGL
PGOOD Low Voltage
IPGOOD = 5mA
0.15
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4606E is guaranteed to meet performance specifications
over the 0°C to 125°C internal operating temperature range. Specifications
over the –40°C to 125°C internal operating temperature range are assured
by design, characterization and correlation with statistical process
controls. The LTM4606I is guaranteed to meet specifications over the
%
0.4
V
–40°C to 125°C internal operating temperature range. The LTM4606MP
is guaranteed and tested over the –55°C to 125°C internal operating
temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
Note 3: 100% tested at die level only.
Note 4: See output current derating curves for different VIN, VOUT and TA.
4606fb
4
LTM4606
Typical Performance Characteristics
100
80
70
0.6VOUT
1.2VOUT
1.8VOUT
2.5VOUT
3.3VOUT
60
50
100
90
EFFICIENCY (%)
EFFICIENCY (%)
90
Efficiency vs Load Current with
12VIN (FCB = 0)
0
1
2
3
4
LOAD CURRENT (A)
5
80
70
1.2VOUT
1.5VOUT
2.5VOUT
3.3VOUT
5VOUT
60
6
50
0
1
2
3
4
LOAD CURRENT (A)
4606 G01
5
80
70
60
6
50
1.5V Transient Response
1
2
3
4
LOAD CURRENT (A)
IOUT
2A/DIV
VOUT
50mV/DIV
VOUT
50mV/DIV
VOUT
50mV/DIV
4606 G04
50µs/DIV
1.5V AT 3.5A/µs LOAD STEP
COUT = 2× 22µF, 10V CERAMIC
1× 100µF, 6.3V CERAMIC
2.5V Transient Response
4606 G05
50µs/DIV
1.8V AT 3.5A/µs LOAD STEP
COUT = 2× 22µF, 10V CERAMIC
1× 100µF, 6.3V CERAMIC
3.3V Transient Response
IOUT
2A/DIV
IOUT
2A/DIV
VOUT
50mV/DIV
VOUT
100mV/DIV
5
6
1.8V Transient Response
IOUT
2A/DIV
4606 G07
0
4606 G03
IOUT
2A/DIV
50µs/DIV
2.5V AT 3.5A/µs LOAD STEP
COUT = 2× 22µF, 10V CERAMIC
1× 100µF, 6.3V CERAMIC
2.5VOUT
3.3VOUT
5VOUT
4606 G02
1.2V Transient Response
50µs/DIV
1.2V AT 3.5A/µs LOAD STEP
COUT = 2× 22µF, 10V CERAMIC
1× 100µF, 6.3V CERAMIC
Efficiency vs Load Current with
24VIN (FCB = 0)
90
EFFICIENCY (%)
100
Efficiency vs Load Current with
5VIN (FCB = 0)
4606 G06
–55°C, Start-Up, IOUT = 0A
VOUT
0.5V/DIV
IIN
0.5A/DIV
50µs/DIV
3.3V AT 3.5A/µs LOAD STEP
COUT = 2× 22µF, 10V CERAMIC
1× 100µF, 6.3V CERAMIC
4606 G08
1ms/DIV
VIN = 12V
VOUT = 1.5V
COUT = 2× 22µF, 10V CERAMIC
1× 100µF, 6.3V CERAMIC
SOFT-START = 3.9nF
4606 G09
4606fb
5
LTM4606
Typical Performance Characteristics
–55°C, Start-Up, IOUT = 6A
Start-Up, IOUT = 6A
(Resistive Load)
Start-Up, IOUT = 0A
VOUT
0.5V/DIV
VOUT
0.5V/DIV
VOUT
0.5V/DIV
IIN
0.5A/DIV
4606 G10
1ms/DIV
VIN = 12V
VOUT = 1.5V
COUT = 2× 22µF, 10V CERAMIC
1× 100µF, 6.3V CERAMIC
SOFT-START = 3.9nF
IIN
0.5A/DIV
IIN
0.5A/DIV
1ms/DIV
VIN = 12V
VOUT = 1.5V
COUT = 1× 22µF, 6.3V CERAMIC
1× 330µF, 4V SANYO POSCAP
SOFT-START = 3.9nF
4606 G11
1ms/DIV
VIN = 12V
VOUT = 1.5V
COUT = 1× 22µF, 6.3V CERAMIC
1× 330µF, 4V SANYO POSCAP
SOFT-START = 3.9nF
Short-Circuit Protection,
IOUT = 6A
VOUT
2V/DIV
VOUT
1V/DIV
IIN
0.2A/DIV
IIN
2A/DIV
4606 G13
50µs/DIV
VIN = 12V
VOUT = 2.5V
COUT = 2× 22µF, 10V CERAMIC
1× 100µF, 6.3V CERAMIC
SOFT-START = 0.1µF
VIN to VOUT Step-Down
Operation Region
28
24
SEE FREQUENCY ADJUSTMENT SECTION
FOR OPERATIONS OUTSIDE THIS REGION
20
VIN (V)
Short-Circuit Protection,
IOUT = 0A
4606 G12
50µs/DIV
VIN = 12V
VOUT = 2.5V
COUT = 2× 22µF, 10V CERAMIC
1× 100µF, 6.3V CERAMIC
SOFT-START = 0.1µF
4606 G14
16
OPERATION REGION
WITH DEFAULT FREQUENCY
12
8
4.5
0.6 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VOUT (V)
4606 G15
Input Ripple
VFB vs Temperature
Output Ripple
0.606
0.604
VFB (V)
VOUT
2mV/DIV
VIN
10mV/DIV
0.602
0.600
0.598
2µs/DIV
VIN = 5V
VOUT = 1V AT 6A
CIN = 3× 10µF, 25V CERAMIC
1× 150µF BULK
BW = 300MHz
0.596
0.594
–55
–25
35
65
5
TEMPERATURE (°C)
95
4606 G17
2µs/DIV
VIN = 5V
VOUT = 1V AT 6A
COUT = 2× 22µF, 6.3V CERAMIC
1× 100µF, 6.3V CERAMIC
BW = 300MHz
4606 G18
125
4606 G16
4606fb
6
LTM4606
Pin Functions
VIN (Bank 1): Power Input Pins. Apply input voltage between these pins and PGND pins. Recommend placing
input decoupling capacitance directly between VIN pins
and PGND pins.
VOUT (Bank 3): Power Output Pins. Apply output load
between these pins and PGND pins. Recommend placing
output decoupling capacitance directly between these pins
and PGND pins (see figure below).
PGND (Bank 2): Power Ground Pins for Both Input and
Output Returns.
VD (Pins B7, C7): Top FET Drain Pins. Add more capacitors
between VD and ground to handle the input RMS current
and reduce the input ripple further.
DRVCC (Pins C10, E11, E12): These pins normally connect to INTVCC for powering the internal MOSFET drivers.
They can be biased up to 6V from an external supply with
about 50mA capability, or an external circuit as shown in
Figure 18. This improves efficiency at the higher input
voltages by reducing power dissipation in the modules.
INTVCC (Pin A7): This pin is for additional decoupling of
the 5V internal regulator.
PLLIN (Pin A8): External Clock Synchronization Input to
the Phase Detector. This pin is internally terminated to
SGND with a 50k resistor. Apply a clock with high level
above 2V and below INTVCC. See the Applications Information section.
FCB (Pin M12): Forced Continuous Input. Connect this pin
to SGND to force continuous synchronization operation at
low load, to INTVCC to enable discontinuous mode operation at low load or to a resistive divider from a secondary
output when using a secondary winding.
TRACK/SS (Pin A9): Output Voltage Tracking and Soft-Start
Pin. When the module is configured as a master output,
then a soft-start capacitor is placed on this pin to ground
to control the master ramp rate. A soft-start capacitor can
be used for soft-start turn-on as a standalone regulator.
Slave operation is performed by putting a resistor divider
from the master output to ground, and connecting the
center point of the divider to this pin. See the Applications
Information section.
MPGM (Pins A12, B11): Programmable Margining Input.
A resistor from these pins to ground sets a current that
is equal to 1.18V/R. This current multiplied by 10kW will
equal a value in millivolts that is a percentage of the 0.6V
reference voltage. See the Applications Information section.
To parallel LTM4606s, each requires an individual MPGM
resistor. Do not tie MPGM pins together.
fSET (Pin B12): Frequency set internally to 800kHz in
continuous conducting mode at light load. An external
resistor can be placed from this pin to ground to increase
frequency. This pin can be decoupled with a 1000pF
capacitor. See the Applications Information section for
frequency adjustment.
VFB (Pin F12): The Negative Input of the Error Amplifier.
Internally, this pin is connected to VOUT with a 60.4k precision resistor. Different output voltages can be programmed
with an additional resistor between the VFB and SGND pins.
See the Applications Information section.
MARG0 (Pin C12): LSB Logic Input for the Margining
Function. Together with the MARG1 pin, the MARG0 pin
will determine if a margin high, margin low, or no margin
state is applied. The pin has an internal pulldown resistor
of 50k. See the Applications Information section.
MARG1 (Pins C11, D12): MSB Logic Input for the Margining Function. Together with the MARG0 pin, the MARG1
pins will determine if a margin high, margin low, or no
margin state is applied. The pins have an internal pull-down
resistor of 50k. See the Applications Information section.
SGND (Pins D9, H12): Signal Ground Pins. These pins
connect to PGND at output capacitor point.
COMP (Pins A11, D11): Current Control Threshold and
Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. The
voltage ranges from 0V to 2.4V with 0.7V corresponding
to zero sense voltage (zero current).
PGOOD (Pin G12): Output Voltage Power Good Indicator.
Open-drain logic output that is pulled to ground when the
output voltage is not within ±10% of the regulation point,
after a 25µs power bad mask timer expires.
4606fb
7
LTM4606
Pin Functions
NC (Pins J12, K12, L12): These pads must be left floating
(electrical open circuit) and are used for increased solder
integrity strength.
fSET
MARG0
MARG1
DRVCC
VFB
PGOOD
SGND
NC
NC
NC
FCB
RUN (Pins A10, B9): Run Control Pins. A voltage above
1.9V will turn on the module, and below 1V will turn off
the module. A programmable UVLO function can be accomplished with a resistor from VIN to this pin that has a
5.1V Zener to ground. Maximum pin voltage is 5V.
MPGM
COMP
RUN
TRACK/SS
PLLIN
INTVCC
12
11
10
SGND
9
VD
8
7
6
5
4
3
2
1
A
B
C
VIN
BANK 1
D
E
F
G
PGND
BANK 2
H
J
K
L
M
VOUT
BANK 3
4606fb
8
LTM4606
Block Diagram
>1.9V = ON
<1V = OFF
MAX = 5V
VOUT
RUN
PGOOD
5.1V
ZENER
COMP
1.5µF
INPUT
FILTER
+
VIN
4.5V TO 28V
CIN
60.4k
VD
INTERNAL
COMP
CD
POWER CONTROL
SGND
M1
1µH
VOUT
2.5V
AT 6A
MARG1
MARG0
VFB
RFB
19.1k
50k
50k
fSET
M2
NOISE
CANCELLATION
22µF
41.2k
+
COUT
PGND
FCB
10k
MPGM
TRACK/SS
CSS
PLLIN
4.7µF
50k
INTVCC
DRVCC
4606 F01
Figure 1. Simplified Block Diagram
decoupling requirements
TA = 25°C. Use Figure 1 configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
CIN
External Input Capacitor Requirement
(VIN = 4.5V to 28V, VOUT = 2.5V)
IOUT = 6A
10
COUT
External Output Capacitor Requirement
(VIN = 4.5V to 28V, VOUT = 2.5V)
IOUT = 6A
100
TYP
MAX
UNITS
µF
200
µF
4606fb
9
LTM4606
Operation
Power Module Description
The LTM4606 is a standalone non-isolated switching mode
DC/DC power supply. It can deliver up to 6A of DC output
current with some external input and output capacitors.
This module provides precisely regulated output voltage
programmable via one external resistor from 0.6VDC to
5.0VDC over a 4.5V to 28V input voltage range. The typical
application schematic is shown in Figure 20.
The LTM4606 has an integrated constant on-time current
mode regulator, ultralow RDS(ON) FETs with fast switching speed and integrated Schottky diodes. With current
mode control and internal feedback loop compensation,
the LTM4606 module has sufficient stability margins and
good transient performance under a wide range of operating conditions and with a wide range of output capacitors,
even all ceramic output capacitors.
Current mode control provides cycle-by-cycle fast current
limiting. Besides, foldback current limiting is provided in
an overcurrent condition while VFB drops. Internal overvoltage and undervoltage comparators pull the open-drain
PGOOD output low if the output feedback voltage exits a
±10% window around the regulation point. Furthermore,
in an overvoltage condition, internal top FET M1 is turned
off and bottom FET M2 is turned on and held on until the
overvoltage condition clears.
Input filter and noise cancellation circuits reduce the noise
coupling to I/O sides, and ensure the electromagnetic
interference (EMI) to meet EN55022 Class B limits.
Pulling the RUN pin below 1V forces the controller into its
shutdown state, turning off both M1 and M2. At low load
currents, discontinuous mode (DCM) operation can be
enabled to achieve higher efficiency compared to continuous mode (CCM) by setting the FCB pin higher than 0.6V.
When the DRVCC pin is connected to INTVCC an integrated
5V linear regulator powers the internal gate drivers. If a
5V external bias supply is applied on the DRVCC pin, then
an efficiency improvement will occur due to the reduced
power loss in the internal linear regulator. This is especially
true at the higher input voltage range.
The MPGM, MARG0 and MARG1 pins are used to support voltage margining, where the percentage of margin
is programmed by the MPGM pin, and the MARG0 and
MARG1 selected margining. The PLLIN pin provides frequency synchronization of the device to an external clock.
The TRACK/SS pin is used for power supply tracking and
soft-start programming.
4606fb
10
LTM4606
Applications Information
The typical LTM4606 application circuit is shown in Figure 20. External component selection is primarily determined by the maximum load current and output voltage.
Refer to Table 2 for specific external capacitor requirements
for a particular application.
RPGM resistor on the MPGM pin programs the current.
Calculate VOUT(MARGIN):
VIN to VOUT Step-Down Ratios
where %VOUT is the percentage of VOUT you want to
margin, and VOUT(MARGIN) is the margin quantity in volts:
Under the default frequency, there are restrictions in
the maximum VIN and VOUT step-down ratio that can be
achieved for a given input voltage. These constraints are
caused by the limitation of the minimum on and off time in
the internal switches. Refer to the Frequency Adjustment
section to change the switching frequency and get wider
input and output ranges. See the Thermal Considerations
and Output Current Derating section in this data sheet for
the current restrictions.
VOUT
1.18V
•
• 10k
0.6V VOUT(MARGIN)
The output margining will be ± margining of the value.
This is controlled by the MARG0 and MARG1 pins. See
the truth table below:
MARG1
The PWM controller has an internal 0.6V reference voltage.
As shown in the Block Diagram, a 60.4k internal feedback
resistor connects the VOUT and VFB pins together. Adding
a resistor RFB from the VFB pin to the SGND pin programs
the output voltage:
RPGM =
60.4k + RFB
= 0.6V
RFB
Table 1. RFB Standard 1% Resistor Values vs VOUT
RFB
(kΩ)
Open
60.4
40.2
30.1
25.5
19.1
13.3
8.25
VOUT
(V)
0.6
1.2
1.5
1.8
2
2.5
3.3
5
The MPGM pin programs a current that when multiplied
by an internal 10k resistor sets up the 0.6V reference ±
offset for margining. A 1.18V reference divided by the
%VOUT
• VOUT
100
where RPGM is the resistor value to place on the MPGM
pin to ground.
Output Voltage Programming and Margining
VOUT
VOUT(MARGIN) =
MARG0
MODE
LOW
LOW
NO MARGIN
LOW
HIGH
MARGIN UP
HIGH
LOW
MARGIN DOWN
HIGH
HIGH
NO MARGIN
Input Capacitors and Input EMI Noise Attenuation
The LTM4606 is designed to achieve low input conducted
EMI noise due to the fast switching of turn-on and turn-off.
In the LTM4606, a high frequency inductor is integrated
to the input line for noise attenuation. VD and VIN pins
are available for external input capacitors to form a high
frequency π filter. As shown in Figure 19, the ceramic
capacitor C1 on the VD pins is used to handle most of
the RMS current into the converter, so careful attention
is needed for capacitor C1 selection.
For a buck converter, the switching duty cycle can be
estimated as:
D=
VOUT
VIN
4606fb
11
LTM4606
Applications Information
Without considering the inductor ripple current, the RMS
current of the input capacitor can be estimated as:
ICIN(RMS) =
IOUT(MAX)
η
• D • (1– D)
Output Capacitors
In the above equation, η is the estimated efficiency of the
power module. Note the capacitor ripple current ratings
are often based on temperature and hours of life. This
makes it advisable to properly derate the capacitor, or
choose a capacitor rated at a higher temperature than
required. Always contact the capacitor manufacturer for
derating requirements.
In a typical 6A output application, one or two very low
ESR X5R or X7R, 10µF ceramic capacitors are recommended for C1. This decoupling capacitor should be placed
directly adjacent to the module VD pins in the PCB layout
to minimize the trace inductance and high frequency AC
noise. Each 10µF ceramic is typically good for 2 to 3 amps
of RMS ripple current. Refer to your ceramics capacitor
catalog for the RMS current ratings.
To attenuate high frequency noise, extra input capacitors
should be connected to the VIN pads and placed before
the high frequency inductor to form the π filter. One of
these low ESR ceramic capacitors is recommended to
be placed close to the connection into the system board.
A large bulk 100µF capacitor is only needed if the input
source impedance is compromised by long inductive leads
or traces. Figure 2 shows the radiated EMI test results to
50
40
SIGNAL AMPLITUDE (dBµV/m)
meet EN55022 Class B. For different applications, input
capacitance may be varied to meet different radiated EMI
limits.
30
20
10
The LTM4606 is designed for low output voltage ripple.
The bulk output capacitors defined as COUT are chosen
with low enough effective series resistance (ESR) to meet
the output voltage ripple and transient requirements. COUT
can be a low ESR tantalum capacitor, low ESR polymer
capacitor or ceramic capacitor. The typical capacitance is
200µF if all ceramic output capacitors are used. Additional
output filtering may be required by the system designer,
if further reduction of output ripple or dynamic transient
spike is required. Table 2 shows a matrix of different output
voltages and output capacitors to minimize the voltage
droop and overshoot during a 3A/µs transient. The table
optimizes total equivalent ESR and total bulk capacitance
to maximize transient performance.
Multiphase operation with multiple LTM4606 devices in
parallel will lower the effective output ripple current due
to the phase interleaving operation. Refer to Figure 3
for the normalized output ripple current versus the duty
cycle. Figure 3 provides a ratio of peak-to-peak output
ripple current to the inductor ripple current as functions
of duty cycle and the number of paralleled phases. Pick
the corresponding duty cycle and the number of phases
to get the correct output ripple current value. For example,
each phase’s inductor ripple current DIr at zero duty cycle
is ~2.5A for a 12V to 2.5V design. The duty cycle is about
0.21. The 2-phase curve has a ratio of ~0.58 for a duty
cycle of 0.21. This 0.58 ratio of output ripple current to
the inductor ripple current DIr at 2.5A equals ~1.5A of the
output ripple current (∆IL).
The output voltage ripple has two components that are
related to the amount of bulk capacitance and effective
series resistance (ESR) of the output bulk capacitance.
The equation is:
0
–10
–20
–30
30
226.2
422.4
618.6
814.8
1010
128.1
324.3
520.5
716.7
912.9
FREQUENCY (MHz)
4606 F02
Figure 2. Radiated Emission Scan with 12VIN
to 2.5VOUT at 6A (1×100µF X7R Ceramic COUT)
⎛
⎞
DIL
DVOUT(P−P) ≈ ⎜
⎟ + ESR • DIL
8 • f • N • COUT ⎠
⎝
where f is the frequency and N is the number of paralleled
phases.
4606fb
12
LTM4606
Applications Information
1.00
0.95
1-PHASE
2-PHASE
3-PHASE
4-PHASE
6-PHASE
0.90
0.85
RATIO =
PEAK-TO-PEAK OUTPUT RIPPLE CURRENT
DIr
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9
DUTY CYCLE (VO/VIN)
4612 F05
Figure 3. Normalized Output Ripple Current vs Duty Cycle, Dlr = VOT/LI
Fault Conditions: Current Limit and Overcurrent
Foldback
LTM4606 has a current mode controller, which inherently limits the cycle-by-cycle inductor current not only
in steady-state operation, but also in transient.
To further limit current in the event of an overload condition, the LTM4606 provides foldback current limiting. If the
output voltage falls by more than 50%, then the maximum
output current is progressively lowered to about one sixth
of its full current limit value.
Soft-Start and Tracking
The TRACK/SS pin provides a means to either soft-start
the regulator or track it to a different power supply.
A capacitor on this pin will program the ramp rate of the
output voltage. A 1.5µA current source will charge up the
external soft-start capacitor to 80% of the 0.6V internal
voltage reference plus or minus any margin delta. This will
control the ramp of the internal reference and the output
voltage. The total soft-start time can be calculated as:
(
)
tSOFTSTART ≅ 0.8 • 0.6V ± VOUT(MARGIN) •
CSS
1.5µA
When the RUN pin falls below 2.5V, then the SS pin is reset
to allow for proper soft-start control when the regulator is
enabled again. Current foldback and force continuous mode
are disabled during the soft-start process. The soft-start
function can also be used to control the output ramp up
time, so that another regulator can be easily tracked to it.
4606fb
13
LTM4606
Applications Information
Output Voltage Tracking
Run Enable
Output voltage tracking can be programmed externally
using the TRACK/SS pin. The output can be tracked up and
down with another regulator. Figure 4 shows an example
of coincident tracking where the master regulator’s output
is divided down with an external resistor divider that is the
same as the slave regulator’s feedback divider. Ratiometric
modes of tracking can be achieved by selecting different
resistor values to change the output tracking ratio. The
master output must be greater than the slave output for
the tracking to work. Figure 5 shows the coincident output
tracking characteristics.
The RUN pin is used to enable the power module. The
pin has an internal 5.1V zener to ground. The pin can be
driven with a logic input not to exceed 5V.
VIN
VIN
PLLIN
PGOOD
RUN
CIN
MASTER
OUTPUT
TRACK
CONTROL
R2
60.4k
R1
19.1k
VUVLO =
R1+ R2
• 1.5V
R2
where R2 is the bottom resistor of the divider, R1 is the
top resistor of the divider.
Power Good
100k
VD
The RUN pin can also be used as an undervoltage lock out
(UVLO) function by connecting a resistor divider from the
input supply to the RUN pin:
SLAVE
OUTPUT
COUT 2.5V
VOUT
VFB
LTM4606
FCB
COMP
INTVCC
MARG0
DRVCC
MARG1
fSET
COMP Pin
MPGM
TRACK/SS
SGND
PGND
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a ±10% window around the regulation point and tracks
with margining.
19.1k
4606 F04
Figure 4. Output Voltage Coincident Tracking
This pin is the external compensation pin. The module
has already been internally compensated for most output
voltages. Table 2 is provided for most application requirements. LTpowerCAD™ is available for other control loop
optimization.
FCB Pin
MASTER OUTPUT
SLAVE OUTPUT
OUTPUT
VOLTAGE
TIME
The FCB pin determines whether the bottom MOSFET
remains on when current reverses in the inductor. Tying
this pin above its 0.6V threshold enables discontinuous
operation where the bottom MOSFET turns off when inductor current reverses. FCB pin below the 0.6V threshold
forces continuous synchronous operation, allowing current
to reverse at light loads and maintain low output ripple.
4606 F05
Figure 5. Coincident Tracking Characteristics
4606fb
14
LTM4606
Applications Information
PLLIN
Thermal Considerations and Output Current Derating
The power module has a phase-locked loop comprised of an
internal voltage controlled oscillator and a phase detector.
This allows the internal top MOSFET turn-on to be locked
to the rising edge of the external clock. The frequency range
is ±30% around the operating frequency. A pulse detection
circuit is used to detect a clock on the PLLIN pin to turn
on the phase lock loop. The pulse width of the clock has to
be at least 400ns and 2V in amplitude. During the start-up
of the regulator, the phase-lock loop function is disabled.
In different applications, LTM4606 operates in a variety
of thermal environments. The maximum output current is
limited by the environment thermal condition. Sufficient
cooling should be provided to help ensure reliable operation. When the cooling is limited, proper output current
derating is necessary, considering ambient temperature,
airflow, input/output condition, and the need for increased
reliability.
INTVCC and DRVCC Connection
An internal low dropout regulator produces an internal
5V supply that powers the control circuitry and DRVCC
for driving the internal power MOSFETs. Therefore, if
the system does not have a 5V power rail, the LTM4606
can be directly powered by Vin. The gate driver current
through the LDO is about 20mA. The internal LDO power
dissipation can be calculated as:
PLDO_LOSS = 20mA • (VIN – 5V)
The LTM4606 also provides an external gate driver voltage
pin DRVCC. If there is a 5V rail in the system, it is recommended to connect DRVCC pin to the external 5V rail. This is
especially true for higher input voltages. Do not apply more
than 6V to the DRVCC pin. A 5V output can be used to power
the DRVCC pin with an external circuit as shown in Figure 18.
Parallel Operation of the Module
The LTM4606 device is an inherently current mode controlled device. Parallel modules will have very good current
sharing. This will balance the thermals on the design. The
voltage feedback equation changes with the variable N as
modules are paralleled:
60.4k
VOUT = 0.6V
N
+ RFB
RFB
N is the number of paralleled modules.
The power loss curves in Figures 6 and 7 can be used
in coordination with the load current derating curves in
Figures 8 to 15 for calculating an approximate θJA for the
module. The graphs delineate between no heat sink, and
a BGA heat sink. Each of the load current derating curves
will lower the maximum load current as a function of the
increased ambient temperature to keep the maximum junction temperature of the power module at 125°C maximum.
Each of the derating curves and the power loss curve that
corresponds to the correct output voltage can be used to
solve for the approximate θJA of the condition. Each figure
has three curves that are taken at three different air flow
conditions. Tables 3 and 4 provide the approximate θJA
for Figures 8 to 15. A complete explanation of the thermal
characteristics is provided in the thermal application note
AN110.
Safety Considerations
The LTM4606 modules do not provide isolation from VIN
to VOUT. There is no internal fuse. If required, a slow blow
fuse with a rating twice the maximum input current needs
to be provided to protect each unit from catastrophic failure.
Radiated EMI Noise
High radiated EMI noise is a disadvantage for switching
regulators by nature. Fast switching turn-on and turn-off
make large di/dt change in the converters, which act as
the radiation sources in most systems. The LTM4606
integrates the feature to minimize the radiated EMI noise
for applications with low noise requirements. Optimized
gate driver for the MOSFET and noise cancellation network
are installed inside the LTM4606 to achieve low radiated
EMI noise. Figure 16 shows a typical example for LTM4606
to meet the Class B of EN55022 radiated emission limit.
4606fb
15
LTM4606
Applications Information
4.0
2.5
3.5
24V LOSS
3.0
12V LOSS
POWER LOSS (W)
POWER LOSS (W)
2.0
1.5
5V LOSS
1.0
2.5
2.0
12V LOSS
1.5
1.0
0.5
0.5
0
0
1
3
5
2
4
OUTPUT CURRENT (A)
6
0
7
0
5
5
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
6
4
3
2
5VIN, 1.5VOUT, 0LFM
5VIN, 1.5VOUT, 200LFM
5VIN, 1.5VOUT, 400LFM
75
6
80
85
90
AMBIENT TEMPERATURE (°C)
3
2
0
95
5VIN, 1.5VOUT, 0LFM
5VIN, 1.5VOUT, 200LFM
5VIN, 1.5VOUT, 400LFM
1
75
80
85
90
AMBIENT TEMPERATURE (°C)
6
5
5
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
Figure 9. BGA Heat Sink
6
4
3
2
1
75
80
85
90
AMBIENT TEMPERATURE (°C)
12VIN, 1.5VOUT, 0LFM
12VIN, 1.5VOUT, 200LFM
12VIN, 1.5VOUT, 400LFM
95
4606 F09
Figure 8. No Heat Sink
70
4606 F07
4
4606 F08
0
7
Figure 7. 3.3V Power Loss
6
0
3
5
2
4
OUTPUT CURRENT (A)
4606 F06
Figure 6. 1.5V Power Loss
1
1
95
4606 F10
Figure 10. No Heat Sink
4
3
2
12VIN, 1.5VOUT, 0LFM
12VIN, 1.5VOUT, 200LFM
12VIN, 1.5VOUT, 400LFM
1
0
70
95
75
80
85
90
AMBIENT TEMPERATURE (°C)
4606 F11
Figure 11. BGA Heat Sink
4606fb
16
LTM4606
6
6
5
5
MAXIMUM LOAD CURRENT (A)
MAXIMUM LOAD CURRENT (A)
Applications Information
4
3
2
12VIN, 3.3VOUT, 0LFM
12VIN, 3.3VOUT, 200LFM
12VIN, 3.3VOUT, 400LFM
1
0
70
3
2
12VIN, 3.3VOUT, 0LFM
12VIN, 3.3VOUT, 200LFM
12VIN, 3.3VOUT, 400LFM
1
0
95
75
80
85
90
AMBIENT TEMPERATURE (°C)
4
70
95
75
80
85
90
AMBIENT TEMPERATURE (°C)
4606 F13
4606 F12
Figure 13. BGA Heat Sink
6
5
5
MAXIMUM LOAD CURRENT (A)
6
4
3
2
24VIN, 3.3VOUT, 0LFM
24VIN, 3.3VOUT, 200LFM
24VIN, 3.3VOUT, 400LFM
1
0
60
85
65
70
75
80
AMBIENT TEMPERATURE (°C)
4
3
2
24VIN, 3.3VOUT, 0LFM
24VIN, 3.3VOUT, 200LFM
24VIN, 3.3VOUT, 400LFM
1
0
60
85
65
70
75
80
AMBIENT TEMPERATURE (°C)
90
4606 G15
4606 F14
Figure 14. No Heat Sink
Figure 15. BGA Heat Sink
50
40
SIGNAL AMPLITUDE (dBµV/m)
MAXIMUM LOAD CURRENT (A)
Figure 12. No Heat Sink
30
20
10
0
–10
–20
–30
30
226.2
422.4
618.6
814.8
1010
128.1
324.3
520.5
716.7
912.9
FREQUENCY (MHz)
4606 F16
Figure 16. Radiated Emission Scan with 12VIN
to 2.5VOUT at 6A (1×100µF X7R Ceramic COUT)
4606fb
17
LTM4606
Applications Information
Table 2. Output Voltage Response vs Component Matrix (Refer to Figure 20)
TYPICAL MEASURED VALUES
COUT1 VENDORS
TAIYO YUDEN
TAIYO YUDEN
TDK
VOUT
(V)
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.2
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
3.3
3.3
3.3
3.3
3.3
3.3
3.3
3.3
5
5
5
CIN
(CERAMIC)
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
2 × 10µF 35V
PART NUMBER
JMK316BJ226ML-T501 (22µF, 6.3V)
JMK325BJ476MM-T (47µF, 6.3V)
C3225X5R0J476M (47µF, 6.3V)
CIN
(BULK)
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
150µF 35V
COUT1
(CERAMIC)
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
1 × 22µF 6.3V
1 × 47µF 6.3V
2 × 47µF 6.3V
4 × 47µF 6.3V
4 × 47µF 6.3V
4 × 47µF 6.3V
4 × 47µF 6.3V
COUT2
(BULK)
330µF 4V
330µF 2.5V
220µF 6.3V
NONE
330µF 4V
330µF 2.5V
220µF 6.3V
NONE
330µF 4V
330µF 2.5V
220µF 6.3V
NONE
330µF 4V
330µF 2.5V
220µF 6.3V
NONE
330µF 4V
330µF 2.5V
220µF 6.3V
NONE
330µF 4V
330µF 2.5V
220µF 6.3V
NONE
330µF 4V
330µF 4V
220µF 6.3V
NONE
330µF 4V
330µF 4V
220µF 6.3V
NONE
330µF 4V
330µF 4V
220µF 6.3V
NONE
330µF 4V
330µF 4V
220µF 6.3V
NONE
NONE
NONE
NONE
COUT2 VENDORS
SANYO POSCAP
SANYO POSCAP
SANYO POSCAP
VIN
(V)
5
5
5
5
12
12
12
12
5
5
5
5
12
12
12
12
5
5
5
5
12
12
12
12
5
5
5
5
12
12
12
12
7
7
7
7
12
12
12
12
12
15
20
DROOP
(mV)
34
22
20
32
34
22
20
29.5
35
25
24
36
35
25
24
32.6
38
29.5
28
43
38
28
27
36.4
38
37.6
39.5
66
38
34.5
35.8
50
42
47
50
75
42
47
50
69
110
110
110
PART NUMBER
6TPE220MIL (220µF, 6.3V)
2R5TPE330M9 (330µF, 2.5V)
4TPE330MCL (330µF, 4V)
PEAK TO
PEAK (mV)
68
40
40
60
68
40
39
55
70
48
47.5
68
70
48
45
61.9
76
57.5
55
80
76
55
52
70
78
74
78.1
119
78
66.3
68.8
98
86
89
94
141
86
88
94
131
215
215
217
RECOVERY
TIME (µs)
30
26
24
18
30
26
24
18
30
30
26
26
30
30
26
26
37
30
26
26
37
30
26
26
40
34
28
12
40
34
28
18
40
32
28
14
40
32
28
22
20
20
20
LOAD STEP
(A/µs)
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
RFB
(kΩ)
60.4
60.4
60.4
60.4
60.4
60.4
60.4
60.4
40.2
40.2
40.2
40.2
40.2
40.2
40.2
40.2
30.1
30.1
30.1
30.1
30.1
30.1
30.1
30.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
19.1
13.3
13.3
13.3
13.3
13.3
13.3
13.3
13.3
8.25
8.25
8.25
4606fb
18
LTM4606
Applications Information
Table 3. 1.5V Output
DERATING CURVE
VIN (V)
POWER LOSS CURVE
AIR FLOW (LFM)
HEAT SINK
θJA (°C/W)
Figures 8, 10
5, 12
Figures 8, 10
5, 12
Figure 6
0
None
13.5
Figure 6
200
None
10
Figures 8, 10
Figures 9, 11
5, 12
Figure 6
400
None
9
5, 12
Figure 6
0
BGA Heat Sink
9.5
Figures 9, 11
5, 12
Figure 6
200
BGA Heat Sink
7
Figures 9, 11
5, 12
Figure 6
400
BGA Heat Sink
5
VIN (V)
POWER LOSS CURVE
AIR FLOW (LFM)
HEAT SINK
θJA (°C/W)
Table 4. 3.3V Output
DERATING CURVE
Figures 12, 14
12, 24
Figure 7
0
None
13.5
Figures 12, 14
12, 24
Figure 7
200
None
11
Figures 12, 14
12, 24
Figure 7
400
None
10
Figures 13, 15
12, 24
Figure 7
0
BGA Heat Sink
10
Figures 13, 15
12, 24
Figure 7
200
BGA Heat Sink
7
Figures 13, 15
12, 24
Figure 7
400
BGA Heat Sink
5
Heat Sink Manufacturer
Wakefield Engineering
Part No: LTN20069
Layout Checklist/Example
The high integration of LTM4606 makes the PCB board
layout very simple and easy. However, to optimize its
electrical and thermal performance, some layout considerations are still necessary.
• Use large PCB copper areas for high current path, including VIN, PGND and VOUT. It helps to minimize the
PCB conduction loss and thermal stress.
• Place high frequency ceramic input and output capacitors next to the VD, PGND and VOUT pins to minimize
high frequency noise.
• Place a dedicated power ground layer underneath the
unit.
• Use round corners for the PCB copper layer to minimize
the radiated noise.
Phone: 603-635-2800
• Use a separated SGND ground copper area for components connected to signal pins. Connect the SGND
to PGND underneath the unit.
• Place one or more high frequency ceramic capacitors
close to the connection into the system board.
Figure 17 gives a good example of the recommended
layout. For load current below 3A, decouple the input and
output grounds. Use vias to connect GND pads to the
bottom layer, then connect to the right side of the module
as the output GND.
VIN
CIN
GND
SIGNAL
GND
• To minimize the EMI noise and reduce module thermal
stress, use multiple vias for interconnection between
top layer and other power layers on different locations.
• Do not put vias directly on pads, unless they are capped.
CIN
COUT
COUT
VOUT
4606 F17
Figure 17. Recommended PCB Layout
4606fb
19
LTM4606
Applications Information
Frequency Adjustment
The LTM4606 is designed to typically operate at 800kHz
across most input conditions. The fSET pin is typically left
open or decoupled with an optional 1000pF capacitor. The
switching frequency has been optimized for maintaining
constant output ripple noise over most operating ranges.
The 800kHz switching frequency and the 400ns minimum
off time can limit operation at higher duty cycles like 5V
to 3.3V, and produce excessive inductor ripple currents
for lower duty cycle applications like 28V to 5V.
time. Figure 18 shows an operating range of 10V to 28V for
1MHz operation with a 150k resistor to ground, and an 8V to
16V operating range for fSET floating. These modifications
are made to provide wider input voltage ranges for the 5V
output designs while limiting the inductor ripple current,
and maintaining the 400ns minimum off-time.
Example for 3.3V Output
LTM4606 minimum on-time = 100ns;
tON = ((3.3 • 10pF)/IfSET)
Example for 5V Output
LTM4606 minimum off-time = 400ns;
tOFF = t – tON, where t = 1/Frequency
LTM4606 minimum on-time = 100ns;
tON = ((4.8 • 10pF)/IfSET)
Duty Cycle (DC) = tON/t or VOUT/VIN
LTM4606 minimum off-time = 400ns;
tOFF = t – tON, where t = 1/Frequency
Duty Cycle = tON/t or VOUT/VIN
Equations for setting frequency:
IfSET = (VIN/(3 • RfSET)), where the internal RfSET is 41.2k.
For 28V input operation, IfSET = 227µA. tON = ((4.8 • 10pF)/
IfSET), tON = 211ns. Frequency = (VOUT/(VIN • tON)) = (5V/
(28 • 211ns)) ~ 850kHz. The inductor ripple current begins
to get high at the higher input voltages due to a larger voltage across the inductor. The current ripple is ~5A at 20%
duty cycle if the integrated inductor is 1µH. The inductor
ripple current can be lowered at the higher input voltages by
adding an external resistor from fSET to ground to increase
the switching frequency. A 4A ripple current is chosen, and
the total peak current is equal to 1/2 of the 4A ripple current
plus the output current. For 5V output, current is limited to
5A, so the total peak current is less than 7A. This is below
the 8A peak specified value. A 150k resistor is placed from
fSET to ground, and the parallel combination of 150k and
41.2k equates to 32.3k. The IfSET calculation with 32.3k
and 28V input voltage equals 289µA. This equates to a tON
of 166ns. This will increase the switching frequency from
850kHz to ~1MHz for the 28V to 5V conversion. The
minimum on time is above 100ns at 28V input. Since
the switching frequency is approximately constant over
input and output conditions, then the lower input voltage
range is limited to 8V for the 1MHz operation due to the
400ns minimum off time. Equation: tON = (VOUT/VIN) • (1/
Frequency) equates to a 375ns on time, and a 400ns off
Equations for setting frequency:
IfSET = (VIN/(3 • RfSET)), for 28V input operation, IfSET =
227µA, tON = ((3.3 • 10pF)/IfSET), tON = 145ns, where the
internal RfSET is 41.2k. Frequency = (VOUT/(VIN • tON)) =
(3.3V/(28 • 145ns)) ~ 810kHz. The minimum on-time and
minimum-off time are within specification at 146ns and
1089ns. But the 4.5V minimum input for converting 3.3V
output will not meet the minimum off-time specification
of 400ns. tON = 905ns, Frequency = 810kHz, tOFF = 329ns.
Solution
Lower the switching frequency at lower input voltages to
allow for higher duty cycles, and meet the 400ns minimum off-time at 4.5V input voltage. The off-time should
be about 500ns with 100ns guard band. The duty cycle
for (3.3V/4.5V) = ~73%. Frequency = (1 – DC)/tOFF or
(1 – 0.73)/500ns = 540kHz. The switching frequency
needs to be lowered to 540kHz at 4.5V input. tON = DC/
frequency, or 1.35µs. The fSET pin voltage compliance
is 1/3 of VIN, and the IfSET current equates to 36µA with
the internal 41.2k. The IfSET current needs to be 24µA for
540kHz operation. A resistor can be placed from VOUT to
fSET to lower the effective IfSET current out of the fSET pin
to 24µA. The fSET pin is 4.5V/3 =1.5V and VOUT = 3.3V,
therefore a 150k resistor will source 12µA into the fSET
node and lower the IfSET current to 24µA. This enables the
540kHz operation and the 4.5V to 28V input operation for
down converting to 3.3V output as shown in Figure 19.
The frequency will scale from 540kHz to 950kHz over this
input range. This provides for an effective output current
of 5A over the input range.
4606fb
20
LTM4606
Typical Applications
VOUT
10V TO 28V
C1
10µF
R3
100k
R4
100k
VD VIN
PLLIN
VOUT
PGOOD
RUN LTM4606
VFB
COMP
INTVCC
FCB
DRVCC
MARG0
fSET
MARG1
TRACK/SS
MPGM
ON/OFF
CIN
10µF
35V
CERAMIC
x2
TRACK/SS
CONTROL
SGND
PGND
RfSET
150k
5V AT 5A
C2
100pF
RFB
8.25k
MARGIN
CONTROL
COUT1
22µF
6.3V
+
COUT2
220µF
6.3V
REFER TO TABLE 2
FOR OUTPUT CAPACITOR
SELECTIONS
R1
392k
5% MARGIN
IMPROVE EFFICIENCY
FOR ≥12V INPUT
4606 TA02
Figure 18. 10V to 28VIN, 5V at 5A Design
VOUT
4.5V TO 28V
C1
10µF
R3
100k
R4
100k
VD VIN
PLLIN
VOUT
PGOOD
RUN LTM4606
VFB
COMP
INTVCC
FCB
DRVCC
MARG0
fSET
MARG1
TRACK/SS
MPGM
SGND PGND
ON/OFF
CIN
10µF
35V
CERAMIC
x2
RfSET
150k
VOUT
TRACK/SS
CONTROL
3.3V AT 5A
C2
100pF
RFB
13.3k
MARGIN
CONTROL
R1
392k
5% MARGIN
COUT1
22µF
6.3V
x2
+
COUT2
220µF
6.3V
REFER TO TABLE 2
FOR OUTPUT CAPACITOR
SELECTIONS
4606 TA03
Figure 19. 3.3V at 5A Design
4606fb
21
LTM4606
Typical Applications
VOUT
4.5V TO 28V
CLOCK SYNC
C1
10µF
R4
100k
R3
100k
ON/OFF
CIN
10µF
35V
CERAMIC
x2
C4
0.01µF
VD VIN
PLLIN
VOUT
PGOOD
RUN LTM4606
VFB
COMP
INTVCC
FCB
DRVCC
MARG0
fSET
MARG1
TRACK/SS
MPGM
SGND PGND
2.5V AT 6A
C2
100pF
RFB
19.1k
COUT1
22µF
6.3V
+
COUT2
220µF
6.3V
MARGIN
CONTROL
R1
392k
5% MARGIN
4606 TA04
Figure 20. Typical 4.5V to 28VIN, 2.5V at 6A Design
VOUT
VIN
4.5V TO 28V
C1
10µF
R4
100k
+
2-PHASE
OSCILLATOR
R5
118k
C7
0.1µF
C5
100µF
35V
R2
100k
C2
10µF
35V
C4
0.33µF
V+ OUT1
GND OUT2
SET MOD
CLOCK SYNC
0° PHASE
VD VIN
PLLIN
PGOOD
VOUT
RUN LTM4606
VFB
COMP
FCB
INTVCC
DRVCC
MARG0
fSET
TRACK/SS
MARG1
MPGM
SGND PGND
2.5V AT 12A
C6
220pF
COUT1
22µF
6.3V
+
COUT2
220µF
6.3V
MARGIN
CONTROL
R1
392k
RFB
9.53k
5% MARGIN
C3
10µF
LTC6908-1
R3
100k
C8
10µF
35V
CLOCK SYNC
180° PHASE
VD VIN
PLLIN
VOUT
PGOOD
RUN LTM4606
VFB
COMP
FCB
INTVCC
DRVCC
fSET
TRACK/SS
SGND
MARG0
MARG1
MPGM
PGND
COUT3
22µF
6.3V
+
COUT4
220µF
6.3V
R6
392k
5% MARGIN
4606 TA05
Figure 21. 2-Phase, Parallel 2.5V at 12A Design
4606fb
22
LTM4606
Typical Applications
3.3V
VIN
5V TO 28V
C3
10µF
R4
100k
+
2-PHASE
OSCILLATOR
R5
118k
C9
0.1µF
C5
100µF
35V
R2
100k
C2
10µF
35V
C7
0.15µF
V+ OUT1
GND OUT2
SET MOD
CLOCK SYNC
0° PHASE
PLLIN
VD VIN
PGOOD
VOUT
RUN LTM4606
VFB
COMP
FCB
INTVCC
DRVCC
MARG0
fSET
TRACK/SS
MARG1
MPGM
SGND PGND
R3
100k
C4
10µF
R7
100k
C8
3.3V TRACK
10µF
35V
R8
60.4k
R9
19.1k
COUT1
100µF
6.3V
+
COUT2
220µF
6.3V
MARGIN
CONTROL
RFB1
13.3k
R1
392k
5% MARGIN
3.3V
LTC6908-1
3.3V AT 6A
C6
22pF
CLOCK SYNC
180° PHASE
VD VIN
PLLIN
VOUT
PGOOD
RUN LTM4606
COMP
INTVCC
DRVCC
fSET
TRACK/SS
SGND
2.5V AT 6A
C1
22pF
VFB
FCB
MARG0
MARG1
MPGM
PGND
COUT3
100µF
6.3V
+
COUT4
220µF
6.3V
MARGIN
CONTROL
R6
392k
RFB2
19.1k
4606 TA06
Figure 22. 2-Phase, 3.3V and 2.5V Outputs at 6A with Tracking and Margining
4606fb
23
LTM4606
Typical Applications
1.8V
4.5V TO 28V
C3
10µF
R4
100k
+
2-PHASE
OSCILLATOR
R5
182k
C9
0.1µF
C5
100µF
35V
R2
100k
C2
10µF
35V
C7
0.15µF
V+ OUT1
GND OUT2
SET MOD
CLOCK SYNC
0° PHASE
VD VIN
PLLIN
PGOOD
VOUT
RUN LTM4606
VFB
COMP
FCB
INTVCC
DRVCC
MARG0
fSET
TRACK/SS
MARG1
MPGM
SGND PGND
C4
10µF
R3
100k
C6
100pF
COUT1
100µF
6.3V
+
COUT2
220µF
6.3V
MARGIN
CONTROL
R1
392k
RFB1
30.1k
5% MARGIN
1.8V
LTC6908-1
1.8V AT 6A
R7
100k
C8
10µF 1.8V TRACK
35V
R8
60.4k
R9
40.2k
CLOCK SYNC
180° PHASE
VD VIN
PLLIN
VOUT
PGOOD
RUN LTM4606
VFB
COMP
FCB
INTVCC
DRVCC
fSET
TRACK/SS
SGND
MARG0
MARG1
MPGM
PGND
1.5V AT 6A
C1
100pF
COUT3
22µF
6.3V
+
COUT4
220µF
6.3V
MARGIN
CONTROL
R6
392k
RFB2
40.2k
4606 TA07
Figure 23. 2-Phase, 1.8V and 1.5V Outputs at 6A with Tracking and Margining
4606fb
24
LTM4606
Package Description
Pin Assignment Tables
(Arranged by Pin Function)
PIN NAME
PIN NAME
A1
A2
A3
A4
A5
A6
VIN
VIN
VIN
VIN
VIN
VIN
D1
D2
D3
D4
D5
D6
PGND
PGND
PGND
PGND
PGND
PGND
B1
B2
B3
B4
B5
B6
VIN
VIN
VIN
VIN
VIN
VIN
C1
C2
C3
C4
C5
C6
VIN
VIN
VIN
VIN
VIN
VIN
E1
E2
E3
E4
E5
E6
E7
E8
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
F1
F2
F3
F4
F5
F6
F7
F8
F9
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
H1
H2
H3
H4
H5
H6
H7
H8
H9
H10
H11
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PIN NAME
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
K1
K2
K3
K4
K5
K6
K7
K8
K9
K10
K11
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
VOUT
PIN NAME
A7
A8
A9
A10
A11
A12
INTVCC
PLLIN
TRACK/SS
RUN
COMP
MPGM
B7
B8
B9
B10
B11
B12
VD
RUN
MPGM
fSET
C7
C8
C9
C10
C11
C12
VD
DRVCC
MARG1
MARG0
D7
D8
D9
D10
D11
D12
SGND
COMP
MARG1
E9
E10
E11
E12
DRVCC
DRVCC
F10
F11
F12
VFB
G12
PGOOD
H12
SGND
J12
NC
K12
NC
L12
NC
M12
FCB
4606fb
25
6.9850
5.7150
4.4450
3.1750
1.9050
0.6350
0.0000
0.6350
1.9050
3.1750
4.4450
5.7150
6.9850
4
PAD 1
CORNER
15
BSC
PACKAGE TOP VIEW
3.1750
3.1750
SUGGESTED PCB LAYOUT
TOP VIEW
1.9050
X
15
BSC
Y
DETAIL B
2.72 – 2.92
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
LAND DESIGNATION PER JESD MO-222, SPP-010
SYMBOL TOLERANCE
aaa
0.10
bbb
0.10
eee
0.05
6. THE TOTAL NUMBER OF PADS: 133
5. PRIMARY DATUM -Z- IS SEATING PLANE
4
3
2. ALL DIMENSIONS ARE IN MILLIMETERS
3
M
L
TRAY PIN 1
BEVEL
COMPONENT
PIN “A1”
PADS
SEE NOTES
1.27
BSC
13.97
BSC
0.12 – 0.28
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
DETAIL A
0.27 – 0.37
SUBSTRATE
eee S X Y
DETAIL B
MOLD
CAP
0.630 ±0.025 SQ. 133x
aaa Z
2.45 – 2.55
bbb Z
aaa Z
0.6350
0.0000
0.6350
(Reference LTC DWG # 05-08-1766 Rev Ø)
Z
26
1.9050
LGA Package
133-Lead (15mm × 15mm × 2.82mm)
K
G
F
E
LTMXXXXXX
µModule
PACKAGE BOTTOM VIEW
H
D
C
B
LGA 133 1107 REV Ø
A
DETAIL A
PACKAGE IN TRAY LOADING ORIENTATION
J
13.97
BSC
1
2
3
4
5
6
7
8
9
10
11
12
C(0.30)
PAD 1
LTM4606
Package Description
4606fb
6.9850
5.7150
4.4450
4.4450
5.7150
6.9850
LTM4606
Revision History
REV
DATE
DESCRIPTION
A
3/10
Change to Features.
PAGE NUMBER
Change to Absolute Maximum Ratings.
B
3/11
1
2
Changes to Electrical Characteristics.
2, 3
Changes to Related Parts.
25
Text updated throughout the data sheet.
Graph replaced on the front page, Figure 2, and Figure 16.
1-28
1, 12, 17
Added value of 1µH to inductor on Figure 1.
9
Updated Related Parts.
28
4606fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTM4606
Package Photograph
Related Parts
PART NUMBER DESCRIPTION
COMMENTS
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Output Tracking
4.5V ≤ VIN ≤ 26.5V, 0.8V ≤ VOUT ≤ 5V, Synchronizable, 9mm × 15mm × 4.3mm
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LTM4604A
Low VIN 4A DC/DC µModule Regulator
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Low VIN 8A DC/DC µModule Regulator
2.375V ≤ VIN ≤ 5.5V, 0.6V ≤ VOUT ≤ 5V, 9mm × 15mm × 2.8mm LGA Package
LTM4612
Low Noise 5A, 15VOUT DC/DC µModule Regulator
Low Noise, with PLL, Output Tracking and Margining, LTM4606 Pin-Compatible
LTM4627
15A DC/DC µModule Regulator
4.5V ≤ VIN ≤ 20V, 0.6V ≤ VOUT ≤ 5V, ±1.5% Total DC Output Accuracy,
15mm × 15mm × 4.32mm LGA Package
EN55022 Class B Certified DC/DC µModule Regulators
LTM8020
High VIN 0.2A DC/DC Step-Down µModule Regulator
4V ≤ VIN ≤ 36V, 1.25V ≤ VOUT ≤ 5V, 6.25mm × 6.25mm × 2.3mm LGA Package
LTM8021
High VIN 0.5A DC/DC Step-Down µModule Regulator
3V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 5V, 6.25mm × 11.25mm × 2.8mm LGA Package
LTM8022/
LTM8023
36VIN, 1A and 2A DC/DC µModule Regulators
Pin Compatible, 4.5V ≤ VIN ≤ 36V, 9mm × 11.25mm × 2.8mm LGA Package
LTM8031/
LTM8032
1A, 2A EMC DC/DC µModule Regulators
EN55022 Class B Compliant, 3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V,
Pin Compatible, 9mm × 15mm × 2.82mm LGA Package
LTM8033
3A EMC DC/DC µModule Regulator
3.6V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 24V, 11.25mm × 15mm × 4.32mm LGA Package
4606fb
28 Linear Technology Corporation
LT 0311 REV B • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
 LINEAR TECHNOLOGY CORPORATION 2008