RENESAS M35052

To all our customers
Regarding the change of names mentioned in the document, such as Mitsubishi
Electric and Mitsubishi XX, to Renesas Technology Corp.
The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi
Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names
have in fact all been changed to Renesas Technology Corp. Thank you for your understanding.
Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been
made to the contents of the document, and these changes do not constitute any alteration to the
contents of the document itself.
Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices
and power devices.
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DESCRIPTION
FEATURES
•
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•
•
•
•
•
•
•
•
•
•
•
•
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•
APPLICATION
TV, VCR, Movie
REV.1.2
CP1
←
TESTA
CS
SCK
SIN
AC
→
→
↔
→
VDD2
CVIDEO
LECHA
CVIN
1
20
2
19
3
18
4
5
6
7
←
→
→
8
17
VDD1
←
→
←
14
CP2
OSCIN
VSS
16
15
HOR
→
→
P1
P0
TESTB
13
→
EDO
9
12
10
11
VSS
1
20
VDD1
2
19
3
18
Outline 20P4B
CP1
←
TESTA
CS
SCK
SIN
AC
→
→
↔
→
VDD2
CVIDEO
LECHA
CVIN
4
5
6
7
←
→
→
M35052-XXXFP
•
Screen composition .............................. 24 characters ✕ 10 lines,
32 characters ✕ 7 lines
Number of characters displayed .................................. 240 (Max.)
Character composition ..................................... 12 ✕ 18 dot matrix
Characters available ............................................. 128 characters
Character sizes available .................... 4 (horizontal) ✕ 4 (vertical)
Display locations available
Horizontal direction ............................................... 240 locations
Vertical direction ................................................... 256 locations
Blinking ................................................................. Character units
Cycle : approximately 1 second, or approximately 0.5 seconds
Duty : 25%, 50%, or 75%
Data input .............................. By the serial input function (16 bits)
Coloring
Background coloring (composite video signal)
Blanking
Total blanking (14 ✕ 18 dots)
Border size blanking
Character size blanking
Synchronizing signal
Composite synchronizing signal generation
(PAL, NTSC, M-PAL)
2 output ports (1 digital line)
Oscillation stop function
It is possible to stop the oscillation for synchronizing signal
generation
Built-in half-tone display function
Built-in reversed character display function
Built-in Decoder (NTSC only)
Built-in Encoder (NTSC only)
Built-in synchronous correction circuit
Built-in synchronous separation circuit
PIN CONFIGURATION (TOP VIEW)
M35052-XXXSP
The M35052-XXXSP/FP is TV screen display control IC which can
be used to display information such as number of channels, the date
and messages and program schedules on the TV screen.
In particular, owing to the built-in SYNC-SEP (synchronous separation) circuit, the synchronous correction circuit, the Decoder circuit,
and to the Encoder circuit, external circuits can be decrease and
character turbulence that occurs when superimposing can be reduced.
The processor can conform to the EDS broadcast service and is suitable for AV systems such as VTRs, LDs, and so on.
It is a silicon gate CMOS process and M35052-XXXSP is housed in
a 20-pin shrink DIP package, M35052-XXXFP is housed in a 20-pin
shrink SOP package.
For M35052-001SP/FP that is a standard ROM version of M35052XXXSP/FP respectively, the character pattern is also mentioned.
17
←
→
←
14
8
13
9
12
10
11
Outline 20P2Q-A
CP2
OSCIN
VSS
16
15
HOR
→
→
P1
P0
TEST B
→
EDO
VSS
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
PIN DESCRIPTION
Symbol
OSC1
Clock input
TESTA
Test pin
__
Input/
Output
Input
—
Function
This is the filter output pin 1.
This is the pin for test. Connect this pin to GND during normal operation.
CS
Chip select input
Input
This is the chip select pin, and when serial data transmission is being carried out, it goes
to “L”. Hysteresis input. Includes built-in pull-up resistor.
SCK
Serial clock input/
output
Input
When CS pin is “L”, SIN serial data is taken in when SCK rises. Hysteresis input. Built-in
pull-up resistor is included.
SIN
Serial data input
Input/
Output
This is the pin for serial input of data and addresses for the display control register and
the display data memory. Also, serially outputs decode data according to the settings in
the relevant registers (serial I/O).
AC
Auto-clear input
Input
When “L”, this pin resets the internal IC circuit. Hysteresis input. Includes built-in pull-up
resistor.
VDD2
Power pin
CVIDEO
Composite video
signal output
LECHA
Character level input
Input
This is the input pin which determines the “white” character color level in the composite
video signal.
CVIN
Composite video
signal input
Input
This is the input pin for external composite video signals. In superimpose mode, character
output etc. is superimposed on these external composite video signals.
VSS
Earthing pin
EDO
Encode data output
TESTB
Test pin
P0
__
2
Pin name
—
Output
—
Output
__
Please connect to +5V with the analog circuit power pin.
This is the output pin for composite video signals. It outputs 2VP-P composite video
signals. In superimpose mode, character output etc. is superimposed on the external
composite video signals from CVIN.
Please connect to GND using circuit earthing pin.
This is the output pin for encode data. It outputs three-valve data.
—
This is the pin for test. Connect this pin to GND during normal operation.
Port P0 output
Output
This pin outputs the port output or BLNK1 (character background) signal.
P1
Port P1 output
Output
This pin outputs the port output or CO1(character) signal.
VSS
Earthing pin
OSCIN
fSC input pin for
synchronous signal
generation
CP2
Filter output
HOR
Horizontal synchronizing signal input
VDD1
Power pin
—
Input
Output
Input
—
Please connect to GND using circuit earthing pin (Analog side).
This is the input pin for the sub-carrier frequency (fSC) for generating a synchronous
signal.
A frequency of 3.580MHz is needed for NTSC, and a frequency of 4.434MHz in needed
for PAL and 3.576MHz is needed for M-PAL.
Filter output pin 2.
This is the input pin for external composite video signals. This pin inputs the external
video signal clamped sync-chip to 1.5V, and internally carries out synchronous separation.
Please connect to +5V with the digital circuit power pin.
3
5
6
11
16
7
AC
VSS
VSS
VDD2
VDD1 20
TESTB 13
TESTA 2
SIN
SCK 4
CS
I/O control circuit
BLOCK DIAGRAM
Display character ROM
Display RAM
Address
control
circuit
Display control
register
Data
control
circuit
Decoder circuit
Timing
generator
CP 1
Blinking circuit
Clock oscillation circuit
1
Shift register
Display control
circuit
Reading address
control circuit
Display location
detection circuit
H counter
Data slicer
circuit
Port output
circuit
NTSC
PAL
M-PAL
video output
circuit
Timing
generator
Oscillation circuit
for synchronizing
signal generation
SYNC-SEP
circuit
19
HOR
EDO
15
P1
14 P0
12
LECHA
CVIN
10
9
CVIDEO
CP 2
OSCIN
8
18
17
3.580MHz(NTSC)
4.434MHz(PAL)
3.576MHz(M-PAL)
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
3
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
MEMORY CONSTITUTION
Address 0016 to EF16 are assigned to the display RAM, address F016
to F816 are assigned to the display control registers.
The internal circuit is reset and all display control registers (address
F016 to F816) are set to “0” and display RAM (address 0016 to EF16)
__
are RAM erased when the AC pin level is “L”.
Set “0” in any of DA7, DAD through DAF of addresses 0016 through
EF16, and of DAE and DAF of addresses F016 through F816.
Setting the blank code “FF16” as a character code is an exception.
TESTn (n : a number) is MITSUBISHI test memory, so be sure to
observe the setting conditions.
Bit
DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
Address
0016
0
0
0
REV BLINK EC2
Reversed
Blinking
character
EC1 EC0
0
C6
C5
Encode data or
character color
REV BLINK EC2
EC0
C3
C2
C1
C0
Character code
0
C6
C5
C4
C3
C2
Display RAM
EF16
0
0
F016
0
0
TEST25 W/R TEST11 TEST10 DECB1 DECB0 SYSEP1 SYSEP0 SEPV1 SEPV0 PTD1 PTD0 PTC1 PTC0 Port output specify and so on
F116
0
0
TEST26 DVP4 DVP3 DVP2 DVP1 DVP0 HP7
HP6
HP5
HP4
HP3
HP2
HP1
HP0
F216
0
0
TEST27 EVP4 EVP3 EVP2 EVP1 EVP0
VP6
VP5
VP4
VP3
VP2
VP1
VP0
F316
0
0
TEST28 TEST12 EFLD1 EFLD0 DFLD1 DFLD0 VSZ21 VSZ20 VSZ11 VSZ10 HSZ21 HSZ20 HSZ11 HSZ10
F416
0
0
TEST29 TEST14 TEST13 SPACE DSP9 DSP8 DSP7 DSP6 DSP5 DSP4 DSP3 DSP2 DSP1 DSP0 Display mode specify
F516
0
0
TEST30 TEST19 MB/LB TEST17 TEST16 TEST15 EQP PALH MPAL INT/NON N/P BLINK2 BLINK1 BLINK0 Blinking specify and so on
0
EC1
C4
Remarks
C1
C0
__________
VP7
_______
______________
Horizontal display start position and
Decode position specify
Vertical display start position and
Encode position specify
Character size and Encode EDecode
specify
_______
________
F616
0
0
TEST31 TEST2 TEST1 TEST0 LBLACK LIN24/32 BLKHF
BB
BG
BR
LEVEL0 PHASE2 PHASE1 PHASE0 Raster color specify
__________
F716
0
0
TEST32 TEST24 RGBON TEST22 CL17/18 CBLINK CURS7 CURS6 CURS5 CURS4 CURS3 CURS2 CURS1 CURS0 Cursor display specify
F816
0
0
LEVEL1 EHP4 EHP3 EHP2 EHP1 EHP0 RAMERS DSPON STOP1 STOPIN SCOR
Fig. 1 Memory constitution (M35052-XXXSP/FP)
4
EX
BLK1 BLK0 Control display and so on
14
15
16
17
18
19
20
21
22
23
24
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Fig. 3 Screen constitution (32 characters ✕ 7 lines)
Notes 1. The hexadecimal numbers in the boxes show the display RAM address.
Notes 2. When 32 characters ✕ 7 lines are displayed, set blank code “FF16” to character code of addresses E016 to EF16.
7 C016 C116 C216 C316 C416 C516 C616 C716 C816 C916 CA16 CB16 CC16 CD16 CE16 CF16 D016 D116 D216 D316 D416 D516 D616 D716 D816 D916 DA16 DB16 DC16 DD16 DE16 DF16
6 A016 A116 A216 A316 A416 A516 A616 A716 A816 A916 AA16 AB16 AC16 AD16 AE16 AF16 B016 B116 B216 B316 B416 B516 B616 B716 B816 B916 BA16 BB16 BC16 BD16 BE16 BF16
8016 8116 8216 8316 8416 8516 8616 8716 8816 8916 8A16 8B16 8C16 8D16 8E16 8F16 9016 9116 9216 9316 9416 9516 9616 9716 9816 9916 9A16 9B16 9C16 9D16 9E16 9F16
10
6016 6116 6216 6316 6416 6516 6616 6716 6816 6916 6A16 6B16 6C16 6D16 6E16 6F16 7016 7116 7216 7316 7416 7516 7616 7716 7816 7916 7A16 7B16 7C16 7D16 7E16 7F16
9
5
8
4
7
4016 4116 4216 4316 4416 4516 4616 4716 4816 4916 4A16 4B16 4C16 4D16 4E16 4F16 5016 5116 5216 5316 5416 5516 5616 5716 5816 5916 5A16 5B16 5C16 5D16 5E16 5F16
6
2016 2116 2216 2316 2416 2516 2616 2716 2816 2916 2A16 2B16 2C16 2D16 2E16 2F16 3016 3116 3216 3316 3416 3516 3616 3716 3816 3916 3A16 3B16 3C16 3D16 3E16 3F16
5
3
4
2
3
0016 0116 0216 0316 0416 0516 0616 0716 0816 0916 0A16 0B16 0C16 0D16 0E16 0F16 1016 1116 1216 1316 1416 1516 1616 1716 1816 1916 1A16 1B16 1C16 1D16 1E16 1F16
2
1
1
The screen lines and rows are determined from each address of the
display RAM. The screen consitution (24 characters ✕ 10 lines) is
shown in Figure 2 the screen constitution (32 characters ✕ 7 lines) is
shown in 3.
Lines
Rows
Fig. 2 Screen constitution (24 characters ✕ 10 lines)
Note : The hexadecimal numbers in the boxes show the display RAM address.
10 D816 D916 DA16 DB16 DC16DD16 DE16 DF16 E016 E116 E216 E316 E416 E516 E616 E716 E816 E916 EA16 EB16EC16 ED16 EE16 EF16
9 C016 C116 C216 C316 C416 C516 C616 C716 C816 C916 CA16 CB16 CC16CD16 CE16 CF16 D016 D116 D216 D316 D416 D516 D616 D716
8 A816 A916 AA16 AB16 AC16 AD16 AE16 AF16 B016 B116 B216 B316 B416 B516 B616 B716 B816 B916 BA16 BB16BC16 BD16 BE16 BF16
7816 7916 7A16 7B16 7C16 7D16 7E16 7F16 8016 8116 8216 8316 8416 8516 8616 8716 8816 8916 8A16 8B16 8C16 8D16 8E16 8F16
13
9016 9116 9216 9316 9416 9516 9616 9716 9816 9916 9A16 9B16 9C16 9D16 9E16 9F16 A016 A116 A216 A316 A416 A516 A616 A716
12
7
11
6
10
6016 6116 6216 6316 6416 6516 6616 6716 6816 6916 6A16 6B16 6C16 6D16 6E16 6F16 7016 7116 7216 7316 7416 7516 7616 7716
9
4816 4916 4A16 4B16 4C16 4D16 4E16 4F16 5016 5116 5216 5316 5416 5516 5616 5716 5816 5916 5A16 5B16 5C16 5D16 5E16 5F16
8
5
7
4
6
3016 3116 3216 3316 3416 3516 3616 3716 3816 3916 3A16 3B16 3C16 3D16 3E16 3F16 4016 4116 4216 4316 4416 4516 4616 4716
5
1816 1916 1A16 1B16 1C16 1D16 1E16 1F16 2016 2116 2216 2316 2416 2516 2616 2716 2816 2916 2A16 2B16 2C16 2D16 2E16 2F16
4
3
3
2
2
0016 0116 0216 0316 0416 0516 0616 0716 0816 0916 0A16 0B16 0C16 0D16 0E16 0F16 1016 1116 1216 1316 1416 1516 1616 1716
1
1
Lines
Rows
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
SCREEN CONSTITUTION
5
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Display RAM DESCRIPTION
Display RAM Address 0016 to EF16
DA
0
1
Contents
Name
Status
Function
C0
0
(LSB)
1
Set ROM-held character code of a character needed
to display.
0~C
Remarks
0
C1
1
2
0
C2
1
3
0
C3
1
4
0
C4
1
5
0
C5
1
6
7
8
C6
0
(MSB)
1
—
EC0
0
Set to “0” during normal operation
1
Can not be used
0
When EFILD1, 0=1, 0 or 0, 1, set code of the data
needed to encode.
Refer to encode function.
When RGBON=1, set background color by character
unit.
Refer to supplemental
explanation (4).
0
No blinking
1
Blinking
Refer to BLINK2 to 0
(address F516)
0
Normal character
1
Reversed character
1
9
EC1
0
(Note 2)
1
A
EC2
0
1
B
C
BLINK
REV
__
Notes 1. Resetting at the AC pin RAM-erases the display RAM, and the status turns as indicated by the mark
2. Set to “1” only when you set a blank code.
6
around in the status column.
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Display control register
(1) Address F016
DA
0
1
2
3
4
5
6
Contents
Register
0~D
Status
PTC0
PTC1
PTD0
PTD1
SEPV0
SEPV1
SYSEP0
0
P0 output (port 0)
1
BLNK1 output
0
P1 output (port 1)
1
CO1 output
Refer to supplemental explanation (5).
0
It is negative polarity at P0 output “L”, BLINK1 output.
Control the port data
1
It is positive polarity at P0 output “H”, BLINK1 output.
0
It is negative polarity at P01 output “L”, CO1 output.
1
It is positive polarity at P01 output “H”, CO1 output.
Refer to supplemental explanation (5).
0
It should be fixed to “0”.
1
Can not be used.
Specifies the vertical synchronous
separation criterion
0
It should be fixed to “0”.
1
Can not be used.
0
1
7
SYSEP1
0
1
8
DECB0
0
1
9
DECB1
0
1
A
B
TEST10
TEST11
____
C
Port output control
Refer to supplemental explanation (1).
SYSEP1
0
0
1
1
SYSEP0
0
1
0
1
Bias potential
Can not be used.
Can not be used.
1.75µ
Can not be used.
Specifies the sync-bias potential
DECB1
0
0
1
1
DECB0
0
1
0
1
Bias potential
2.35µ
Can not be used.
Can not be used.
Can not be used.
Specifies the decoding bias
potential
0
Can not be used.
1
It should be fixed to “1”.
0
It should be fixed to “0”.
1
Can not be used.
Input data from SIN pin
Control data I/O
Output data from SIN pin (Note 2)
Refer to decode data output
timing.
0
W/R
1
D
Remarks
Function
TEST25
0
It should be fixed to “0”.
1
Can not be used.
__
Notes 1. The mark
around the status value means
the reset ___
status by the “L” level is input to AC pin.
__
Notes 2. Not necessary to release after setting W/R to “1”. Turn CS to “H” to switch over to input mode.
7
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(2) Address F116
DA
0~D
0
1
Register
Contents
Status
HP0
0
(LSB)
1
HP1
0
Remarks
Function
Let horizontal display start position be HS,
HOR
7
HS = T ✕ (Σ2nHPn+6)
n=0
1
2
HP2
0
1
HP3
VS
0
VERT
3
1
4
HP4
0
HS
1
5
HP5
Set the horizontal display start
position by use of HP7 through
HP0. HP7 to HP0 = (00000000)
to (00001111) setting is
forbidden.
It can be set this up to 240 steps
in increments of one T.
Character
displaying
area
0
1
6
HP6
0
1
7
8
9
HP7
0
(MSB)
1
DVP0
0
(LSB)
1
DVP1
0
T : The oscillation cycle of display clock
Let the slice lines be DVS,
4
DVS = Σ2nDVPn+6
n=0
1
A
DVP2
0
Thus, it can be defined a setting
up to 26 steps covered by a
range from line 10 to line 35.
1
B
DVP3
0
Refer to supplemental
explanation (2) about slice lines
(DVS).
1
C
D
DVP4
0
(MSB)
1
It should be fixed to “0”.
0
Can not be used.
TEST26
1
8
Set the slice lines (horizontal
scanning lines) under decoding
by use of DVP4 through DVP0.
DVP4 to DVP0 = (00000) to
(00011) setting is forbidden.
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(3) Address F216
DA
0~D
0
1
Contents
Register
Status
VP0
0
(LSB)
1
VP1
0
Remarks
Function
Let vertical display start position be VS,
HOR
7
HS = T ✕ Σ2nVpn
n=0
1
2
VP2
0
1
VP3
0
1
4
VP4
VS
0
VERT
3
HS
1
5
VP5
Set the vertical display start
position by use of VP7 through
VP0. VP7 to VP0 = (00000000)
to (00000110) setting is
forbidden.
Character
displaying
area
It can be set this up to 249 steps
in increments of one H.
VP7 to VP0 = (00000000) to
(00100011) setting is forbidden.
0
1
6
VP6
0
1
7
8
9
VP7
0
(MSB)
1
EVP0
0
(LSB)
1
EVP1
0
H : The oscillation cycle of horizontal
synchronous signal
Let the encode lines be EVS,
4
DVS= Σ2nEVpn+6
n=0
1
A
EVP2
Thus, it can be defined a setting
up to 26 steps covered by a
range from line 10 to line 35.
0
1
B
EVP3
0
Refer to supplemental
explanation (2) about the encode
lines (EVS).
1
C
D
EVP4
0
(MSB)
1
TEST27
Sets the lines (horizontal
scanning lines) under encoding
by use of EVP4 through EVP0.
EVP4 to EVP0 = (00000) to
(00011) setting is forbidden.
0
It should be fixed to “0”.
1
Can not be used.
9
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(4) Address F316
DA
Status
0~D
0
1
2
3
4
5
6
7
8
9
A
B
C
D
10
Contents
Register
HSZ10
HSZ11
HSZ20
HSZ21
VSZ10
VSZ11
VSZ20
VSZ21
DFLD0
DFLD1
EFILD0
EFLD1
TEST12
TEST28
Remarks
Function
0
HSZ11
HSZ10
Horizontal direction size
1
0
0
1T/dot
0
1
2T/dot
0
1
0
3T/dot
1
1
1
4T/dot
0
HSZ21
HSZ20
Horizontal direction size
1
0
0
1T/dot
0
1
2T/dot
0
1
0
3T/dot
1
1
1
4T/dot
0
VSZ11
VSZ10
Vertical direction size
1
0
0
1H/dot
0
1
2H/dot
0
1
0
3H/dot
1
1
1
4H/dot
0
VSZ21
VSZ20
Vertical direction size
1
0
0
1H/dot
0
1
2H/dot
0
1
0
3H/dot
1
1
1
4H/dot
0
DFLD1
DFLD0
Field detection
1
0
0
OFF
0
1
The first field
0
1
0
The second field
1
1
1
Can not be used
0
EFLD1
EFLD0
Field detection
1
0
0
OFF
0
1
The first field
0
1
0
The second field
1
1
1
Can not be used
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
Character size setting in the
horizontal direction for the first
line.
Character size setting in the
horizontal direction for the 2nd
line to 10th line.
Character size setting in the
vertical direction for the first line.
Character size setting in the
vertical direction for the 2nd line
to 10th line.
Specifies the field determination
procedure in relation to the
Decoding functions.
Refer to supplemental
explanation (2).
Specifies the field determination
procedure in relation to the
Encoding functions.
Refer to supplemental
explanation (2).
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(5) Address F416
DA
0~D
0
Contents
Register
Status
DSP0
Remarks
Function
0
Set the display mode of line 1.
1
1
DSP1
0
1
2
DSP2
0
1
3
DSP3
0
1
4
DSP4
0
BLK1
BLK0
DSPn= “1”
DSPn= “0”
0
0
Matrix-outline border
size
Matrix-outline size
0
1
1
0
Character size
Border size
Matrix-outline size
Border size
1
1
Character size Matrix-outline size
Depends on BLK0 and BLK1 (address F816)
DSPn in the generic name for DSP0 to DSP9.
DSP0 to DSP9 are each controlled independently.
Set the display mode of line 2.
Set the display mode of line 3.
Set the display mode of line 4.
Set the display mode of line 5.
1
5
DSP5
Set the display mode of line 6.
0
1
6
DSP6
0
Set the display mode of line 7.
1
7
DSP7
0
Set the display mode of line 8.
1
8
DSP8
Set the display mode of line 9.
0
1
9
DSP9
0
Set the display mode of line 10.
1
A
0
Normal display
1
Put a space line between line 2 and line 3, and
between line 8 and line 9.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
SPACE
B
TEST13
C
TEST14
D
TEST29
Put a space line between line 2
and line 3 in displaying 32
characters.
11
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(6) Address F516
DA
0~D
0
1
2
BLINK0
BLINK1
______________________
4
0
BLINK0
BLINK1
Duty
1
0
0
Blinking off
0
1
25%
0
1
0
50%
1
1
1
75%
0
Division of vertical synchronizing signal into 1/64.
Cycle approximately 1 second.
1
Division of vertical synchronizing signal into 1/32.
Cycle approximately 0.5 second.
0
NTSC, M-PAL mode
1
PAL mode
0
Interlace
1
Non interlace
BLINK2
N/P
INT/NON
Remarks
Function
Status
_____
3
Contents
Register
5
MPAL
1
Scanning lines control (only in
internal synchronization)
N/P
MPAL
Synchronous mode
0
0
NTSC
0
1
M-PAL
1
0
PAL
1
1
Not available
INT/NON
Number of scanning lines
0
625H lines
1
626H lines
0
627H lines
1
628H lines
__
PALH
0
6
0
PALH
1
7
8
9
A
EQP
TEST15
TEST16
TEST17
______________
B
C
D
MB/LB
TEST19
TEST30
1
0
Not include the equivalent pulse.
1
Include the equivalent pulse.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
Output from MSB side
1
Output from LSB side
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
Note. To flash a character, set 1 to DAB (the flash bit) of the display RAM.
12
Blinking cycle can be altered.
Refer to register MPAL
_
0
Blinking duty ratio can be
altered. (Note)
Synchronizing signal is
selected
_
with this register and N/P
register.
It should be fixed to “0” at NTSC
Effective only at non-interlace
Setting the decode data output
form
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(7) Address F616
DA
Contents
Register
0~D
0
0
PHASE0
1
0
1
PHASE1
1
0
2
PHASE2
1
3
LEVEL0
4
BG
1
0
BB
1
7
BLKHF
__________
8
9
A
B
C
D
LIN24/32
LBLACK
TEST0
TEST1
TEST2
TEST31
0
Black
0
0
1
Red
0
1
0
Green
0
1
1
Yellow
1
0
0
Blue
1
0
1
Magenta
1
1
0
Cyan
1
1
1
White
Internal bias on
0
6
0
1
BR
Raster
0
Internal bias off
1
5
Raster color setting
PHASE2 PHASE1 PHASE0
0
0
Remarks
Function
Status
Refer to supplemental
explanation (3) about video
signal level
Generates bias potential for
composite video signals
BB
BG
BR
Character background color
0
0
0
Black
0
0
1
Red
0
1
0
Green
0
1
1
Yellow
1
0
0
Blue
1
0
1
Magenta
1
1
0
Cyan
1
1
1
White
Character background color
setting.
Refer to supplemental
explanation (3) about video
signal level
0
The halftone displaying “OFF” in superimpose
1
The halftone displaying “ON” in superimpose
0
24 characters ✕ 10 lines display
1
32 characters ✕ 7 lines display
“1” setting is forbidden under
encoding.
0
Blanking level I 2.3V
Set a blackness level
1
Blanking level II 2.1V
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
0
Can not be used.
1
It should to be fixed to “1”.
This register is available in the
superimpose displaying only. (Note)
Note. It is neccessary to input the external composite video signal to the CVIN pin, and externally connect a 100 to 200Ω register in series.
13
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(8) Address F716
DA
0~D
0
Contents
Register
Function
Status
CUR0
0
Let cursor displaying address be CURS,
1
1
CUR1
0
7
1
2
CUR2
CURS = T ✕ Σ2nCURn
n=0
0
CUR3
0
1
4
CUR4
CUR5
CUR7 to CUR0
(11110000)
setting is forbidden under 24
characters display.
Set CUR7 to CUR0 = (11111111)
under cursor is not be displayed.
0
1
5
Set the cursor displaying
address by use of CUR7 through
CUR0.
CUR7 to CUR0
(11100000)
setting is forbidden under 32
characters display.
1
3
Remarks
The cursor displaying address
(CURS) is correspond to display
construction.
0
1
6
CUR6
0
1
7
CUR7
0
1
8
CBLINK
__________
9
A
B
C
D
14
CL17/18
TEST22
RGBON
TEST24
TEST32
0
No blinking
1
Blinking
0
Cursor displaying at the 17th dot by vertical direction.
1
Cursor displaying at the 18th dot by vertical direction.
0
It should be fixed to “0”.
1
Can not be used.
0
Normal
1
Character background coloring
0
It should be fixed to “0”.
1
Can not be used.
0
It should be fixed to “0”.
1
Can not be used.
The cursor blinking setting
Refer to character construction.
Refer to supplemental
explanation (4).
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(9) Address F816
DA
Contents
Register
0~D
0
0
BLK0
1
0
1
BLK1
Remarks
Function
Status
BLK1
BLK0
DSPn= “1”
0
0
0
1
Border size
Character size
1
0
Matrix-outline size
Border size
1
1
Character size Matrix-outline size
Matrix-outline
border size
DSPn= “0”
Display mode
(BLNK output) variable
Matrix-outline size
1
2
3
4
5
6
7
8
EX
SCOR
STOPIN
STOP1
DSPON
RAMERS
EHP0
0
External synchronization
1
Internal synchronization
0
Superimpose monotone display
1
Superimpose coloring display (only NTSC)
“1” setting is forbidden at internal
synchronous or PAL, M-PAL
mode displaying.
0
fSC input mode
OSCIN oscillation control
1
Can not be used.
0
Oscillation VCO for display
1
Stop oscillation VCO for display
0
Display OFF
1
Display ON
0
RAM not erased
1
RAM erased
0
Let encode data programming start position be EHS,
1
Synchronizing signal switching
(Note1)
Control oscillation VCO for
display
This register does not exist
(Note 3).
Set encode start position by use
of EHP4 through EHP0.
4
9
EHP1
0
EHS = T ✕ n=0
Σ2nEHPn+6
1
A
EHP2
0
EHP4 to EHP0 = (00000) to
(01111) is setting forbidden.
Refer to encode function (3)
1
B
EHP3
0
1
C
EHP4
0
1
D
LEVEL1
0
Internal bias OFF
Generates bias potential for decoding and synchronous separation.
Internal bias ON
1
Notes 1. In dealing with the internal synchronization, cut off external video signals outside the IC. The leakage of external input video signals
can be avoided.
Notes 2. In displaying color superimposition, enter into the OSCIN pin the fSC signal that phase-synchronizes with the color burst of the
composite video signals (input to the CVIN pin).
Notes 3. Erases all the display RAM. The character code turns to blank-FF16, the encode data bit and the blinking bit turn to “1” respectively,
and reversed character bit turns to “0”.
15
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Supplemental explanation about display control register
(1) How to effect synchronous separation from composite video signals
Synchronous separation is effected as follows depending on the width of L-level of the vertical synchronous period.
1. Less than 8.4 ˚s ······ Not to be determined to be a vertical synchronous signal.
2. Equal to or higher than 8.4 ˚s but less than 15.6 ˚s ······ When two clocks continue, if take place, it is “L” period is determined to be a
vertical synchronization signal.
3. Equal to or higher than 15.6 ˚s ······ It is “L” period is determined to be a vertical synchronous signal with no condition.
The determination is made at the timing indicated by V in Fig.3 either in case 2 or in case 3.
Sequence of synchronizing pulse
Composite video signal
8.4µs
8.4µs
Equalizing pulse
V
15.6µs
Vertical synchronous signal
Fig. 4 The method of synchronous separation from composite video signal.
(2) Field definition
1/2H
1H
Pulses during a vertical
retrace line erasure period
First field
1
2
3
4
5
6
7
8
9
✽
10 11
1'
2'
3'
4'
5'
6'
7'
8'
9'
10'
Second field
8–12H
1/2H
1H
stands for either an equalizing pulse or sequence of synchronizing
pulse to be used as a trigger of a receiving set. H stands for a horizontal scanning period.
Fig. 5 Field definition
16
✽A horizontal scanning line number corresponds to slice lines DVP4 through
DVP0 (address F116) and to encode lines EVP4 through EVP0 (address F216).
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(3) Video signal level
VDD : 5.0V, Ta : 25°C
Phase angle (rad)
Color
Brightness level (V)
Amplitude ratio (to color burst)
NTSC method
PAL, M-PAL method
Min.
Typ.
Max.
Min.
Typ.
Max.
Sync-chip
–
–
1.3
1.5
1.7
–
–
–
Pedestal
–
–
1.9
2.1
2.3
–
–
–
Color burst
0
±4π/16
1.9
2.1
2.3
–
1.0
–
Black
–
–
2.1
2.3
2.5
–
–
–
Red
7π/16±2π/16
2.5
2.7
1.5
3.0
4.5
27π/16±2π/16
±7π/16±2π/16
– 5π/16±2π/16
+
2.3
Green
2.7
2.9
3.1
1.4
2.8
4.2
±π/16±2π/16
–15π/16±2π/16
+
3.1
3.3
3.5
1.0
2.0
3.0
2.0
2.2
2.4
1.0
2.0
3.0
2.5
2.7
2.9
1.4
2.8
4.2
2.9
3.1
3.3
1.5
3.0
4.5
3.1
3.3
3.5
–
–
–
Yellow
π/16±2π/16
Blue
17π/16±2π/16
Magenta
11π/16±2π/16
Cyan
23π/16±2π/16
±11π/16±2π/16
– 9π/16±2π/16
+
White
–
–
R-Y
CB1
RS1
π/4
CB
B-Y
-π/4
CB2
RS2
CB … Color burst under NTSC
CB1,CB2 … Color burst under PAL or M-PAL
RS1,RS2 … Color subcarrier under PAL or M-PAL
Fig. 6 Bector phases
(4) Setting RGBON (address F716)
a) When encode is off .... EFILD1, 0 (address F316) = 0,0
Encode setting ... Not effected
RGBON = “0” ..... Sets background colors depending on BB, BG,
and BR (address F616), screen by screen.
RGBON = “1” ..... Sets background colors depending on EC2 to
EC0 (address 0016 to EF16), character by character. The color setting is shown below.
b) When encode is on ... EFILD1, 0 (address F316) = 0, 1 or 1, 0
Encode setting ... Sets encode data depending on EC2 through
EC0. (Refer to the encode functions for details.)
RGBON = “0” ..... Sets background colors depending on BB, BG
and BR (address F616) screen by screen.
RGBON = “1” ..... This setting can not be used.
(When encode is on, setting RGBON to “1” results in setting both encode data and background colors depending on the same memory
(EC2 through EC0), so this setting can not be
used.
Color Setting
EC2
EC1
EC0
Color
0
0
0
Black
0
0
1
Red
0
1
0
Green
0
1
1
Yellow
1
0
0
Blue
1
0
1
Magenta
1
1
0
Cyan
1
1
1
White
17
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(5) Port output and BLNK1, CO1 output
PTD0 (PTD1)
BLNK1 (CO1)
PTC0 iPTC1 j
1
1
Output
0
0
Polarity switching
PTD0 (PTD1)
Select
PTD0,1, PTC0,1 (Address F016)
Fig. 7 Example of port control
(6) Setting conditions for oscillating or stopping the display clock
at display clock operating
at display clock stop
STOP1
0
1
DSPON
1
0
CS pin
L
H
STOP1, DSPON (Address F816)
(7) Setting condition at LEVEL0,1
Internal synchronous
External synchronous
Now-working condition
(no characters are
displayed)
LEVEL0
1
1
0
LEVEL1
0
1
0
Operation state (Character display)
LEVEL0 (address F616), LEVEL1 (address F816)
18
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DISPLAY FORMS
M35052-XXXSP/FP has the following four display forms as the blanking function, when CO1 and BLNK1 are output.
(1) Character size
: Blanking same as the character size.
(2) Border size
: Blanking the background as a size from character.
(3) Matrix-outline size: Blanking the background as a size from all
character font size.
(4) Matrix-outline
: Blanking the background as a size from all
border size
character font size.
Border display.
12 dots
12 dots
a
a
This display format allows each line to be controlled independently,
so that two kinds of display formats can be combined on the same
screen.
14 dots
14 dots
Scanning
line
18 dots
CO1✽
BLNK1✽
CVIDEO
a
(1) Character size
a
(2) Border size
(3) Matrix-outline size
(4) Matrix-outline border size
Note: In this case, the output polarity that CO1✽@ and BLNK1 @ is positive.
a: Background carrier
color signal
Fig. 8 Display forms at each display mode
19
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DATA INPUT EXAMPLE
Data of display RAM and display control registers can be set by then
serial input function. Example of data setting is shown in Figure 9.
Owing to automatic address increment, not necessary to enter addresses for the second and subsequent data.
In automatically, the next of address F816 is assigned to address
0016.
Fig. 9 shows an example of data serially entered.
DA
F
DA
E
DA
D
DA
C
DA
B
DA
A
DA
9
DA
8
DA
7
DA
6
DA
5
DA
4
DA
3
DA
2
DA
1
DA
0
Remarks
Address (F816)
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
Specify address
Data (F816)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Display OFF
0
0
0
REV BLINK EC2 EC1 EC0
0
C6
C5
C4
C3
C2
C1
C0
0
0
0
REV BLINK EC2 EC1 EC0
0
C6
C5
C4
C3
C2
C1
C0
Data (0116)
Specify address
display RAM 0 to
EF16.
Data (EE16)
0
0
0
REV BLINK EC2 EC1 EC0
0
C6
C5
C4
C3
C2
C1
C0
Data (EF16)
0
0
0
REV BLINK EC2 EC1 EC0
0
C6
C5
C4
C3
C2
C1
C0
Data (F016)
0
0
0
W/R
1
0
0
0
Data (F116)
0
0
0
DVP DVP DVP DVP DVP
4
3
0
2
1
HP
7
HP
6
HP
5
HP
4
HP
3
HP
2
HP
1
HP
0
Data (F216)
0
0
0
EVP EVP EVP EVP EVP
4
3
0
2
1
VP
7
VP
6
VP
5
VP
4
VP
3
VP
2
VP
1
VP
0
Data (F316)
0
0
0
0
Data (F416)
0
0
0
0
Data (F516)
0
0
0
0
MB/LB
0
0
Data (F616)
0
0
1
0
0
0
LBLACK
Data (F716)
0
0
0
0
RGBON
0
_____
Data (F816)
0
0
______
0
1
0
0
PTD PTD PTC PTC
0
1
1
0
EFLD EFLD DFLD DFLD VSZ VSZ VSZ VSZ HSZ HSZ HSZ HSZ
11
20
1
0
20
10
11
21
10
0
1
21
0
Specify address
register F016 to
DSP DSP DSP DSP DSP DSP DSP DSP DSP DSP F716.
SPACE
5
2
8
6
4
1
3
0
9
7
_______
_____
EQP PALH MPAL
LIN
BLKHF
24/32
_____
BB
BG
INT ____
BLINK BLINK BLINK
N/P
2
1
0
/NON
BR
LEVEL PHASE PHASE PHASE
0
2
1
0
CL
CURS CURS CURS CURS CURS CURS CURS CURS
CBLINK
17/18
7
6
5
4
3
2
1
0
STOP STOP
LEVEL EHP EHP EHP EHP EHP RAM
DSPON
SCOR
1
ERS
1
IN
0
1
3
2
4
Fig. 9 Example of data setting serial input function
20
0
EX
BLK
1
BLK
0
Display ON
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
SERIAL DATA INPUT TIMING
(1) The address consists of 16 bits.
(2) The data consists of 16 bits.
__
(3) The 16 bits in the SCK after the CS signal has fallen are the address, and for succeeding input data, the address is incremented
every 16 bits.
CS
SCK
SIN
LSB
MSB LSB
Address (16 bit)
MSB
LSB
MSB
Data N+1 (16 bit)
Data N (16 bit)
N=1, 2, 3 ......
Fig. 10 Serial input timing
Output timing of decode data
__
(1) Setting “1” in the W/R register activates output mode.
(2) Outputs decode data in 16 clocks of the SCK after switching over
to output mode. (Don’t enter the SCK for more than 16 clocks.)
__
(3) Raising the CS signal deactivates output mode.
__
(To switch over to input mode, cause CS to fall.)
(4) If no data are present, or if data have already been read, 000016
is output.
CS
SCK
1
2
...
15
16
SIN
MSB
Data (16 bit)
MSB
LSB
Decode data (16 bit)
LSB
Address (16 bit)
(Register W/R =“1”)
Output mode
When register MB/LB (Address F516) = “0”
Fig. 11 Decode data output timing
21
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Encode functions (effective for NTSC only)
(1) Setting encode data
Setting data code (000 – 111) in EC0 through EC2 (bits DA8 through
DAA) of the display RAM (addresses 0 through EF16) encodes. A
sample setting and data code are shown below.
An example of setting
1H
16 bit data
LSB
(address) (Note)
EC2~EC0=
(0)
(1)
(2)
(4)
(3)
MSB
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
2 bit / a character
(Set one code of 000 to 011)
100 100 100 101 001
5 characters
8 characters
Set by every 2 bits (one character) with EC2 to EC0.
fixed
A suite of data code (000 – 111) for encoding to be set in EC2 through EC0 are assigned as given below.
Data
EC2
EC1
EC0
0
0
0
L
0
0
1
L H
0
1
0
H L
0
1
1
H H
1
0
0
LHLH
1
0
1
L H L  18 dots
1
1
0
1
1
1
L







The oscillation frequency when 
encoding: 3 MHz✽

1 clock cycle: 0.333µs

1 character (12 dots): 3.996µs 

2 bits/1 character: 3.996µs

1 bit: 1.998µs
✽····· 192 ✕ fH (horizontal synchronous
frequency)
for fH = 15.625 kHz




12 dots
Can not be used
No encoding
Note: Refer to the next page about address setting.
Fig. 12 An example of data code setting
22
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(2) Setting addresses
Set encode data in EC0 through EC2 of addresses (that correspond
to an extent from the first character to the thirteenth character in each
line as appearing on the screen.) Set “111” to EC2 through EC0 of all
the addresses in which you set no encode data.
Screen
The first character .......................................................... The 13th character ................................................ The 24th character
line 1
0016 0116 0216 0316 0416 0516 0616 0716 0816 0916 0A16 0B16 0C 16 0D 16 0E16 0F16 1016 1116 1216 1316 1416 1516 1616 1716
line 2
1816 1916 1A16 1B16 1C16 1D16 1E16 1F16 2016 2116 2216 2316 2416 2516 2616 2716 2816 2916 2A16 2B16 2C 16 2D 16 2E16 2F16
line 3
3016 3116 3216 3316 3416 3516 3616 3716 3816 3916 3A16 3B16 3C 16 3D 16 3E16 3F16 4016 4116 4216 4316 4416 4516 4616 4716
line 4
4816 4916 4A16 4B16 4C16 4D16 4E16 4F16 5016 5116 5216 5316 5416 5516 5616 5716 5816 5916 5A16 5B16 5C 16 5D 16 5E16 5F16
line 5
6016 6116 6216 6316 6416 6516 6616 6716 6816 6916 6A16 6B16 6C 16 6D 16 6E16 6F16 7016 7116 7216 7316 7416 7516 7616 7716
line 6
7816 7916 7A16 7B16 7C16 7D16 7E16 7F16 8016 8116 8216 8316 8416 8516 8616 8716 8816 8916 8A16 8B16 8C 16 8D 16 8E16 8F16
line 7
9016 9116 9216 9316 9416 9516 9616 9716 9816 9916 9A16 9B16 9C 16 9D 16 9E16 9F16 A016 A116 A216 A316 A416 A516 A616 A716
line 8
A816 A916 AA16 AB16 AC16 AD16 AE16 AF16 B016 B116 B216 B316 B416 B516 B616 B716 B816 B916 BA16 BB16 BC16 BD16 BE16 BF 16
line 9
C016 C116 C216 C316 C416 C516 C616 C716 C816 C916 CA16 CB16 CC16 CD16 CE16 CF16 D0 16 D1 16 D2 16 D3 16 D4 16 D5 16 D6 16 D7 16
line 10 D816 D916 DA16 DB16 DC16 DD16 DE16 DF16 E016 E116 E216 E316 E416 E516 E616 E716 E816 E916 EA16 EB16 EC16 ED16 EE16 EF 16
























Using area for encode data setting
Useless area
Start setting data from the first line. Data set in the lines specified by registers EVP0 through EVP3 (address F216) will be
encoded.
Setting data in the second and subsequent lines, it is possible to set encode data to ten consecutive lines from those secified
by registers EVP0 to EVP2.
Similarly to encode line N specified by registers EVP0 through EVP2, extending encode lines to line N-1 and to line N+1, it is
possible to read encode data more certainly.
Fig.13 Display monitor
23
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(3) Encode data output
Digital 3 value output (EDO output)
H
Start bit
Clock run-in
Character 1
Character 2
VOH
VOM
LSB1
LSB2
MSB1
MSB2
VOL
A
B
C
E
D
VDD : 5.0V, Ta : 25°C
Symbol
Min.
Typ.
(EHS+9)✕
1/(fH✕192)*
Max.
Unit
–
µs
A
–
B
–
6.5P
–
µs
C
–
2P
–
µs
D
–
1P
–
µs
E
–
16P
–
µs
H
–
1/fH
–
µs
VOH
–
5.0
–
V
VOM
1.5
2.3
3.0
V
VOL
–
0
–
V
1P = 1/(fH ✕ 32)
fH : Horizontal synchronous frequency (MHz)
* It is possible to make a fine adjustment (in increments of 1/(fH ✕ 192)) by use of EHS (registers EHP4 to
EHP0 of address F816).
(EHS≤15 setting is forbidden.)
Fig. 14 Encode data output
24
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
CHARACTER FONT
Images are composed on a 12 ✕ 18 dot matrix, and characters can
be linked vertically and horizontally with other characters to allow the
display the continuous symbols.
Character code “FF16” is so fixed as to be blank and to have no
background, thus cannot assign a character font to this code.
(1) Border display (set by register BLK0, 1 (address F816))
12 dots
18 dots
When the character extends to the
top dot of the matrix, no border is
left at the top.
When the character extends to
the bottom (18th) dot of the matrix,
no border is left at the bottom.
Note: Hatching represents border.
(2) Cursor display (Border display)
Character
Note: When the cursor positioning
at the bottom (18th) dot, no
border is left at the bottom.
Positioning the
cursor at the
17th dot.
Register CL17/18 (address F7 16) = “0”
Positioning the
cursor at the
18th dot.
Register CL17/18 = “1”
Fig. 15 Character font and border
25
Fig. 16 M35052-XXXSP/FP example of peripheral circuit
26
470
+
120
220
2.2k
47µ
+
4700P
Note 3
I/O
Note 4
1µ
0.22µ
1.5k
+
10
9
8
7
6
5
4
3
2
CVIN
LECHA
CVIDEO
VDD2
AC
SIN
SCK
CS
TESTA
CP1
VDD1
20
17
18
19
12
13
14
0.1µ
Delay
circuit
0.01µ
1k
fsc
0.01µ
+5.0V
Note 6
Note 5
4700P
In displaying color superimposition, enter
into the OSCIN pin the f SC signal that
phase-synchronizes with the color burst of
the composite video signals (input to the
CVIN pin).
Note 7: In dealing with the internal synchronization,
cut off external video signals outside the IC.
The leakage of external input video signals
can be aoided.
VSS 11
EDO
TESTB
P0
P1
15
VSS 16
OSCIN
CP2
HOR
1µ
100µ
100µ 1µ
1
+
+
+
+
+5.0V
Note 4: Construct integral circuit by built-in 30kΩ
of AC pin and an external condenser.
Attention to supply voltage rise time about
this CR constant.
Note 5: External loop filter 2 constant is provisional valve.
Note 6: Connect fSC frequency.
0.3Vp-p≤VOSCIN≤4.0Vp-p
NTSC=3.580MHz
PAL=4.434MHz
M-PAL=3.576MHz
Note 7
1.50V
Note 1
10k
+5.0V
Note 1: Clamp sync chip to 1.50V. .
Note 2: Set
: basic electric potential in consid
eration of dynamic range of the transistor.
Note 3: External loop filter 1 constant is provisional valve.
75
220µ
+7.0V
150
+7.0V
Composite video
signal input
47µ
+
Note 2
From microcomputer




External composite video signal input
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
M35052-XXXSP/FP PERIPHERAL CIRCUIT
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Precautions
(1) Points to note in setting the display RAMs
a) Be careful to the edges may sway depending on the combination of character’s background color and raster color.
Edge sway
Fig. 17 Example of display
b) If what display exceeds the display area in dealing with external synchronization, (if use double - size characters), set the
character code of the addresses lying outside that display area
blank code – “FF16”.
Outside of display area
Outside of display
area
Inside of display
Inside of display
0016
0B16 0C16
1716
1816
2316 2416
2F16
3016
4716
4816
5F16
C016
D716
D816
EF16
Numbers are adresses
Set blank code “FF16” to character code of
part.
Fig. 18 Example of display
27
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
(2) Before setting registers at the starting of system, be sure to reset
__
the M35052-XXXSP/FP by applying “L” level to the AC pin.
(3) Power supply noise
When power supply noise is generated, the internal oscillator circuit does not stabilize, whereby causing horizontal jitters across
the picture display. Therefore, connect a bypass capacitor between the power supply and GND.
(4) Synchronous correction action
When switching channel or in the special playback mode (quick
playback, rewinding, and so on) of VTR, effect of synchronous
correction becomes strong, and distortion of a character is apt to
occur because the continuity of video signal is suddenly switched.
When the continuity of video signal is out of order, erasure of
displayed characters is recommended in a extreme short time to
raise the quality of displayed characters.
(5) Notes on fSC signal input
This IC amplifies the subcarrier frequency (fSC) signal (NTSC, MPAL system: 3.58MHz, PAL system: 4.43MHz) input to the OSCIN
pin (17-pin) and generates the composite video signal internally.
The amplified fSC signal can be destabilized in the following cases.
a) When the fSC signal is outside of recommended operating conditions.
b) When the waveform of the fSC signal is distorted.
c) When DC level in the fSC waveform fluctuates.
When the amplified signal is unstable, the composite video
signal generated inside the IC is also unstable in terms of synchronization with the subcarrier and phase.
Consequently, this results in color flicker and lost synchronization when the composite video signal is generated. Make note
of the fact that this may prevent a stable blue background from
being formed.
(6) Forbidding to stop entering the fSC signal
This IC doesn’t properly work if the fSC signal is not entered into
the OSCIN pin (pin 17), so don’t stop the fSC signal so as to work
the IC. To stop the IC, turn the display off (set 0 in the register
DSPON (address F816).)
(7) Forbidding to set data during the period in which the internal
oscillation circuit stabilizes
a) To start entering the fSC signal when its input is stopped.
b) To start oscillating the oscillation circuit for display when its
oscillation is stopped. (to assign “1” to the register STOP1 (address F816) when it is assigned “0”, or the like.)
c) To turn on the internal bias when it is turned off. (to assign “1”
to the register LEVEL1 (address F816) when it is assigned “0”.)
There can be instances in which data are not properly set in the
registers until the internal oscillation circuit stabilizes, so follow
the steps in sequence as given below.
1) Set “0” in the register DSPON (address F816). (the display is turned
off)
2) Effect the settings a), b), and c) given above.
28
3) Wait 20 ms (the period necessary for the internal oscillation circuit to stabilize) before entering data.
4) Set necessary data in other registers, and make the display RAM
ready.
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
TIMING REQUIREMENTS (Ta = –20°C to 70°C, VDD = 5±0.25V, unless otherwise noted)
Symbol
tw(SCK)
__________
tsu(CS)
____________
Limits
Parameter
Unit
Min.
Typ.
Max.
400
–
–
ns
200
–
–
ns
2
–
–
µs
SCK width
__________
CS setup time
__________
th(CS)
CS hold time
tsu(SIN)
SIN setup time
200
–
–
ns
th(SIN)
SIN hold time
200
–
–
tword
1 word writing time
12.8
–
–
ns
µs
__
__
Note. When oscillation stop at register STOR1 (address F816), 1V (field term) or more of tSU(CS) and th(CS) are needed.
tw(CS)
2 ˚s
(min.)
CS
tsu(CS)
tw(SCK)
tw(SCK)
tsu(SIN)
th(SIN)
th(CS)
SCK
SIN
CS
tword
SCK
1
2
3
...
14
15
16
1
2
3
c
14
15
16
Fig. 19 Serial input timing requirements
29
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
ABSOLUTE MAXIMUM RATINGS (VDD = 5V, Ta = –20 to 70°C, unless otherwise noted)
Symbol
Conditions
Parameter
With respect to VSS
Ratings
Unit
–0.3~6.0
V
VSS–0.3≤VI≤VDD+0.3
V
VSS≤VO≤VDD
V
300
mW
–20~70
°C
VDD
Supply voltage
VI
Input voltage
VO
Output voltage
Pd
Power dissipation
Topr
Operating temperature
Tstg
Storage temperature
–40~125
°C
Ta=25°C
RECOMMENDED OPERATING CONDITIONS (VDD = 5V, Ta = –20 to 70°C, unless otherwise noted)
Symbol
Limits
Parameter
VDD
Supply voltage
VIH
“H” level input voltage AC, CS, SIN, SCK, TESTA, TESTB
________
_________
Unit
Min.
Typ.
Max.
4.75
5.00
5.25
V
0.8✕VDD
VDD
VDD
V
_______
__________
VIL
“L” level input voltage AC, CS, SIN, SCK, TESTA, TESTB
0
0
0.2✕VDD
V
VCVIN
CVIN, HOR
–
2.0VP-P
–
V
VOSCIN
Input voltage OSCIN (Note)
–
4.0VP-P
V
–
MHz
0.3VP-P
3.580
fOSCIN
Synchronous signal oscillation frequency
–
(Duty 40~60%)
fOSC1
Display oscillation frequency
fOSC2
4.434
3.576
24 characters✕10 lines
–
480✕fH
–
MHz
32 characters✕7 lines
–
640✕fH
–
MHz
Notes 1. Noise component is within 30mV.
Notes 2. fH: Horizontal synchronous frequency (MHz).
ELECTRICAL CHARACTERISTICS (VDD = 5V, Ta = 25°C, unless otherwise noted)
Symbol
Parameter
Limits
Test conditions
Unit
Min.
Typ.
Max.
4.75
5.00
5.25
V
–
30
50
mA
VDD
Supply voltage
Ta=–20~70°C
IDD
Supply current
VDD=5.00V
VOH
“H” level output voltage P0, P1, SIN
VDD=4.75V, IOH=–0.4mA
3.75
–
–
V
VOL
“L” level output voltage P0, P1, SIN
VDD=4.75V, IOL=–0.4mA
–
–
0.4
V
VDD=5.00V
10
30
100
kΩ
Pull-up resistance
RI
_____
_____
AC, CS, SCK, SIN, TESTB
VOH
“H” level output voltage EDO
VDD=5.00V, IOH=–0.04mA
4.0
–
–
V
VOM
“M”level output voltage EDO
VDD=5.00V, IOM=±0.04mA
1.5
2.3
3.0
V
VOL
“L” level output voltage EDO
VDD=5.00V, IOL=0.04mA
–
–
0.4
V
VIDEO SIGNAL INPUT CONDITIONS (VDD = 5V, Ta = –20 to 70°C, unless otherwise noted)
Symbol
VIN-SC
30
Parameter
Composite video signal input clamp voltage
Limits
Test conditions
Sync-chip voltage
Unit
Min.
Typ.
Max.
–
1.5
–
V
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Note for Supplying Power
__
(1) Timing of power supplying to AC pin
The internal circuit of M35052-XXXSP/FP is reset when the level
__
of the auto clear input pin AC is “L”. This pin is hysteresis input
__
with the pull-up resistor. The timing about power supplying of AC
pin is shown in Figure 20. tW is the interval after the supply voltage becomes 0.8 ✕ VDD or more and before the supply voltage to
__
__
the AC pin (VAC) becomes 0.2 ✕ VDD or more.
After supplying the power (VDD and VSS) to M35052-XXXSP/FP,
the tW time must be reserved for 1ms or more. Before starting
input from the microcomputer, the waiting time (ts) must be re__
served for 500ms after the supply voltage to the AC pin becomes
0.8 ✕ VDD or more.
(2) Timing of power supplying to VDD1 pin and VDD2 pin
The power need to supply to VDD1 and VDD2 at a time, though it
is separated perfectly between the VDD1 as the digital line and
the VDD2 as the analog line.
Voltage mV n
VDD
Supply voltage
VAC
0.8✕VDD
iAC pin input voltage j
0.2✕VDD
tw
ts
Time t [s]
__
Fig. 20 Timing of power supplying to AC pin
PRECAUTION FOR USE
ROM ORDERING METHOD
Notes on noise and latch-up
Connect a capacitor (approx. 0.1 ˚F) between pins VDD and VSS at
the shortest distance using relatively thick wire to prevent noise and
latch up.
Please submit the information described below when ordering Mask
ROM.
(1) ROM Order Confirmation Form ................................................. 1
(2) Data to be written into mask ROM ................................ EPROM
(three sets containing the identical data)
(3) Mark Specification Form ............................................................ 1
(4) Program for character font generating + froppy disk in which character data is input
31
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
STANDARD ROM TYPE : M35052-001SP/FP
M35052-001SP/FP is a standard ROM type of M35052-XXXSP/FP
Character patterns are fixed to the contents of Figure 21 to 23.
0016
0116
0216
0316
0416
0516
0616
0716
0816
0916
0A16
0B16
0C16
0D16
0E16
0F16
1016
1116
1216
1316
1416
1516
1616
1716
1816
1916
1A16
1B16
1C16
1D16
1E16
1F16
2016
2116
2216
2316
2416
2516
2616
2716
2816
2916
2A16
2B16
2C16
2D16
2E16
2F16
3016
3116
3216
3316
3416
3516
3616
3716
3816
3916
3A16
3B16
3C16
3D16
3E16
3F16
Fig. 21 M35052-001SP/FP character patterns (1)
32
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
4016
4116
4216
4316
4416
4516
4616
4716
4816
4916
4A16
4B16
4C16
4D16
4E16
4F16
5016
5116
5216
5316
5416
5516
5616
5716
5816
5916
5A16
5B16
5C16
5D16
5E16
5F16
6016
6116
6216
6316
6416
6516
6616
6716
6816
6916
6A16
6B16
6C16
6D16
6E16
6F16
7016
7116
7216
7316
7416
7516
7616
7716
7816
7916
7A16
7B16
7C16
7D16
7E16
7F16 blank
Fig. 22 M35052-001SP/FP character patterns (2)
33
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
PACKAGE OUTLINE
34
MITSUBISHI MICROCOMPUTERS
M35052-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Keep safety first in your circuit designs!
•
Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to
personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable
material or (iii) prevention against any malfunction or mishap.
•
These materials are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer’s application; they do not convey any license under any intellectual property
rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party.
Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party’s rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples
contained in these materials.
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Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product
distributor for the latest product information before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors. Mitsubishi Electric Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors.
Please also pay attention to information published by Mitsubishi Electric Corporation by various means, including the Mitsubishi Semiconductor home page (http://www.mitsubishichips.com).
When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision
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Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Mitsubishi Electric
Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical,
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The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or in part these materials.
If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved
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Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for further details on these materials or the products contained therein.
Notes regarding these materials
•
•
•
•
•
•
•
© 2000 MITSUBISHI ELECTRIC CORP.
New publication, effective August. 2000.
Specifications subject to change without notice.
REVISION DESCRIPTION LIST
Rev.
No.
M35052-XXXSP/FP DATA SHEET
Revision Description
Rev.
date
1.0
First Edition
980402
1.1
P41 20P2Q-A (20-PIN SSOP) MARK SPECIFICATION FORM
B: Note 4 added
000707
1.2
Delete Mask ROM ORDER CONFIRMATION FORM and MASK SPECIFICATION FORM
000829
(1/1)