19-0403; Rev 0; 6/95 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package ____________________________Features ♦ Operates from a Single +2.7V to +5.5V Supply ________________________Applications ________________Functional Diagram ♦ Dual Buffered Voltage Output ♦ Low Power Consumption: 1mA Operating Current <1µA Shutdown Current ♦ Independently Programmable Shutdown Mode ♦ 5MHz, 3-Wire Serial Interface ♦ SPI™, QSPI™, and Microwire™ Compatible ♦ Space-Saving 8-Pin SO Package ______________Ordering Information PART TEMP. RANGE PIN-PACKAGE MAX522CPA 0°C to +70°C 8 Plastic DIP MAX522CSA MAX522EPA MAX522ESA 0°C to +70°C -40°C to +85°C -40°C to +85°C 8 SO 8 Plastic DIP 8 SO Digital Gain and Offset Adjustment Programmable Current Source Programmable Voltage Source 8 DIN VCO Tuning TOP VIEW 8 DIN 7 REF VDD 3 6 OUTB GND 4 5 OUTA SCLK 2 MAX522 DIP/SO 3 VDD 7 REF SCLK 2 CS 1 16-BIT SHIFT REGISTER CONTROL (8) DATA (8) __________________Pin Configuration CS 1 0.1µF (OPTIONAL) 0.22µF Power-Amp Bias Control DAC LATCH A DAC A DAC LATCH B DAC B OUTA VOUTA 5 0.1µF OUTB VOUTB 6 0.01µF MAX522 4 GND SPI and QSPI are trademarks of Motorola Inc. Microwire is a trademark of National Semiconductor Corp. ________________________________________________________________ Maxim Integrated Products Call toll free 1-800-998-8800 for free samples or literature. 1 MAX522 _______________General Description The MAX522 contains two 8-bit, buffered, voltage-output digital-to-analog converters (DAC A and DAC B) in small 8-pin SO and DIP packages. DAC A’s buffer can source and sink 5mA, and DAC B’s output can source and sink 500µA, both to within 0.5V of ground and V DD. The MAX522 operates with a single +2.7V to +5.5V supply. The device utilizes a 3-wire serial interface, which operates at clock rates up to 5MHz and is compatible with SPI™, QSPI™, and Microwire™ interface standards. The serial input shift register is 16 bits long and consists of eight bits of DAC input data and eight bits for DAC selection and shutdown control. DAC registers can be loaded independently or in parallel at the positive edge of CS. The MAX522’s ultra-low power consumption and small 8-pin SO package make it ideal for portable and battery-powered applications. Supply current is less than 1mA and drops below 1µA in shutdown mode. In addition, the reference input is disconnected from the REF pin during shutdown, further reducing the system’s total power consumption. The software format is compatible with the MAX512/MAX513 triple 8-bit DACs. MAX522 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package ABSOLUTE MAXIMUM RATINGS VDD to GND ................................................................ -0.3V, +6V Digital Inputs and Outputs to GND............... -0.3V, (VDD + 0.3V) REF ................................................................-0.3V, (VDD + 0.3V) OUTA, OUTB (Note 1)............................................................VDD Continuous Power Dissipation (TA = +70°C) Plastic DIP (derate 9.09mW/°C above +70°C) ..............727mW SO (derate 5.88mW/°C above +70°C) ...........................471mW Operating Temperature Ranges MAX522C_ A.......................................................0°C to +70°C MAX522E_ A....................................................-40°C to +85°C Storage Temperature Range .............................-65°C to +165°C Lead Temperature (soldering, 10sec) .............................+300°C Note 1: The outputs may be shorted to VDD or GND if the package power dissipation is not exceeded. Typical short-circuit current to GND is 50mA. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VDD = +2.7V to +5.5V, REF = VDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ±1 LSB ±1.5 LSB STATIC PERFORMANCE Resolution Differential Nonlinearity N 8 DNL Guaranteed monotonic Integral Nonlinearity INL (Note 2) Total Unadjusted Error TUE (Note 2) Zero-Code Temperature Coefficient Power-Supply Rejection Ratio PSRR Bits ±1 LSB 100 µV/°C 4.5V ≤ VDD ≤ 5.5V, REF = 4.096V 0.01 2.7V ≤ VDD ≤ 3.6V, REF = 2.4V 0.015 %/% REFERENCE INPUTS Reference Input Voltage Range GND Reference Input Capacitance Reference Input Resistance VDD 25 RREF (Note 3) 8 Reference Input Resistance (shutdown mode) V pF kΩ 2 MΩ DAC OUTPUTS Output Voltage Range 0 Capacitive Load at OUT_ Output Resistance DAC A 0.1 DAC B 0.01 REF V µF DAC A 50 DAC B 500 Ω DIGITAL INPUTS Input High Voltage VIH Input Low Voltage VIL Input Current IIN VIN = 0V or VDD Input Capacitance CIN (Notes 4, 5) 2 (0.7)(VDD) V (0.3)(VDD) 0.1 _______________________________________________________________________________________ V ±10 µA 10 pF Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package MAX522 ELECTRICAL CHARACTERISTICS (continued) (VDD = +2.7V to +5.5V, REF = VDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DYNAMIC PERFORMANCE Voltage-Output Slew Rate SR CL = 0.1µF (DAC A), CL = 0.01µF (DAC B) Voltage-Output Settling Time To ±1⁄2LSB Digital Feedthrough and Crosstalk All 0s to all 1s 0.1 CL = 0.1µF (DAC A) 70 CL = 0.01µF (DAC B) 70 V/µs µs 10 nV-s POWER SUPPLIES Supply Voltage Range Supply Current VDD IDD Shutdown Supply Current 2.7 All inputs = 0V 5.5 VDD = 5.5V 1.3 2.8 VDD = 3.6V 0.9 2.5 VDD = 5.5V 0.1 V mA µA TIMING CHARACTERISTICS (Note 4) (VDD = +2.7V to +5.5V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SERIAL INTERFACE TIMING –—– CS Fall to SCLK Rise Setup Time –—– SCLK Rise to CS Rise Setup Time SYMBOL CONDITIONS MIN TYP MAX UNITS tCSS 150 ns tCSH 150 ns DIN to SCLK Rise Setup Time tDS 50 ns DIN to SCLK Rise Hold Time tDH 50 ns SCLK Pulse Width High tCH 100 ns SCLK Pulse Width Low –—– CS Pulse Width High tCL 100 ns tCSPWH 200 ns Note 2: Reduced digital code range (code 24 through code 232) is due to swing limitations of the output amplifiers. See Typical Operating Characteristics. Note 3: Reference input resistance is code dependent. The lowest input resistance occurs at code 55hex. Refer to the Reference Input section in the Detailed Description. Note 4: Guaranteed by design. Not production tested. Note 5: Input capacitance is code dependent. The highest capacitance occurs at code 00hex. _______________________________________________________________________________________ 3 __________________________________________Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) DAC B 2.0 1.5 1.0 REF = VDD = 3V CODE = ALL 1s 0 0.0001 0.001 0.01 0.1 1 10 100 DAC B 400 300 200 MAX522 TOC-02 100 0.1 1 10 0 0.0001 0.001 0.01 100 0.1 1 10 POSITIVE SUPPLY CURRENT vs. SUPPLY VOLTAGE POSITIVE SUPPLY CURRENT vs. TEMPERATURE 1.3 1.360 1.1 IDD (mA) -20 1.0 0.9 0.7 -30 -35 96 REF = VDD = 5V ALL LOGIC INPUTS = 5V ALL DACs SET TO ALL 1s 1.345 0.6 REF = VDD = 3V 64 1.355 1.350 0.8 32 1.365 1.2 -15 MAX522 TOC-06 REF = VDD ALL LOGIC INPUTS GROUNDED 1.4 128 0.5 160 192 224 255 1.340 3.0 2.5 3.5 4.0 4.5 5.0 -60 -40 -20 0 5.5 20 40 60 80 100 120 140 DIGITAL CODE VDD (V) TEMPERATURE (°C) SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE REFERENCE FEEDTHROUGH vs. FREQUENCY REFERENCE LARGE-SIGNAL FREQUENCY RESPONSE 3.0 2.5 2.0 1.5 -40 -60 -80 DAC A, B 1.0 -120 0 -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (°C) 0 -5 -10 -15 -20 -100 0.5 0.01 0.1 1 10 FREQUENCY (kHz) 100 1000 MAX522 TOC-09 VDD = 3V VREF = 0V TO 2.9V SINE WAVE NO LOAD CODE = ALL 0s RELATIVE OUTPUT (dB) -20 5 MAX522 TOC-08 0 FEEDTHROUGH (dB) REF = VDD = 5V ALL LOGIC INPUTS = 5V ALL DACs SET TO ALL 1s MAX522 TOC-07 4.5 100 1.370 MAX522 TOC-05 1.5 DAC B LOADED WITH 0.5mA 0 600 500 TOTAL UNADJUSTED ERROR vs. DIGITAL CODE IDD (mA) TUE (LSB) REF = VDD = 5V CODE = ALL 1s 3.8 0.0001 0.001 0.01 -25 4 4.2 DAC A 700 OUTPUT SINK CURRENT (mA) DAC A LOADED WITH 5mA 3.5 4.4 REF = VDD = 3V CODE = ALL 1s OUTPUT SOURCE CURRENT (mA) 0 4.0 DAC B 4.6 800 OUTPUT SOURCE CURRENT (mA) -5 -10 4.8 4.0 MAX522 TOC-04 0.5 OUTPUT VOLTAGE vs. OUTPUT SINK CURRENT 900 OUTPUT VOLTAGE (mV) 2.5 DAC A 5.0 OUTPUT VOLTAGE (V) DAC A 3.0 OUTPUT VOLTAGE (V) MAX522 TOC-01 3.5 OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT (VDD = 5V) 5.2 MAX522 TOC-03 OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT (VDD = 3V) SHUTDOWN SUPPLY CURRENT (µA) MAX522 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package VDD = 3V VREF = 0V TO VDD SINE WAVE -25 0.001 0.01 0.1 1 10 FREQUENCY (kHz) _______________________________________________________________________________________ 100 1000 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package RELATIVE OUTPUT (dB) 0 MAX522 TOC-10 REFERENCE SMALL-SIGNAL FREQUENCY RESPONSE DAC A -20 DAC B -40 -60 -80 VDD = 3V VREF = 1.5V DC WITH ±40mVP-P SINE WAVE SUPERIMPOSED 0.1k 1k 10k 100k 1M 10M FREQUENCY (Hz) LINE-TRANSIENT RESPONSE (OUTA) CLOCK FEEDTHROUGH (OUTA) A 3.14V A 2.86V B B 20µs/div REF = 2.56V, NO LOAD, CODE = ALL 1s A : VDD, 100mV/div B : OUTA, 500µV/div 1µs/div CS = HIGH A: SCLK, 333kHz, 0V TO 2.9V, 2V/div B: OUTA, 2mV/div _______________________________________________________________________________________ 5 MAX522 ____________________________Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted.) MAX522 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package ____________________________Typical Operating Characteristics (continued) (TA = +25°C, unless otherwise noted). POSITIVE SETTLING TIME (DAC A) POSITIVE SETTLING TIME (DAC B) A A B B 20µs/div 20µs/div VDD = 3V, REF = VDD, RL = 1k Ω, CL = 0.1µF, ALL BITS OFF TO ALL BITS ON VDD = 3V, REF = VDD, RL = 10k Ω, CL = 0.01µF, ALL BITS OFF TO ALL BITS ON A: CS, 2V/div B: OUTA, 20mV/div A: CS, 2V/div B: OUTB, 20mV/div TIME EXITING SHUTDOWN MODE OUTPUT VOLTAGE NOISE (DC TO 1MHz) A OUTA 200µV/div B 20µs/div VDD = 3V, REF = VDD, RL = 1k Ω, CL = 0.1µF, DAC LOADED WITH ALL 1s 2ms/div DIGITAL CODE = 80, REF = VDD, NO LOAD A: CS, 2V/div B: OUTA, 1V/div 6 _______________________________________________________________________________________ Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package PIN NAME FUNCTION 1 –—– CS Chip Select (active low). Enables data to be shifted into the 16-bit shift register. Programming commands –—– are executed at the rising edge of C S. 2 SCLK Serial Clock Input. Data is clocked in on the rising edge of SCLK. 3 VDD Positive Power Supply (2.7V to 5.5V). Bypass with 0.22µF to GND. 4 GND Ground 5 OUTA DAC A Output Voltage (Buffered). Connect 0.1µF capacitor or greater to GND. 6 OUTB DAC B Output Voltage (Buffered). Connect 0.01µF capacitor or greater to GND. 7 REF Reference Input for DAC A and DAC B 8 DIN Serial Data Input of the 16-bit shift register. Data is clocked into the register on the rising edge of SCLK. _______________Detailed Description Analog Section The MAX522 contains two 8-bit, voltage-output digitalto-analog converters (DACs). The DACs are “inverted” R-2R ladder networks using complementary switches that convert 8-bit digital inputs into equivalent analog output voltages in proportion to the applied reference voltage. The MAX522 has one reference input which is shared by DAC A and DAC B. The device includes output buffer amplifiers for both DACs and input logic for simple microprocessor (µP) and CMOS interfaces. The power-supply range is from +5.5V down to +2.7V. Reference Input and DAC Output Range The voltage at REF sets the full-scale output of the DACs. The input impedance of the REF input is code dependent. The lowest value, approximately 8kΩ, occurs when the input code is 01010101 (55hex). The maximum value of infinity occurs when the input code is zero. In shutdown mode, the selected DAC output is set to zero while the value stored in the DAC register remains unchanged. This removes the load from the reference input to save power. Bringing the MAX522 out of shutdown mode restores the DAC output voltage. Because the input resistance at REF is code dependent, the DAC’s reference sources should have an output impedance of no more than 5Ω. The input capacitance at the REF pin is also code dependent and typically does not exceed 25pF. The reference voltage on REF can range anywhere from GND to VDD. See the Output Buffer Amplifier section for more information. Output Buffer Amplifiers DAC A and DAC B voltage outputs are internally buffered. The buffer amplifiers have a rail-to-rail (GND to VDD) output voltage range. The DAC outputs are internally divided by two and the buffer is set to a gain of two, eliminating the need for a buffer input voltage range to the positive supply rail. DAC A’s output amplifier can source and sink up to 5mA of current (0.5mA for DAC B’s buffer). See the Total Unadjusted Error vs. Digital Code graph in the Typical Operating Characteristics . The amplifier is unity-gain stable with a capacitive load of 0.1µF (0.01µF for DAC B’s buffer) or greater. The slew rate is limited by the load capacitor and is typically 0.1V/µs with a 0.1µF load (0.01µF for DAC B’s buffer). Shutdown Mode When programmed to shutdown mode, the outputs of DAC A and DAC B go into a high-impedance state. Virtually no current flows into or out of the buffer amplifiers in that state. In shutdown mode, the REF inputs are high impedance (2MΩ typical) to conserve current drain from the system reference; therefore, the system reference does not have to be powered down. Coming out of shutdown, the DAC outputs return to the values kept in the registers. The recovery time is equivalent to the DAC settling time. _______________________________________________________________________________________ 7 MAX522 ______________________________________________________________Pin Description MAX522 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package 2R 2R R 2R R 2R OUT 2R REF GND SHOWN FOR ALL 1s ON DAC Figure 1. DAC Simplified Circuit Diagram CONTROL BITS R DATA BITS Table 1. Input Shift Register B0* DAC Data Bit 0 (LSB) B1 DAC Data Bit 1 B2 DAC Data Bit 2 B3 DAC Data Bit 3 B4 DAC Data Bit 4 B5 DAC Data Bit 5 B6 DAC Data Bit 6 B7 DAC Data Bit 7 (MSB) LA Load Reg DAC A, Active High LB Load Reg DAC B, Active High UB4 Uncommitted Bit 4 SA Shut Down DAC A, Active High SB Shut Down DAC B, Active High UB3 Uncommitted Bit 3 UB2 Uncommitted Bit 2 UB1** Uncommitted Bit 1 **Clocked in last. **Clocked in first. Serial Interface –—– An active-low chip select (CS) enables the shift register to receive data from the serial data input. Data is clocked into the shift register on every rising edge of the serial clock signal (SCLK). The clock frequency can be as high as 5MHz. Data is sent MSB first and can be transmitted in one –—–16bit word. The write cycle can be segmented when CS is kept active (low) to allow, for example, two 8-bit-wide transfers. After clocking all–—–16 bits into the input shift register, the rising edge of CS updates the DAC outputs and the shutdown status. Because of their single buffered structure, DACs cannot be simultaneously updated to different digital values. 8 Serial-Input Data Format and Control Codes Table 2 lists the serial-input data format. The 16-bit input word consists of an 8-bit control byte and an 8-bit data byte. The 8-bit control byte is not decoded internally. Every control bit performs one function. Data is clocked in starting with UB1 (Uncommitted Bit), followed by the remaining control bits and the data byte. The LSB of the data byte (B0) is the last bit clocked into the shift register (Figure 2). Table 3 is an example of a 16-bit input word. It performs the following functions: • 80hex (128 decimal) loaded into DAC registers A and B. • DAC A and DAC B are active. _______________________________________________________________________________________ Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package MAX522 CS INSTRUCTION EXECUTED SCLK OPTIONAL DIN UB1 UB2 UB3 SB SA UB4 LB LA D7 D6 D5 (CONTROL BYTE) D4 D3 D2 D1 D0 (DATA BYTE) Figure 2. MAX522 3-Wire Serial-Interface Timing Diagram Table 2. Serial-Interface Programming Commands CONTROL DATA FUNCTION UB1 UB2 UB3 SB SA UB4 LB LA B7 B6 MSB X X B5 B4 B3 B2 B1 B0 LSB X X X X X X X X 1 * * 0 0 0 X X 1 * * 0 0 0 No Operation to DAC Registers X X 1 * * 0 1 0 8-Bit DAC Data Load Register to DAC B X X 1 * * 0 0 1 8-Bit DAC Data Load Register to DAC A X X 1 * * 0 1 1 8-Bit DAC Data X X 1 0 0 0 * * X X X X X X X X All DACs Active X X 1 0 0 0 * * X X X X X X X X Unassigned Command X X 1 1 0 0 * * X X X X X X X X Shut Down DAC B X X 1 0 1 0 * * X X X X X X X X Shut Down DAC A X X 1 1 1 0 * * X X X X X X X X Shut Down All DACs Unassigned Command Load Both DAC Registers X = Don’t care. * = Not shown, for the sake of clarity. The functions of loading and shutting down the DACs and programming the logic can be combined in a single command. Table 3. Example of a 16-Bit Input Word Loaded in First Loaded in Last UB1 UB2 UB3 SB SA UB4 LB LA B7 B6 B5 B4 B3 B2 B1 B0 X X 1 0 0 0 1 1 1 0 0 0 0 0 0 0 _______________________________________________________________________________________ 9 MAX522 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package CS tCSPWH tCSS tCSH tCH SCLK tCL tDS tDH DIN Figure 3. MAX522 Detailed Serial-Interface Timing Diagram Digital Inputs The digital inputs are compatible with CMOS logic. Supply current increases slightly when toggling the logic inputs through the transition zone between (0.3)(VDD) and (0.7)(VDD). Microprocessor Interfacing The MAX522 serial interface is compatible with Microwire, SPI, and QSPI. For SPI, clear the CPOL and CPHA bits (CPOL = 0 and CPHA = 0). CPOL = 0 sets the inactive clock state to zero and CPHA = 0 changes data at the falling edge of SCLK. This setting allows SPI to run at full clock speeds (0.5MHz). If a serial port is not available on your µP, three bits of a parallel port can be used to emulate a serial port by bit manipulation. Minimize digital feedthrough at the voltage outputs by operating the serial clock only when necessary. Table 4. Code Table DAC CONTENTS ANALOG OUTPUT B7 B6 B5 B4 B3 B2 B1 B0 1 1 1 1 1 1 1 1 255 +REF × 256 1 0 0 0 0 0 0 1 129 +REF × 256 1 0 0 0 0 0 0 0 +REF × 0 1 1 1 1 1 1 1 127 +REF × 256 0 0 0 0 0 0 0 1 1 +REF × 256 0 0 0 0 0 0 0 0 0V 128 = 256 + REF 2 Note: 1 1LSB = REF × 2 −8 = REF × 256 D ANALOG OUTPUT = REF × 256 10 where D = Decimal Value of Digital Input ______________________________________________________________________________________ Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package MAX522 ______________Applications Information The MAX522 is specified for single-supply operation with VDD ranging from 2.7V to 5.5V, covering all commonly used supply voltages in 3V and 5V systems. Initialization There is no internal power-on reset. Therefore, at power-up, perform an initial write operation to set the outputs to the desired voltage. Power-Supply and Ground Management GND should be connected to the highest quality ground available. Bypass VDD with a 0.1µF to 0.22µF capacitor to GND. The reference input can be used without bypassing. For optimum line/load-transient response and noise performance, bypass the reference input with 0.1µF to 4.7µF to GND. Careful PC board layout minimizes crosstalk among DAC outputs, the reference, and digital inputs. Separate analog lines with ground traces between them. Make sure that highfrequency digital lines are not routed in parallel to analog lines. ______________________________________________________________________________________ 11 MAX522 Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package ________________________________________________________Package Information D E DIM E1 A A1 A2 A3 B B1 C D1 E E1 e eA eB L A3 A A2 L A1 0° - 15° C e B1 eA B eB D1 Plastic DIP PLASTIC DUAL-IN-LINE PACKAGE (0.300 in.) INCHES MAX MIN 0.200 – – 0.015 0.175 0.125 0.080 0.055 0.022 0.016 0.065 0.045 0.012 0.008 0.080 0.005 0.325 0.300 0.310 0.240 – 0.100 – 0.300 0.400 – 0.150 0.115 PKG. DIM PINS P P P P P N D D D D D D 8 14 16 18 20 24 INCHES MIN MAX 0.348 0.390 0.735 0.765 0.745 0.765 0.885 0.915 1.015 1.045 1.14 1.265 MILLIMETERS MIN MAX – 5.08 0.38 – 3.18 4.45 1.40 2.03 0.41 0.56 1.14 1.65 0.20 0.30 0.13 2.03 7.62 8.26 6.10 7.87 2.54 – 7.62 – – 10.16 2.92 3.81 MILLIMETERS MIN MAX 8.84 9.91 18.67 19.43 18.92 19.43 22.48 23.24 25.78 26.54 28.96 32.13 21-0043A DIM D 0°-8° A 0.101mm 0.004in. e B A1 E C H L Narrow SO SMALL-OUTLINE PACKAGE (0.150 in.) A A1 B C E e H L INCHES MAX MIN 0.069 0.053 0.010 0.004 0.019 0.014 0.010 0.007 0.157 0.150 0.050 0.244 0.228 0.050 0.016 DIM PINS D D D 8 14 16 MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 3.80 4.00 1.27 5.80 6.20 0.40 1.27 INCHES MILLIMETERS MIN MAX MIN MAX 0.189 0.197 4.80 5.00 0.337 0.344 8.55 8.75 0.386 0.394 9.80 10.00 21-0041A Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 12 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 © 1995 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.