19-2043; Rev 1; 8/01 µP Supervisory Circuits in 4-Bump (2 ✕ 2) Chip-Scale Package The MAX6400–MAX6405 is a family of ultra-low power microprocessor (µP) supervisory circuits used for monitoring battery, power-supply, and regulated system voltages. Each device contains a precision bandgap reference comparator and is trimmed to specified trip threshold voltages. These devices provide excellent circuit reliability and low cost by eliminating external components and adjustments when monitoring system voltages from 2.5V to 5.0V. A manual reset input is also included. The MAX6400–MAX6405 assert a reset signal whenever the VCC supply voltage falls below a preset threshold. These devices are differentiated by their output logic configurations and preset threshold voltages. The MAX6400/MAX6403 (push-pull) and the MAX6402/ MAX6405 (open-drain) have an active-low reset (RESET is logic low when VCC is below VTH). The MAX6401/ MAX6404 have an active-high push-pull output (RESET is logic high when VCC is below VTH). All parts are guaranteed to be in the correct output logic state for VCC down to 1V. The reset circuit is designed to ignore fast transients on V CC . The MAX6400/MAX6401/ MAX6402 have voltage thresholds between 2.20V and 3.08V in approximately 100mV increments. The MAX6403/MAX6404/MAX6405 have voltage thresholds between 3.30V and 4.63V in approximately 100mV increments. Ultra-low supply current of 500nA (MAX6400/MAX6401/ MAX6402) makes these parts ideal for use in portable equipment. These devices are available in 4-bump chip-scale packages (UCSP™) Applications Portable/Battery-Powered Equipment Cell Phones PDAs MP3 Players Pagers Selector Guide PART NOMINAL VTH (V) MAX6400 2.20 to 3.08 Push-Pull, Active-Low MAX6401 2.20 to 3.08 Push-Pull, Active-High MAX6402 2.20 to 3.08 Open-Drain, Active-Low MAX6403 3.30 to 4.63 Push-Pull, Active-Low MAX6404 3.30 to 4.63 Push-Pull, Active-High MAX6405 3.30 to 4.63 Open-Drain, Active-Low RESET/RESET OUTPUT TYPE ____________________________Features ♦ Ultra-Small 4-Bump (2 ✕ 2) Chip-Scale Package, (Package Pending Full Qualification—Expected Completion Date 6/30/01. See UCSP Reliability Section for More Details.) ♦ 70% Smaller Than SC70 Package ♦ Ultra-Low 500nA (typ) Supply Current (MAX6400/MAX6401/MAX6402) ♦ Factory-Trimmed Reset Thresholds from 2.20V to 4.63V in Approximately 100mV Increments ♦ ±2.5% Threshold Accuracy -40°C to +85°C ♦ Factory-Set 100ms (min) Reset Timeout Period ♦ Manual Reset Input ♦ Guaranteed Reset Valid to VCC = 1.0V ♦ Three Reset Output Logic Options: Active-Low Push-Pull, Active-High Push-Pull, and Active-Low Open-Drain. ♦ Immune to Short VCC Transients ♦ No External Components Ordering Information PART TEMP. RANGE o o PIN-PACKAGE MAX6400BS_ _-T -40 C to +85 C UCSP-4 MAX6401BS_ _-T -40oC to +85oC UCSP-4 MAX6402BS_ _-T -40oC to +85oC UCSP-4 o o MAX6403BS_ _-T -40 C to +85 C UCSP-4 MAX6404BS_ _-T -40oC to +85oC UCSP-4 MAX6405BS_ _-T -40oC to +85oC UCSP-4 The MAX6400–MAX6405 are available in factory-set VCC reset thresholds from 2.20V to 4.63V, in approximately 0.1V increments. Choose the desired reset-threshold suffix from Table 1 and insert it in the blank space following “S”. There are 21 standard versions with a required order increment of 2500 pieces. Sample stock is generally held on the standard versions only (Table 1). Required order increment is 10,000 pieces for nonstandard versions (Table 2). Contact factory for availability. All devices available in tape-and-reel only. UCSP reliability is integrally linked to the user’s assembly methods, circuit board material, and environment. Refer to the UCSP Reliability Notice in the UCSP Reliability section of this data sheet for more information. Pin Configuration appears at end of data sheet. UCSP is a trademark of Maxim Integrated Products, Inc. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX6400–MAX6405 General Description MAX6400–MAX6405 µP Supervisory Circuits in 4-Bump (2 ✕ 2) Chip-Scale Package ABSOLUTE MAXIMUM RATINGS All voltages measured with respect to GND, unless otherwise noted. VCC ...........................................................................-0.3V to +6V RESET, RESET (push-pull) .........................-0.3V to (VCC + 0.3V) RESET (open-drain)..................................................-0.3V to +6V MR ..............................................................-0.3V to (VCC + 0.3V) Input/Output into Any Pin ....................................................20mA Continuous Power Dissipation (TA = +70°C) 4-Bump UCSP (derate 3.8mW/°C above +70°C).........303mW Operating Temperature Range ..........................-40°C to +85°C Junction Temperature ......................................................+150°C Storage Temperature Range ............................-65°C to +150°C Bump Reflow Temperature .............................................+235°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = 1.0V to 5.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.0V and TA = +25°C.) (Note 1) PARAMETER Supply Voltage Range Supply Current SYMBOL VCC ICC CONDITIONS MIN VTH Reset Threshold Hysteresis Reset Threshold Tempco 5.5 TA = -40°C to +85°C 1.2 5.5 MAX6400/MAX6401/MAX6402 VCC = 3.0V for VTH ≤ 2.93V, VCC = 3.2V for VTH ≥ 2.93V, no load tRD Reset Active Timeout Period tRP VIL MR Input VIH VIL VIH MR Minimum Input Pulse Width tMD 1.0 1.0 1.75 VTH - 1.5% VTH VTH + 1.5% TA = -40°C to +85°C VTH - 2.5% VTH VTH + 2.5% MAX6400/MAX6401/MAX6402 6.3 MAX6403/MAX6404/MAX6405 9.5 VTH > 4.0V VTH ≤ 4.0V µA V ppm/°C µs 20 100 V mV 40 VCC = (VTH +100mV) to (VTH - 100mV) UNITS 185 280 ms 0.8 2.0 0.2 x VCC V 0.7 x VCC µs 1 MR Glitch Rejection 100 ns MR to Reset Delay Time 200 ns MR Pullup Resistance 2 Table 1 0.5 TA = +25°C ∆VTH/°C VCC to Reset Delay MAX 1.0 VCC = 5.5V, no load Reset Threshold TYP TA = 0°C to +70°C 25 50 _______________________________________________________________________________________ 75 kΩ µP Supervisory Circuits in 4-Bump (2 ✕ 2) Chip-Scale Package MAX6400–MAX6405 ELECTRICAL CHARACTERISTICS (continued) (VCC = 1.0V to 5.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = 3.0V and TA = +25°C.) (Note 1) PARAMETER SYMBOL RESET Output Voltage Low (MAX6400/MAX6402/MAX6403/ MAX6405) VOL RESET Output Voltage High (MAX6400/MAX6403) VOH VOH RESET Output Voltage (MAX6401/MAX6404) VOL Open-Drain RESET Output Leakage Current (Note 2) CONDITIONS MIN TYP MAX ISINK = 1.6mA, VCC ≥ 2.1V, reset asserted 0.3 ISINK = 100µA, VCC ≥ 1.2V, reset asserted 0.4 UNITS V ISOURCE = 500µA, VCC = 3.2V, MAX6400, only, reset not asserted 0.8 x VCC ISOURCE = 800µA, VCC = 4.5V, VTH ≤ 4.38V, reset not asserted 0.8 x VCC ISOURCE = 800µA, VCC = VTH (max), VTH ≥ 4.5V, reset not asserted 0.8 x VCC ISOURCE = 500µA, VCC ≥ 2.1V, reset asserted 0.8 x VCC ISOURCE = 50µA, VCC ≥ 1.2V, reset asserted 0.8 x VCC V ISINK = 1.2mA, VCC ≥ 3.2V, reset not asserted, MAX6401 only 0.3 ISINK = 3.2mA, VCC ≥ 4.5V, reset not asserted, VTH ≤ 4.38V 0.4 ISINK = 3.2mA, VCC = VTH (max), VTH ≥ 4.5V, reset not asserted 0.4 RESET not asserted 0.1 V µA Note 1: Production testing done at +25°C only. Overtemperature limits are guaranteed by design and not production tested. Note 2: Guaranteed by design. _______________________________________________________________________________________ 3 Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) POWER-DOWN RESET DELAY vs. TEMPERATURE SUPPLY CURRENT vs. TEMPERATURE 1.0 VCC = 3.3V 0.6 200 150 VOD = 10mV 100 VOD = 20mV 0.4 50 VCC = 1.2V 0.2 0 -20 VOD = 200mV 0 20 40 60 -40 80 -20 0 20 40 60 TEMPERATURE (°C) TEMPERATURE (°C) POWER-UP RESET TIMEOUT vs. TEMPERATURE MAXIMUM TRANSIENT DURATION vs. THRESHOLD OVERDRIVE 190 180 170 160 150 140 130 80 MAX6400-05 toc04 200 500 MAXIMUM TRANSIENT DURATION (µs) MAX6400-05 toc03 210 400 300 RESET/RESET IS ASSERTED ABOVE LINE 200 100 0 -40 -20 0 20 40 TEMPERATURE (°C) 4 VOD = 100mV 0 -40 MAX6400-05 toc02 VCC = 5V VOD = OVERDRIVE VOLTAGE RESET DELAY (µs) SUPPLY CURRENT (µA) 1.2 0.8 250 MAX6400-05 toc01 1.4 POWER-UP RESET TIMEOUT (ms) MAX6400–MAX6405 µP Supervisory Circuits in 4-Bump (2 ✕ 2) Chip-Scale Package 60 80 1 10 100 THRESHOLD OVERDRIVE VTH - VCC (mV) _______________________________________________________________________________________ 1000 µP Supervisory Circuits in 4-Bump (2 ✕ 2) Chip-Scale Package PIN MAX6400/MAX6402 MAX6403/MAX6405 MAX6401/MAX6404 A1 A1 NAME GND FUNCTION Ground B1 — RESET Active-Low Reset Output, (Open-Drain or Push-Pull). RESET is asserted low when the VCC input is below the selected reset threshold. RESET remains low for the reset timeout period after VCC exceeds the device reset threshold. Opendrain outputs require an external pullup resistor. — B1 RESET Active-High Reset Output. RESET remains high while VCC is below the reset threshold and for at least 100ms after VCC rises above the reset threshold. B2 B2 MR Active-Low Manual Reset. Internal 50kΩ pullup to VCC. Pull low to assert a reset. Reset remains asserted as long as MR is low and for the reset timeout period after MR goes high. Leave unconnected or connect to VCC if unused. A2 A2 VCC Supply Voltage and Input for the Reset Threshold Monitor Detailed Description Reset Output A microprocessor’s (µP’s) reset input starts the µP in a known state. These µP supervisory circuits assert reset to prevent code execution errors during power-up, power-down, or brownout conditions. RESET is guaranteed to be a logic low for VCC down to 1V. Once VCC exceeds the reset threshold, an internal timer keeps RESET low for the reset timeout period; after this interval, RESET goes high. If a brownout condition occurs (VCC dips below the reset threshold), RESET goes low. Any time VCC goes below the reset threshold, the internal timer resets to zero, and RESET goes low. The internal timer starts after VCC returns above the reset threshold, and RESET remains low for the reset timeout period. The manual reset input (MR) can also initiate a reset, see the Manual Reset Input section. The MAX6401/ MAX6404 have active-high RESET outputs that are the inverse of the MAX6400/MAX6402/MAX6403/MAX6405 outputs (Figure 1). Manual Reset Input Many µP-based products require manual reset capability, allowing the operator, a test technician, or external logic circuit to initiate a reset. A logic low on MR asserts reset. Reset remains asserted while MR is low, and for the reset active timeout period (tRP) after MR returns high. This input has an internal 50kΩ pullup resistor, so it can be left open if it is not used. MR can be driven with TTL or CMOS logic levels, or with open-drain/collector outputs. Connect a normally open momentary switch from MR to GND to create a manual reset function; external debouncing circuitry is not required. If MR is driven from long cables or if the device is used in a noisy environment, connect a 0.1µF capacitor from MR to ground to provide additional noise immunity (see Figure 1). Applications Information Interfacing to µP with Bidirectional Reset Pins Since the RESET output on the MAX6402/MAX6405 is open-drain, these devices interface easily with (µPs) that have bidirectional reset pins. Connecting the µP supervisor’s RESET output directly to the microcontroller’s (µC’s) RESET pin with a single pullup resistor allows either device to assert reset (Figure 2). Negative-Going VCC Transients These devices are relatively immune to short-duration, negative-going VCC transients (glitches). The Typical Operating Characteristics show the Maximum Transient Duration vs. Reset Threshold Overdrive graph, for which reset pulses are not gener- _______________________________________________________________________________________ 5 MAX6400–MAX6405 Pin Description MAX6400–MAX6405 µP Supervisory Circuits in 4-Bump (2 ✕ 2) Chip-Scale Package VTH VCC tRD tRP RESET tMR tRP MR Figure 1. Reset Timing Diagram VCC VCC VCC ated. The graph shows the maximum pulse width that a negative going VCC transient may typically have when issuing a reset signal. As the amplitude of the transient increases, the maximum allowable pulse width decreases. Chip Information µP MAX6402/ MAX6405 RESET MR GND MOTOROLA 68HCXX TRANSISTOR COUNT: 512 PROCESS: BiCMOS RESET INPUT GND Figure 2. Interfacing to µPs with Bidirectional Reset Pins 6 _______________________________________________________________________________________ µP Supervisory Circuits in 4-Bump (2 ✕ 2) Chip-Scale Package MAX6400–MAX6405 Table 1. Factory Trimmed Reset Thresholds* Reset Threshold Voltage, VTH (V) PARTS MAX6400BS MAX6401BS MAX6402BS MAX6403BS MAX6404BS MAX6405BS SUFFIX TA = +25°C T A = -40°C to +85°C MIN TYP MAX MIN MAX 22* 2.167 2.200 2.233 2.145 2.250 23* 2.285 2.320 2.355 2.262 2.375 24 2.364 2.400 2.436 2.340 2.460 25 2.462 2.500 2.537 2.437 2.562 26* 2.591 2.630 2.669 2.564 2.692 27 2.660 2.700 2.741 2.633 2.768 28 2.758 2.800 2.842 2.730 2.870 29* 2.886 2.930 2.974 2.857 3.000 30 2.955 3.000 3.045 2.925 3.075 31* 3.034 3.080 3.126 3.003 3.150 33 3.250 3.300 3.350 3.217 3.383 34 3.349 3.400 3.451 3.315 3.485 35 3.447 3.500 3.552 3.412 3.587 36 3.546 3.600 3.654 3.510 3.690 37 3.644 3.700 3.755 3.607 3.792 38 3.743 3.800 3.857 3.705 3.895 39 3.841 3.900 3.958 3.802 3.997 40 3.940 4.000 4.060 3.900 4.100 41 4.038 4.100 4.161 3.997 4.202 42 4.137 4.200 4.263 4.095 4.305 43 4.235 4.300 4.364 4.192 4.407 44* 4.314 4.380 4.446 4.270 4.489 45 4.432 4.500 4.567 4.387 4.612 46* 4.560 4.630 4.699 4.514 4.746 Factory-trimmed voltage thresholds are available in approximately 100mV increments with a 1.5% room-temperature variance. *Note: Parts marked with an asterisk (*) are standard versions. _______________________________________________________________________________________ 7 MAX6400–MAX6405 µP Supervisory Circuits in 4-Bump (2 ✕ 2) Chip-Scale Package Table 2. Device Marking Codes PARTS TOP MARK PARTS PARTS TOP MARK MAX6400BS31-T AAJ MAX6401BS31-T ABV MAX6402BS31-T ACF MAX6400BS30-T AAI MAX6401BS30-T ABU MAX6402BS30-T ACE MAX6400BS29-T AAH MAX6401BS29-T ABT MAX6402BS29-T ACD MAX6400BS28-T AAG MAX6401BS28-T ABS MAX6402BS28-T ACC MAX6400BS27-T AAF MAX6401BS27-T ABR MAX6402BS27-T ACB MAX6400BS26-T AAE MAX6401BS26-T ABQ MAX6402BS26-T ACA MAX6400BS25-T AAD MAX6401BS25-T ABP MAX6402BS25-T ABZ MAX6400BS24-T AAC MAX6401BS24-T ABO MAX6402BS24-T ABY MAX6400BS23-T AAB MAX6401BS23-T ABN MAX6402BS23-T ABX AAA MAX6401BS22-T ABM MAX6402BS22-T ABW MAX6400BS22-T PARTS TOP MARK PARTS TOP MARK ACT MAX6404BS46-T ADH MAX6403BS45-T ACS MAX6404BS45-T MAX6403BS44-T ACR MAX6404BS44-T MAX6403BS46-T PARTS TOP MARK MAX6405BS46-T ADV ADG MAX6405BS45-T ADU ADF MAX6405BS44-T ADT ADE MAX6405BS43-T ADS ACQ MAX6404BS43-T MAX6403BS42-T ACP MAX6404BS42-T ADD MAX6405BS42-T ADR MAX6403BS41-T ACO MAX6404BS41-T ADC MAX6405BS41-T ADQ MAX6403BS40-T ACN MAX6404BS40-T ADB MAX6405BS40-T ADP MAX6403BS39-T ACM MAX6404BS39-T ADA MAX6405BS39-T ADO MAX6403BS38-T ACL MAX6404BS38-T ACZ MAX6405BS38-T ADN MAX6403BS37-T ACK MAX6404BS37-T ACY MAX6405BS37-T ADM MAX6403BS36-T ACJ MAX6404BS36-T ACX MAX6405BS36-T ADL MAX6403BS35-T ACI MAX6404BS35-T ACW MAX6405BS35-T ADK MAX6403BS34-T ACH MAX6404BS34-T ACV MAX6405BS34-T ADJ ACG MAX6404BS33-T ACU MAX6405BS33-T ADI MAX6403BS43-T MAX6403BS33-T UCSP Reliability The chip-scale package (UCSP) represents a unique packaging form factor that may not perform equally to a packaged product through traditional mechanical reliability tests. CSP reliability is integrally linked to the user’s assembly methods, circuit board material, and usage environment. The user should closely review these areas when considering use of a CSP package. Performance through Operating Life Test and Moisture Resistance remains uncompromised as it is primarily determined by the wafer-fabrication process. 8 TOP MARK Mechanical stress performance is a greater consideration for a CSP package. CSPs are attached through direct solder contact to the user’s PC board, foregoing the inherent stress relief of a packaged product lead frame. Solder joint contact integrity must be considered. Information on Maxim’s qualification plan, test data, and recommendations are detailed in the UCSP application note, which can be found on Maxim’s website at www.maxim-ic.com. _______________________________________________________________________________________ µP Supervisory Circuits in 4-Bump (2 ✕ 2) Chip-Scale Package 4L, UCSP 2x2.EPS Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ______________________9 © 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX6400–MAX6405 Package Information